TL082

Wide Bandwidth Dual JFET Input Operational Amplifier

General Description

Features

These devices are low cost, high speed, dual JFET input
operational amplifiers with an internally trimmed input offset
voltage (BI-FET II technology). They require low supply
current yet maintain a large gain bandwidth product and fast
slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents. The
TL082 is pin compatible with the standard LM1558 allowing
designers to immediately upgrade the overall performance of
existing LM1558 and most LM358 designs.

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These amplifiers may be used in applications such as high

speed integrators, fast D/A converters, sample and hold
circuits and many other circuits requiring low input offset
voltage, low input bias current, high input impedance, high
slew rate and wide bandwidth. The devices also exhibit low
noise and offset voltage drift.

Typical Connection

Internally trimmed offset voltage:

Low input bias current:
Low input noise voltage:
Low input noise current:
Wide gain bandwidth:
High slew rate:
Low supply current:
High input impedance:
Low total harmonic distortion:
Low 1/f noise corner:
Fast settling time to 0.01%:

15 mV
50 pA
16nV/Hz
0.01 pA/Hz
4 MHz
13 V/s
3.6 mA
1012
0.02%
50 Hz
2 s

Connection Diagram
DIP/SO Package (Top View)

00835703
00835701

Order Number TL082CM or TL082CP

See NS Package Number M08A or N08E

Simplified Schematic

00835702

BI-FET II is a trademark of National Semiconductor Corp.

2004 National Semiconductor Corporation

DS008357

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TL082 Wide Bandwidth Dual JFET Input Operational Amplifier

August 2000

TL082

Absolute Maximum Ratings (Note 1)

Input Voltage Range (Note 3)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Output Short Circuit Duration

Continuous

Storage Temperature Range

65C to +150C

Power Dissipation

Note 1: Absolute Maximum Ratings indicate limits beyond which damage

to the device may occur. Operating Ratings indicate conditions for which the
device is functional, but do not guarantee specific performance limits.

0C to +70C

Tj(MAX)

150C

Differential Input Voltage

30V

DC Electrical Characteristics

(Note 5)

Parameter

Conditions

TL082C
Min

VOS

Input Offset Voltage

RS = 10 k, TA = 25C

Typ
5

Over Temperature
VOS/T

Average TC of Input Offset

260C

ESD rating to be determined.

(Note 2)

Operating Temperature Range

Symbol

Lead Temp. (Soldering, 10 seconds)

18V

Supply Voltage

15V

RS = 10 k

10

Tj = 25C, (Notes 5, 6)

25

Units
Max
15

mV

20

mV
V/C

Voltage
IOS

Input Offset Current

Tj 70C
IB

Input Bias Current

Tj = 25C, (Notes 5, 6)

RIN

Input Resistance

Tj = 25C

AVOL

Large Signal Voltage Gain

VS = 15V, TA = 25C

50

Tj 70C
25

200

pA

nA

400

pA

nA

1012

100

V/mV

VO = 10V, RL = 2 k
Over Temperature

15

V/mV

VO

Output Voltage Swing

VS = 15V, RL = 10 k

VCM

Input Common-Mode Voltage

VS = 15V

12
11

12

CMRR

Common-Mode Rejection Ratio

RS 10 k

70

100

dB

PSRR

Supply Voltage Rejection Ratio

(Note 7)

70

100

IS

Supply Current

Range

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13.5

+15

3.6

dB
5.6

mA

Symbol

TL082

AC Electrical Characteristics

(Note 5)

Parameter

Conditions

TL082C
Min

Amplifier to Amplifier Coupling

TA = 25C, f = 1Hz-

Typ

Units
Max

120

dB

20 kHz (Input Referred)

SR

Slew Rate

VS = 15V, TA = 25C

13

V/s

GBW

Gain Bandwidth Product

VS = 15V, TA = 25C

MHz

en

Equivalent Input Noise Voltage

TA = 25C, RS = 100,

25

nV/Hz

in

Equivalent Input Noise Current

Tj = 25C, f = 1000 Hz

0.01

pA/Hz

THD

Total Harmonic Distortion

AV = +10, RL = 10k,
VO = 20 Vp p,
BW = 20 Hz20 kHz

< 0.02

f = 1000 Hz

Note 2: For operating at elevated temperature, the device must be derated based on a thermal resistance of 115C/W junction to ambient for the N package.
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 4: The power dissipation limit, however, cannot be exceeded.
Note 5: These specifications apply for VS = 15V and 0C TA +70C. VOS, IB and IOS are measured at VCM = 0.
Note 6: The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature, Tj. Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, PD. Tj = TA + jA PD where jA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 7: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. VS
= 6V to 15V.

Typical Performance Characteristics

Input Bias Current

Input Bias Current

00835719
00835718

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TL082

Typical Performance Characteristics

(Continued)
Positive Common-Mode Input
Voltage Limit

Supply Current

00835721

00835720

Negative Common-Mode Input

Voltage Limit

Positive Current Limit

00835723

00835722

Negative Current Limit

Voltage Swing

00835725

00835724

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TL082

Typical Performance Characteristics

(Continued)

Output Voltage Swing

Gain Bandwidth

00835726
00835727

Bode Plot

Slew Rate

00835729

00835728

Undistorted Output
Voltage Swing

Distortion vs Frequency

00835730

00835731

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TL082

Typical Performance Characteristics

(Continued)

Open Loop Frequency

Response

Common-Mode Rejection
Ratio

00835733

00835732

Power Supply Rejection

Ratio

Equivalent Input Noise

Voltage

00835734
00835735

Open Loop Voltage

Gain (V/V)

Output Impedance

00835736

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00835737

TL082

Typical Performance Characteristics

(Continued)

Inverter Setting Time

00835738

Pulse Response

Large Signal Inverting

Small Signal Inverting

00835708

00835706

Large Signal Non-Inverting

Small Signal Non-Inverting

00835709
00835707

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TL082

Pulse Response

(Continued)
Current Limit (RL = 100)

00835710

The amplifiers will drive a 2 k load resistance to 10V over

the full temperature range of 0C to +70C. If the amplifier is
forced to drive heavier load currents, however, an increase
in input offset voltage may occur on the negative voltage
swing and finally reach an active current limit on both positive and negative swings.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET
input op amps they do not require special handling.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order
to ensure stability. For example, resistors from the output to
an input should be placed with the body close to the input to
minimize pick-up and maximize the frequency of the feedback pole by minimizing the capacitance from the input to
ground.

Application Hints
These devices are op amps with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of the
supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will cause a reversal of the phase to the output and force the
amplifier output to the corresponding high or low state. Exceeding the negative common-mode limit on both inputs will
force the amplifier output to a high state. In neither case
does a latch occur since raising the input back within the
common-mode range again puts the input stage and thus
the amplifier in a normal operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
Each amplifier is individually biased by a zener reference
which allows normal circuit operation on 6V power supplies. Supply voltages less than these may result in lower
gain bandwidth and slew rate.

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A feedback pole is created when the feedback around any

amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3
dB frequency of the closed loop gain and consequently there
is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3
dB frequency a lead capacitor should be placed from the
output to the input of the op amp. The value of the added
capacitor should be such that the RC time constant of this
capacitor and the resistance it parallels is greater than or
equal to the original feedback pole time constant.

TL082

Detailed Schematic

00835711

Typical Applications
Three-Band Active Tone Control

00835712

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TL082

Typical Applications

(Continued)

00835713

All potentiometers are linear taper

Use the LF347 Quad for stereo applications
Note 8: All controls flat.
Note 9: Bass and treble boost, mid flat.
Note 10: Bass and treble cut, mid flat.
Note 11: Mid boost, bass and treble flat.
Note 12: Mid cut, bass and treble flat.

Improved CMRR Instrumentation Amplifier

00835714

C and are separate isolated grounds

Matching of R2s, R4s and R5s control CMRR

With AVT = 1400, resistor matching = 0.01%: CMRR = 136 dB

Very high input impedance

Super high CMRR

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TL082

Typical Applications

(Continued)
Fourth Order Low Pass Butterworth Filter

00835715

Fourth Order High Pass Butterworth Filter

00835716

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TL082

Typical Applications

(Continued)
Ohms to Volts Converter

00835717

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TL082

Physical Dimensions

inches (millimeters)

unless otherwise noted

Order Number TL082CM

NS Package M08A

Order Number TL082CP

NS Package N08E

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TL082 Wide Bandwidth Dual JFET Input Operational Amplifier

Notes

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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