74VHC244  74VHCT244 Octal Buffer Line Driver with TRI-STATE Outputs

October 1995

74VHC244  74VHCT244 Octal Buffer Line Driver with TRI-STATE Outputs

General Description
The VHC VHCT244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate C2MOS technology It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation The VHC VHCT244 is a non-inverting TRI-STATE buffer having two active-low output enables These devices are designed to be used as TRI-STATE memory address drivers clock drivers and bus oriented transmitter receivers An input protection circuit ensures that 0V7V can be applied to the input pins without regard to the supply voltage This device can be used to interface 5V to 3V systems and two supply systems such as battery back up This circuit prevents device destruction due to mismatched supply and input voltages

Features
Y

Y Y

High noise immunity VHC VNIH e VNIL e 28% VCC (min) VHCT VIH e 2 0V VIL e 0 8V Power down protection VHC inputs only VHCT inputs and outputs Low noise VHC VOLP e 0 6V (typ) VHCT VOLP e 0 7V (typ) Low power dissipation ICC e 4 mA (max) TA e 25 C Balanced propagation delays tPLH j tPHL Pin and function compatible with 74HC HCT244

NOTE ADD EXTERNAL PULL UP RESISTOR TO VHCT OUTPUTS TO DRIVE CMOS INPUTS

Commercial 74VHC244M 74VHC244SJ 74VHC244MSC 74VHC244MTC 74VHC244N 74VHCT244M 74VHCT244SJ 74VHCT244MTC 74VHCT244N

Package Number M20B M20D MSC20 MTC20 N20A M20B M20D MTC20 N20A

Package Description 20-Lead Molded JEDEC SOIC 20-Lead Molded EIAJ SOIC 20-Lead Molded EIAJ Type 1 SSOP 20-Lead Molded JEDEC Type 1 TSSOP 20-Lead Molded DIP 20-Lead Molded JEDEC SOIC 20-Lead Molded EIAJ SOIC 20-Lead Molded JEDEC Type 1 TSSOP 20-Lead Molded DIP

Note Surface mount packages are also available on Tape and Reel Specify by appending the suffix letter X to the ordering code EIAJ Type 1 SSOP available on Tape and Reel only order MSCX

Logic Symbol
IEEE IEC

Connection Diagram
Pin Assignment for DIP SSOP TSSOP and SOIC

Truth Tables
Inputs OE1 L L H In L H X Inputs OE2 L L H In L H X Outputs (Pins 12 14 16 18) L H Z Outputs (Pins 3 5 7 9) L H Z
I e Immaterial Ze High Impedance

TL F 11522 1 TL F 115223

H e HIGH Voltage Level L e LOW Voltage Level

Pin Names OE1 OE2 I0 I7 O0 O7

TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation

Description TRI-STATE Output Enable Inputs Inputs TRI-STATE Outputs

TL F 11522

RRD-B30M125 Printed in U S A

Absolute Maximum Ratings (Note 1)

Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) VHC VHCT Input Diode Current (IIK) Output Diode Current (IOK) VHC VHCT DC Output Current (IOUT) DC VCC GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering 10 seconds)
VOUT l VCC only if output is in H or Z state

b 0 5V to a 7 0V b 0 5V to a 7 0V b 0 5V to VCC a 0 5V b 0 5V to 7 0V b 20 mA
g 20 mA

Note 1 Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired The databook specifications should be met without exception to ensure that the system design is reliable over its power supply temperature and output input loading variables National does not recommend operation outside databook specifications

b 20 mA
g 25 mA g 75 mA

Recommended Operating Conditions

Supply Voltage (VCC) VHC VHCT Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TOPR) 74VHC VHCT Input Rise and Fall Time (tr tf) VCC e 3 3V g 0 3V (VHC Only) VCC e 5 0V g 0 5V 2 0V to 5 5V 4 5V to 5 5V 0V to a 5 5V 0V to VCC
b 40 C to a 85 C

b 65 C to a 150 C

260 C

0 ns V E 100 ns V 0 ns V E 20 ns V

DC Characteristics for VHC Family Devices

74VHC Symbol Parameter VCC (V) Min VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 20 3 05 5 20 3 05 5 20 30 45 30 45 VOL Low Level Output Voltage 20 30 45 30 45 19 29 44 2 58 3 94 00 00 00 01 01 01 0 36 0 36 20 30 45 15 0 7 VCC 05 0 3 VCC 19 29 44 2 48 3 80 01 01 01 0 44 0 44 TA e 25 C Typ Max 74VHC TA e b40 C to a 85 C Min 15 0 7 VCC 05 0 3 VCC Max V V V VIN e VIH IOH e b50 mA or VIL IOH e b4 mA IOH e b8 mA VIN e VIH IOL e 50 mA or VIL IOL e 4 mA IOL e 8 mA Units Conditions

DC Characteristics for VHC Family Devices (Continued)

74VHC Symbol Parameter VCC (V) Min IOZ IIN ICC TRI-STATE Output Off-State Current Input Leakage Current Quiescent Supply Current 55 05 5 55 TA e 25 C Typ Max
g 0 25 g0 1

74VHC TA e b40 C to a 85 C Min Max

g2 5 g1 0

Units

Conditions

mA mA mA

VIN e VIH or VIL VOUT e VCC or GND VIN e 5 5V or GND VIN e VCC or GND

40

40 0

DC Characteristics for VHC Family Devices

74VHC Symbol Parameter VCC (V) Typ VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum High Level Dynamic Input Voltage 50 50 50 50 06
b0 6

TA e 25 C Limits 09
b0 9

Units

Conditions

V V V V

CL e 50 pF CL e 50 pF CL e 50 pF CL e 50 pF

35 15

Parameter guaranteed by design

DC Characteristics for VHCT Family Devices

74VHC Symbol Parameter VCC (V) Min VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage TRI-STATE Output Off-State Current Input Leakage Current Quiescent Supply Current Maximum ICC Input Output Leakage (Power Down State) 45 55 45 55 45 45 45 45 3 15 25 00 01 0 36 3 65 20 20 08 08 3 15 24 01 0 44 V TA e 25 C Typ Max 74VHC TA e b40 C to a 85 C Min 20 20 08 08 Max V V V VIN e VIH IOH e b50 mA or VIL I OH e b 8 mA VIN e VIH IOL e 50 mA or VIL I e 8 mA OL VIN e VIH or VIL VOUT e VCC or GND Units Conditions

VOL

IOZ

55

g 0 25

g2 5

mA

IIN

VIN e 5 5V or GND 05 5
g0 1 g1 0

mA VIN e VCC or GND

ICC

55

40

40 0

mA VIN e 3 4V Other Inputs e VCC or GND VOUT e 5 5V

ICCT IOPD

55

1 35

1 50

mA

00

a0 5

a5 0

mA

DC Characteristics for VHCT Family Devices

74VHCT Symbol Parameter VCC (V) Typ VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum High Level Dynamic Input Voltage 07
b0 7

TA e 25 C Limits 10
b1 0

Units

Conditions

V V V V

CL e 50 pF CL e 50 pF CL e 50 pF CL e 50 pF

20 08

Parameter guaranteed by design

AC Electrical Characteristics for VHC Family Devices

74VHC Symbol Parameter VCC (V) TA e 25 C Min tPLH tPHL Propagation Delay Time 3 3 g0 3 Typ 58 83 5 0 g0 5 tPZL tPZH TRI-STATE Output Enable Time 39 54 3 3 g0 3 66 91 5 0 g0 5 tPLZ tPHZ tOSLH tOSHL CIN COUT CPD TRI-STATE Output Disable Time Output to Output Skew 3 3 g0 3 5 0 g0 5 3 3 g0 3 5 0 g0 5 Input Capacitance Output Capacitance Power Dissipation Capacitance 4 6 19 47 62 10 3 67 Max 84 11 9 55 75 10 6 14 1 73 93 14 0 92 15 10 10 74VHC TA e b40 C to a 85 C Min 10 10 10 10 10 10 10 10 10 10 Max 10 0 13 5 65 85 12 5 16 0 85 10 5 16 0 10 5 15 10 10 pF pF pF VCC e Open VCC e 5 0V (Note 2) ns (Note 1) RL e 1 kX ns ns RL e 1 kX ns ns CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 50 pF CL e 50 pF CL e 50 pF CL e 50 pF Units Conditions

ns

Note 1 Parameter guaranteed by design tOSLH e tPLHmax b tPLHmin tOSHL e tPHLmax b tPHLmin

Note 2 CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load Average operating current can be obtained by the equation ICC (OPR ) e CPD VCC fIN a ICC 8 (per bit)

AC Electrical Characteristics for VHCT Family Devices

74VHCT Symbol Parameter VCC (V) TA e 25 C Min tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLH tOSHL CIN COUT CPD Propagation Delay Time 5 0 g0 5 Typ 54 59 TRI-STATE Output Enable Time 5 0 g0 5 77 82 TRI-STATE Output Disable Time Output to Output Skew Input Capacitance Output Capacitance Power Dissipation Capacitance 5 0 g0 5 88 5 0 g0 5 4 9 18 11 4 10 13 0 ns (Note 1) VCC e Open VCC e 5 0V (Note 2) CL e 50 pF Max 74 84 10 4 11 4 74VHCT TA e b40 C to a 85 C Min 10 10 10 10 Max 85 95 12 0 13 0 ns RL e 1 kX RL e 1 kX ns CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 50 pF Units Conditions

10 10

10 10

ns pF pF pF

Note 1 Parameter guaranteed by design tOSLH e l tPLHmax b tPLHmin l tOSHL e l tPHLmax b tPHLmin l Note 2 CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load Average operating current can be obtained by the equation ICC (OPR ) e CPD VCC fIN a ICC 8 (per bit)

Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows

TL F 11522 4

Physical Dimensions inches (millimeters)

20-Lead Small Outline Integrated Circuit JEDEC SOIC (M) Order Number 74VHC244M 74VHC244MX 74VHCT244M or 74VHCT244MX NS Package Number M20B

20-Lead Small Outline Integrated Circuit-EIAJ SOIC (SJ) Order Number 74VHC244SJ 74VHC244SJX 74VHCT244SJ or 74VHCT244SJX NS Package Number M20D 8

Physical Dimensions millimeters

20-Lead Plastic EIAJ SSOP Type I (MSC) Order Number 74VHC244MSCX NS Package Number MSC20

20-Lead Plastic JEDEC TSSOP Type I (MTC) Order Number 74VHC244MTC 74VHC244MTCX 74VHCT244MTC or 74VHCT244MTCX NS Package Number MTC20

74VHC244  74VHCT244 Octal Buffer Line Driver with TRI-STATE Outputs

Physical Dimensions (millimeters) (Continued)

20-Lead Molded DIP Order Number 74VHC244N or 74VHCT244N NS Package Number N20A

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