Questions tagged [memory-management]
The memory-management tag has no usage guidance.
322 questions
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Is GPU memory coalescing something the hardware does or the programmer does?
I am learning about memory coalescing in NVIDIA GPUs. I am trying to understand what exactly coalescing is. More specifically, is it something specifically implemented by hardware, or is it just the ...
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How to allocate memory in NASM without C functions (x64)?
So I'm using NASM on linux and I was curious how this is done. All the info I can find online uses functions from C like malloc(). Can this be done purely with assembly code? Perhaps via a system call?...
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confusion between memory address and size
Sorry if the question appears silly, but I just really want to understand what actually are memory addresses.
When I asked this question on google, I found that some people compared this with a post ...
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How does the BIOS teletype routine work?
I am writing an OS. I am not a computer scientist, I am a physicist, so my understanding of computing is limited enough that I don't yet know how to ask the right questions. I am looking for either a ...
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In-Place Reordering of Doubly Linked List Nodes to Ensure Memory Contiguity
I am addressing an optimization problem involving a doubly linked list, where nodes are allocated within a contiguous memory block of fixed size $N$. Initially, the spatial locality of nodes in memory ...
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How does paging avoid external fragmentation with different page sizes across processes?
It's commonly said that paging has no external fragmentation, only internal fragmentation.
But I've read that some architectures have support for different page sizes. And different processes can use ...
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RAM architecture vs. CPU architecture
I have learned that initially PCs had 8-bit memory architecture and that 1 byte (i.e. 8 bits) was the "basic" memory unit because 8 bits was exactly the memory space required to encode any ...
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Why is the default page/block size 4 KiB?
Clearly, some empirical study on an older machine helped us choose a 4KiB page size to balance TLB hit rate and fragmentation. Modern hardware and operating systems support this size for backward ...
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what kind of resources do microservices use when they communicate each other within a same machine?
Assume microservices are in the same machine and they exchange their data via RESTapi calls, what kind of resources (ex:CPU,memory) do microservices use when they communicate each other within a same ...
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Are they talking about virtual memory in this article?
I am reading this Wikipedia article:
https://en.wikipedia.org/wiki/Memory_segmentation
And I am in this paragraph:
Segmentation with paging
Instead of a memory location, the segment information ...
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Memory addresses requested by CPU vs Memory Address Provided to DRAM
So, i just got through studying DRAM architecture. I learned that a row address, column address, bank number etc are provided to the DRAM during a read operation. Based on the address provided, 64 ...
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Memory Question
Say we're back in the 1950s and our clunky computer has a $1$ kilobyte memory. $1$ kilobyte is $1024$ bytes, which is $8192$ bits. When we consider the entire available storage space, there are $2^{...
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Who and how generate the virtual/logical addresses? Confusion if it's the compiler, the linker, the loader
I know that when I compile a program and then I inspect with objdump, I have addresses. These are relative addresses.
But if it's a C program and I printf with <...
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Problem with cache and memory from university class
In my university class, I received this homework assignment on computer architecture, but I don't know how to solve it. I already know that the correct answer is 0, but I don't understand why. Could ...
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Thread safety due to no runtime allocation of memory, why?
I was watching a presentation related to the MuJoCo simulator (and other topics which were more relevant for the presentation itself) and at one moment in the presentation it is mentioned that MuJoCo ...
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Cache Miss in First Private Cache but Hit in Shared LEvel 2 Cache: Does it Result in a Penalty?
In the context of Shared Memory Multiprocessor (SMP) systems with different cache levels, if a cache miss occurs in the first private cache but is followed by a hit in the second shared cache, would ...
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What is the hit rate of the cache when executing this code?
C++ code:
int main()
{
short int arr[4][4];
for (int i = 0; i < 8; i++)
{
for (int j = 0; j < 8; j++)
{
arr[i][j] = i+j;
}
}
return 0;
}
Is there ...
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How to find the free memory addresses in RAM?
I am currently trying to build a simple computer in Minecraft (8-bit data, 6-bit addresses, no paging or segmentation), with redstone, where I can make run simple programs written similarly to code in ...
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Roles of 80386 MMU Paging Unit and similarity with modern CPU MMU
While searching for the structure of the MMU, I found the image below (80386 Internal Architecture).
I have three questions.
Q1. I'd like to know the roles of 'Adder', 'Page Cache', and 'Control and ...
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Neural networks as building blocks of a computer
I think I have developed a logic circuit which by using combinational logic and flip flops learns to perform the XNOR logic between 2 bits.It is a kind of state machine. Suppose we built a computer ...
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Why when we use DMA , Read/Write operations on I/O devices are faster?
I am wondering why are read/write operations on I/O devices much faster when we use DMA?I must be that when using DMA we have 1 less clock cycle to access the local buffer of a IO device since it is ...
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How is the physical address calculated in Page tables?
Taking an example, say we have Page size = 4KB, Page Table Entry = 4B, Physical Address Space requires 36 bits
In 3-level multi-paging, let's say the number of entries in the level 3 page table is 2^9 ...
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Why is `3[arr]` notation of accessing elements in array is not used?
Today, I came across the notation 3[arr] in C++, and I was surprised to find out that it's a valid way to access array elements. For example:
...
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How do you bit-shift in RISC-V?
In the following video on computer organization:
https://youtu.be/DoR505t8-7I?t=114
the instructor displays the following:
and says that the hex string 0xFFFFFF00 ...
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57
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Associative memory addressing
I would like to understand better how associative memory works.In associative memory we have the tag and the actual data being stored.The tag describes where the data came from but what does this mean ...
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Physical memory address space
When you address physical memory, in the kernel, is it just another value like 0xf78f9 just like virtual addresses (and the only thing that is different is that the ...
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Disk addressing
I am wondering how disk addresses are accessed from a program. From my understanding, the two main facilities are programmed I/O (instructions) and memory-mapped I/O (simply loads and stores). The ...
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Memory (physical addressing)
From my understanding, physical memory (main memory -- DRAM) is addressed differently than disk. This is all a bit of an abstraction to me, and I am hoping to make my understanding more concrete.
...
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Page allocation for a program
When my professor explained how the OS handles memory, he described demand paging, and how when a process starts up, the code page with the first instruction is loaded into memory, and everything else ...
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Why does Python behave so absurdly when dealing with numbers with decimal points?
r1 and r2 both are assigned 0.05 initially. If r1 is incremented by 0.01 in this way "r1 = r1 +0.01" we have 0.060000000000000005 as answer not 0.06.
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How does non-DMA transfers really work?
I recently discussed DMA and non-DMA with my OS professor. Here is my current understanding:
disk controller has its own CPU, maybe own ISA, tiny program that simply handles reading from the disk (...
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How is the memory address structured when the number of blocks per cache set is not a power of 2?
When it comes to defining the memory address structure given the RAM size, cache size, and other parameters such as the cache block size..., we can have the following generalization:
$$Address = TAG|...
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Memory management with bitmaps
I am reading Tanenbaum's Modern operating systems. I am not able to understand what he means by last line in the attached image. He says that the run may straddle word boundaries in the bitmap. What ...
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Best C++ STL container to store bodies in an N-body simulation?
I am writing an N-body simulation in C++ that has to be able to deal with large N ($N \le 10^6$).
Everything has been going well so far, but now that I have started to code in collisions between ...
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Is there an adress in the hard disk for each virtual adress?
Is it so that for each virtual adress there exists an adress in the hard disk? But the hard disk can be larger than the virtual memory?
EDIT: Or can some virtual adresses always map to physical, and ...
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How does the computer keep track of which physical pages are used?
My book(link) says that if the computer tries to access a virtual memory page that is on the hard-disc it loads that page into physical memory. But how does the computer keep track of which physical ...
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Does the computer change the content of the virtual adress
My book(digital design and computer architecture ARM edition) explains loads and stores like this:
To perform a load or store, the processor must first translate the
virtual adress to a physical ...
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automatic memory allocation
Global variables are given fixed addresses in main memory by the C compiler, called static memory allocation. Function local variables are created on the stack, this is called automatic memory ...
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What is the relationship between virtual address and physical address?
I am recently studying the operating system, and I found the paging system a little bit confusing, for example, what will happen when there is a 52-bit virtual address and a 40-bit physical address, ...
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How many bits are needed to reference physical vs virtual addresses?
I trying to learn about virtual memory at the moment and one of the explanations I've look at has a diagram like below. You can see that 32 bit virtual addresses are used so the virtual address space ...
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Page/Frame VS Block
I am bit confused on these terminologies.
While studying Paging of Operating System we study about Page and Frame.
Size of one Frame of Main Memory = Size of one Page of a Process
While studying ...
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If a process needs more RAM, does the Page size simply get bigger or does it get a new page?
Let's say I have a Operating System with 4KB page size, but I need to allocate 8kb of memory for all the variables. Does the Process get new page (second one) or does the current page table simply get ...
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How are processor instructions stored in RAM?
I've recently been designing a simple 8-bit microprocessor, similar to the Intel 8008. It doesn't make use of anything advanced as pipelining, as my knowledge isn't at that level yet to know how to ...
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How hardware write a byte in memory?
I want to know how hardwares write a byte in memory?
If there is difference between writing process in RAM and ROM I would like to know as well.
Specially I want to know:
Is hardware writes values ...
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Are there any "fast" algorithms for defragmenting memory?
This is about memory, not files or filesystems.
So in a typical process, imagine you have a string "Hello world" that later gets changed to "Hello". Or a list of 100 objects later ...
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On load estimation of memory consumption of program, is it possible?
In the book "Fundamentos de sistemas operativos" (Gunnar Wolf, Esteban Ruiz, Federico Bergero, Erwin Meza p.254) it says:
Al cargar un programa el sistema operativo calcula cuánta memoria ...
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Bitvector for Memory Allocation
Lets say a system has 1TB of memory and 4kB blocks. How many MB of memory do we need if we want to store a bitvector to represent the current memory allocation situation with a bitvector?
Bitvector: a ...
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Understanding maps file in /proc directory for a process
In linux, when I access /proc for a particular program it shows memory mapping for the program in maps file.
Something like this:
I wanted to know what is this [stack] memory mapped to i.e the kernel ...
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Virtual and physical address spaces in address binding
I just need to check my understanding regrading two points .As was stated in the textbook "Operating systems concept " :
The compile-time and load-time address-binding methods generate
...
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Definition of the term "access efficiency" in the context of computer systems
In a two-level virtual memory, the memory access time for main memory, $t_M=10^{−8}$ sec, and the memory access time for the secondary memory, $t_D=10^{−3}$ sec. What must be the hit ratio, $H$ such ...
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