Computer Organisation & Architecture
Computer Organisation & Architecture
Computer Organisation & Architecture
ROLL NO – 20/CSE/052
BOARD ROLL NO – 311121820052
BRANCH – COMPUTER SCI. & ENGG.
SEMESTER – 3rd
SESSION – 2020-23
Whenever a key is pressed one corresponding word or number is translated into its equivalent
binary code over a cable and fed to memory or process
ex.-> keyboard ,joysticks ,mouse ,scanner etc.
->The operands are brought into the alu from memory and stored in high speed storage element
called register.
RAM (Random Access Memory) − It stands for Random Access Memory. RAM is a read /writes
memory. It is referred as main memory of the computer system. It is a temporary memory.
The information stored in RAM is lost whenever the power supply to the computer is switched
off.
RAM is also of two types which are as follows −
Static RAM − Static RAM also known as SRAM. In this RAM the information is stored as long as
the power supply is ON. SRAM are of higher coast and consume more power .They have higher
speed than Dynamic RAM
Dynamic RAM − Dynamic RAM also known as DRAM, This type of RAM stores information in a
very short time basically, a few milliseconds even though the power supply is ON. The
Dynamic RAM is cheaper and of moderate speed and also they consume less power.
ROM (Read Only Memory) − It stands for Read Only Memory. ROM is a permanent type of
memory. ROM information is not lost when power supply is switched off. The Content of ROM
is inserted by the computer manufacturer and permanently stored at the time of
manufacturing. ROM cannot be overwritten by the computer. It is also called Non- Volatile
Memory.
ROM memory has three types’
which are as following −
PROM (Programmable Read Only Memory) − It is used to write data once and read many. Once
a chip has been programmed, the recorded information cannot be changed. It is a non-volatile
memory.
EPROM (Erasable Programmable Read Only Memory) − EPROM chip can be programmed by
erasing the information stored earlier in it. Information stored in EPROM exposing the chip for
ultraviolet light.
Cache Memory-> Cache Memory is a special very high-speed memory. It is used to speed up and
synchronizing with high-speed CPU. Cache memory is an extremely fast memory type that acts
as a buffer between RAM and the CPU. It holds frequently requested data and instructions so
that they are immediately available to the CPU when needed.
Secondary Memory or Non Volatile Memory
It is an external memory of the computer. It is also known as Auxiliary memory or permanent
memory. It is used to store different programs and the information permanently. We call it a non-
volatile memory that means the data is stored permanently even if power is switched off.
The control unit (CU) is a component of a computer's central processing unit (CPU) that directs
the operation of the processor. A CU typically uses a binary decoder to convert coded instructions
into timing and control signals that direct the operation of the other units (memory, arithmetic
logic unit and input and output devices, etc.)
OUTPUT UNIT
In computers, a unit which delivers information from the computer to an external device or
from internal storage to external storage.
Examples -> monitors, printers, speakers, headphones, projectors, GPS devices, optical mark
readers.
BUS structure :
A group of lines that serves as a connecting path for several devices is called bus.
In addition to the lines that carry the data, the bus must have lines for address and control
purposes.
.A processing unit with both an arithmetic logic unit and processor registers
.A control unit that includes an instruction register and a program counter
.Memory that stores data and instructions
.External mass storage
.Input and output mechanisms
The term "von Neumann architecture" has evolved to refer to any stored-program computer in
which an instruction fetch and a data operation cannot occur at the same time (since they share
a common bus). This is referred to as the von Neumann bottleneck, which often limits the
performance of the corresponding system.
Von Neumann architecture basic structre
A Von Neumann-based computer:
•Uses a single processor
•Uses one memory for both instructions and data.
•Executes programs following the fetch-decode-execute cycle
Registers
Registers refer to high-speed storage areas in the CPU. The data
processed by the CPU are fetched from the registers.
Following is the list of registers that plays a crucial role in data
processing.
Following is the list of registers that plays a crucial role in data processing.
Registers Description
MAR (Memory Address Register) This register holds the memory location of the data that needs to
be accessed.
MDR (Memory Data Register) This register holds the data that is being transferred to or from
memory.
AC (Accumulator) This register holds the intermediate arithmetic and logic results.
PC (Program Counter) This register contains the address of the next instruction to be
executed.
CIR (Current Instruction Register) This register contains the current instruction during processing.
Buses
Buses are the means by which information is shared between the registers in a multiple-register
configuration system.
A bus structure consists of a set of common lines, one for each bit of a register, through which
binary information is transferred one at a time. Control signals determine which register is
selected by the bus during each particular register transfer.
Von-Neumann Architecture comprised of three major bus systems for data transfer.
Bus Description
Address Bus Address Bus carries the address of data (but not
the data) between the processor and the memory.
Data Bus Data Bus carries data between the processor, the
memory unit and the input/output devices.
The General Purpose Computer System is the modified version of the Von-Neumann
Architecture. In simple words, we can say that a general purpose computer system is a
modern day architectural representation of Computer System.
The CPU (Central Processing Unit) consists of the ALU (Arithmetic and Logic Unit), Control
Unit and various processor registers.
The CPU, Memory Unit and I/O subsystems are interconnected by the system bus which
includes data, address, and control-status lines.
The following image shows how CPU, Memory Unit and I/O subsystems are connected
through common single bus architecture.
Difference between Von Neumann and Harvard Architecture :
It is ancient computer architecture based on stored program It is modern computer architecture based on Harvard Mark I relay
computer concept. based model.
Same physical memory address is used for instructions and data. Separate physical memory address is used for instructions and data.
There is common bus for data and instruction transfer. Separate buses are used for transferring data and instruction.
Two clock cycles are required to execute single instruction. An instruction is executed in a single cycle.
CPU can not access instructions and read/write at the same time. CPU can access instructions and read/write at the same time.
It is used in personal computers and small computers. It is used in micro controllers and signal processing.
What do you mean by stored program concept ?
In the stored program concept, both the instructions and the data (that the instructions operate
on) are stored in the computer memory itself. Before the introduction of this idea, instructions and
data were considered two totally different entities and were thus stored separately.
Thus instructions like data can be read from the memory and written to the memory by the
processor.
Computers that store both instructions and data on the same memory are said to be based on the
Von Neumann architecture. Modern desktop computers are still based on the same stored program
concept.
COMPUTER ARITHMETIC
OPERATIONS
Introduction of Logic Gates
In Boolean Algebra, there are three basic operations, +,\:.\:,\:^\prime which are analogous to
disjunction, conjunction, and negation in propositional logic. Each of these operations has a
corresponding logic gate. Apart from these there are a few other logic gates as well.
Logic Gates –
1. AND gate(.) – The AND gate gives an output of 1 if both the two inputs are 1, it gives 0 otherwise.
2. OR gate(+) – The OR gate gives an output of 1 if either of the two inputs are 1, it gives 0
otherwise.
3. NOT gate(‘) – The NOT gate gives an output of 1 input is 0 and vice-versa.
4. XOR gate(\oplus) – The XOR gate gives an output of 1 if either both inputs are different, it gives 0
if they are same.
Three more logic gates are obtained if the output of above-mentioned gates is negated.
5. NAND gate(\uparrow)- The NAND gate (negated AND) gives an output of 0 if both inputs are 1, it
gives 1 otherwise.
6. NOR gate(\downarrow)- The NOR gate (negated OR) gives an output of 1 if both inputs are 0, it
gives 0 otherwise.
7. XNOR gate(\odot)- The XNOR gate (negated XOR) gives an output of 1 both inputs are same and 0
if both are different.
Every Logic gate has a graphical representation or symbol associated with it. Below is an image which
shows the graphical symbols and truth tables associated with each logic gate.
Universal Logic Gates –
Out of the seven logic gates discussed above, NAND and NOR are also known as universal gates
since they can be used to implement any digital circuit without using any other gate. This means
that every gate can be created by NAND or NOR gates only.
Implementation of three basic gates using NAND and NOR gates is shown below –
For the XOR gate, NAND and NOR implementation is –
Note – For implementing XNOR gate, a single NAND or NOR gate can be added to the above circuits to
negate the output of the XOR gate.
Boolean algebra
Boolean algebra can be considered as an algebra that deals with binary variables and logic
operations. Boolean algebraic variables are designated by letters such as A, B, x, and y. The basic
operations performed are AND, OR, and complement.
The Boolean algebraic functions are mostly expressed with binary variables, logic operation
symbols, parentheses, and equal sign. For a given value of variables, the Boolean function can be
either 1 or 0. For instance, consider the Boolean function:
F = x + y’z
The logic diagram for the Boolean function F = x + y'z can be represented as:
• The Boolean function F = x + y'z is transformed from an algebraic expression into a logic
diagram composed of AND, OR, and inverter gates.
• Inverter at input 'y' generates its complement y'.
• There is an AND gate for the term y'z, and an OR gate is used to combine the two terms (x and
y'z).
• The variables of the function are taken to be the inputs of the circuit, and the variable symbol
of the function is taken as the output of the circuit.
NOTE: A truth table can represent the relationship between a function and its binary variables.
To represent a function in a truth table, we need a list of the 2^n combinations of n binary
variables.
The truth table for the Boolean function F = x + y'z can be represented as:-
Laws of Boolean algebra :-
The basic Laws of Boolean Algebra can be stated as follows:
• Commutative Law states that the interchanging of the order of operands in a Boolean equation does
not change its result. For example:
1. OR operator → A + B = B + A
2. AND operator → A * B = B * A
• Associative Law of multiplication states that the AND operation are done on two or more than two
variables. For example:
A * (B * C) = (A * B) * C
• Distributive Law states that the multiplication of two variables and adding the result with a variable
will result in the same value as multiplication of addition of the variable with individual variables.
For example:
A + BC = (A + B) (A + C)
• Annulment law:
A.0 = 0
A+1=1
• Identity law:
A.1 = A
A+0=A
• Idempotent law:
A+A=A
A.A = A
• Complement law:
A + A' = 1
A.A'= 0
• Double negation law:
((A)')' = A
• Absorption law:
A.(A+B) = A
A + AB = A
De Morgan's theorem
De Morgan's Law is also known as De Morgan's theorem, works depending on the concept of Duality.
Duality states that interchanging the operators and variables in a function, such as replacing 0 with 1 and
1 with 0, AND operator with OR operator and OR operator with AND operator.
De Morgan stated 2 theorems, which will help us in solving the algebraic problems in digital electronics.
The De Morgan's statements are:
1. "The negation of a conjunction is the disjunction of the negations", which means that the complement
of the product of 2 variables is equal to the sum of the compliments of individual variables. For
example, (A.B)' = A' + B'.
2. "The negation of disjunction is the conjunction of the negations", which means that compliment of the
sum of two variables is equal to the product of the complement of each variable. For example, (A + B)'
= A'B'
Representation of Data/Information
Computer does not understand human language. Any data, viz., letters, symbols, pictures, audio,
videos, etc., fed to computer should be converted to machine language first. Computers represent data
in the following three forms −
• Number System
We are introduced to concept of numbers from a very early age. To a computer, everything is a number, i.e., alphabets,
pictures, sounds, etc., are numbers. Number system is categorized into four types −
Bytes − group of eight bits is called a byte. Half a byte is called a nibble.
Text Code
Text code is format used commonly to represent alphabets, punctuation marks and other symbols.
Four most popular text code systems are −
EBCDIC
ASCII
Extended ASCII
Unicode
EBCDIC
Extended Binary Coded Decimal Interchange Code is an 8-bit code that defines 256 symbols. Given below is the
EBCDIC Tabular column
ASCII
American Standard Code for Information Interchange is an 8-bit code that specifies character values from 0
to 127.
Extended ASCII
Extended American Standard Code for Information Interchange is an 8-bit code that specifies character
values from 128 to 255.
There are two major approaches to store real numbers (i.e., numbers with fractional component) in
modern computing. These are (i) Fixed Point Notation and (ii) Floating Point Notation. In fixed point
notation, there are a fixed number of digits after the decimal point, whereas floating point number
allows for a varying number of digits after the decimal point.
Fixed-Point Representation −
This representation has fixed number of bits for integer part and for fractional part.
For example, if given fixed-point representation is IIII.FFFF, then you can store
minimum value is 0000.0001 and maximum value is 9999.9999. There are three parts of
a fixed-point number representation: the sign field, integer field, and fractional field.
Example −Assume number is using 32-bit format which reserve 1 bit for the sign, 15 bits for
the integer part and 16 bits for the fractional part.
We can move the radix point either left or right with the help of only
integer field is 1.
Floating-Point Representation −
This representation does not reserve a specific number of bits for the integer part or the fractional
part. Instead it reserves a certain number of bits for the number (called the mantissa or significand)
and a certain number of bits to say where within that number the decimal place sits (called the
exponent).
The floating number representation of a number has two part: the first part represents a signed fixed
point number called mantissa. The second part of designates the position of the decimal (or binary)
point and is called the exponent. The fixed point mantissa may be fraction or an integer. Floating -
point is always interpreted to represent a number in the following form: Mxre.
Only the mantissa m and the exponent e are physically represented in the register (including their
sign). A floating-point binary number is represented in a similar manner except that is uses base 2 for
the exponent. A floating-point number is said to be normalized if the most significant digit of the
mantissa is 1.
So, actual number is (-1)s(1+m)x2(e-Bias), where s is the sign bit, m is the mantissa, e is
the exponent value, and Bias is the bias number.
Note that signed integers and exponent are represented by either sign representation, or
one’s complement representation, or two’s complement representation.
The floating point representation is more flexible. Any non-zero number can be
represented in the normalized form of ±(1.b1b2b3 ...)2x2n This is normalized form of a
number x.
Example −Suppose number is using 32-bit format: the 1 bit sign bit, 8 bits for signed
exponent, and 23 bits for the fractional part. The leading bit 1 is not stored (as it is always
1 for a normalized number) and is referred to as a “hidden bit”.
Note that 8-bit exponent field is used to store integer exponents -126 ≤ n ≤ 127.
The precision of a floating-point format is the number of positions reserved for binary digits plus one (for the hidden
bit). In the examples considered here the precision is 23+1=24.
The gap between 1 and the next normalized floating-point number is known as machine epsilon. the gap is (1+2-23)-
1=2-23for above example, but this is same as the smallest positive floating-point number because of non-uniform
spacing unlike in the fixed-point scenario.
Note that non-terminating binary numbers can be represented in floating point representation, e.g., 1/3 =
(0.010101 ...)2 cannot be a floating-point number as its binary representation is non-terminating.
IEEE Floating point Number Representation −
IEEE (Institute of Electrical and Electronics Engineers) has standardized Floating-Point Representation as
following diagram.
So, actual number is (-1)s(1+m)x2(e-Bias), where s is the sign bit, m is the mantissa, e is the exponent
value, and Bias is the bias number. The sign bit is 0 for positive number and 1 for negative number.
Exponents are represented by or two’s complement representation.
According to IEEE 754 standard, the floating-point number is represented in following ways:
Half Precision (16 bit): 1 sign bit, 5 bit exponent, and 10 bit mantissa
Single Precision (32 bit): 1 sign bit, 8 bit exponent, and 23 bit mantissa
Double Precision (64 bit): 1 sign bit, 11 bit exponent, and 52 bit mantissa
Quadruple Precision (128 bit): 1 sign bit, 15 bit exponent, and 112 bit mantissa
Special Value Representation −
There are some special values depended upon different values of the exponent and mantissa in the IEEE 754
standard.
All the exponent bits 0 with all mantissa bits 0 represents 0. If sign bit is 0, then +0, else -0.
All the exponent bits 1 with all mantissa bits 0 represents infinity. If sign bit is 0, then +∞, else -∞.
All the exponent bits 0 and mantissa bits non-zero represents denormalized number.
All the exponent bits 1 and mantissa bits non-zero represents error.
Signed Numbers:
Signed numbers contain sign flag, this representation distinguish positive and negative numbers. This
technique contains both sign bit and magnitude of a number. For example, in representation of negative
decimal numbers, we need to put negative symbol in front of given decimal number.
There are three types of representations for signed binary numbers. Because of extra signed bit, binary
number zero has two representation, either positive (0) or negative (1), so ambiguous representation.
But 2’s complementation representation is unambiguous representation because of there is no double
representation of number 0. These are: Sign-Magnitude form, 1’s complement form, and 2’s complement
form which are explained as following below:
(a) Sign-Magnitude form:
For n bit binary number, 1 bit is reserved for sign symbol. If the value of sign bit is 0, then
the given number will be positive, else if the value of sign bit is 1, then the given number
will be negative. Remaining (n-1) bits represent magnitude of the number. Since
magnitude of number zero (0) is always 0, so there can be two representation of number
zero (0), positive (+0) and negative (-0), which depends on value of sign bit. Hence these
representations are ambiguous generally because of two representation of number zero
(0). Generally sign bit is a most significant bit (MSB) of representation. The range of Sign-
Magnitude form is from (2(n-1)-1) to (2(n-1)-1).
For example, range of 6 bit Sign-Magnitude form binary number is from (25-1) to (25-1)
which is equal from minimum value -31 (i.e., 1 11111) to maximum value +31 (i.e., 0
11111). And zero (0) has two representation, -0 (i.e., 1 00000) and +0 (i.e., 0 00000).
1’s complement form:
Since, 1’s complement of a number is obtained by inverting each bit of given number. So, we
represent positive numbers in binary form and negative numbers in 1’s complement form. There is
extra bit for sign representation. If value of sign bit is 0, then number is positive and you can directly
represent it in simple binary form, but if value of sign bit 1, then number is negative and you have to
take 1’s complement of given binary number. You can get negative number by 1’s complement of a
positive number and positive number by using 1’s complement of a negative number. Therefore, in
this representation, zero (0) can have two representation, that’s why 1’s complement form is also
ambiguous form. The range of 1’s complement form is from (2(n-1)-1) to (2(n-1)-1) .
For example, range of 6 bit 1’s complement form binary number is from (25-1) to (25-1) which is
equal from minimum value -31 (i.e., 1 00000) to maximum value +31 (i.e., 0 11111). And zero (0) has
two representation, -0 (i.e., 1 11111) and +0 (i.e., 0 00000).
2’s complement form:
Since, 2’s complement of a number is obtained by inverting each bit of given number plus 1 to least
significant bit (LSB). So, we represent positive numbers in binary form and negative numbers in 2’s
complement form. There is extra bit for sign representation. If value of sign bit is 0, then number is
positive and you can directly represent it in simple binary form, but if value of sign bit 1, then number is
negative and you have to take 2’s complement of given binary number. You can get negative number by 2’s
complement of a positive number and positive number by directly using simple binary representation. If
value of most significant bit (MSB) is 1, then take 2’s complement from, else not. Therefore, in this
representation, zero (0) has only one (unique) representation which is always positive. The range of 2’s
complement form is from (2(n-1)) to (2(n-1)-1).
For example, range of 6 bit 2’s complement form binary number is from (25) to (25-1) which is equal from
minimum value -32 (i.e., 1 00000) to maximum value +31 (i.e., 0 11111). And zero (0) has two
representation, -0 (i.e., 1 11111) and +0 (i.e., 0 00000).
2’s Complement Multiplication :
For 2’s complement multiplication, it always follows the same rules as binary multiplication.
Suppose we want to multiply (- 4)10 with (4)10 that gives (-16)10. Now , (- 4)10 = 1111 1100 in 2’s
complement and (4)10 = 0000 0100 in 2’s complement.
Adders:-
An adder is a device that will add together two bits and give the result as the output. The bits being
added together are called the "addends". Adders can be concatenated in order to add together two
binary numbers of an arbitrary length.
Half Subtractor:
A combinational circuit that performs the subtraction of two bits is called Half Subtractor.
It receives two inputs and produces two outputs Difference and Borrow. The block
diagram of the Half Subtractor is given as
1.Registers:
Two Registers B and Q are used to store multiplicand and multiplier respectively.
Register A is used to store partial product during multiplication.
Sequence Counter register (SC) is used to store number of bits in the multiplier.
2.Flip Flop:
To store sign bit of registers we require three flip flops (A sign, B sign and Q sign).
Flip flop E is used to store carry bit generated during partial product addition.
3.Complement and Parallel adder:
This hardware unit is used in calculating partial product i.e, perform addition required.
Flowchart of Multiplication:
Booth’s Multiplication Algorithm :
Examples:
UNIT : 03
CENTRAL
PROCESSING
UNIT AND INSTRUCTION
MICRO OPERATION
If CPU wants to perform any operation, suppose execution of only one instruction
or even break it down one particular execution phase (like fetch instruction, write
back, decode, operand fetch etc.). CPU cannot perform one operation in one single
step; it performs these operations in multiple small- small steps. These small-small
steps of operations are called micro-operations.
Definition-“The operations executed on values stored in registers are called
as micro-operations." CPU can perform operations on some values (operands),
and these values are stored in memory(registers). Operations made by the CPU to
fetch these values and execute the instruction are micro- operations.
TYPES OF MICRO OPERATION
Types of Micro-operations
1. Arithmetic Micro-operations
2. Logic Micro-Operations
3. Shift Micro-operations
TYPES OF MICRO OPERATION
Arithmetic Micro-operation
1. Arithmetic Micro-operation – In CPU, arithmetic logic unit(ALU) perform various operations, and they can be denoted like this:-
2. Addition: The two operands are stored in different registers, and after addition, the function result is stored in another register.
R1ß R2 + R3
• Subtraction: In subtraction, two operands are stored in different registers, and after subtraction, the function result is stored in another
register.
R1ß R2 - R3
• Compliment: Compliment means every bit of R2 register is flipped 1à0, 0à 1(1 become 0 and 0 becomes 1)
R1 ß R?2?
• 2's complement: 2's compliment is the addition of 1 in the 1's complement of R2 and copy back to R1
R1 ß R?2? + 1
• In addition to 2's compliment: It is adding R2 with 2's complement of R3 with one and copies it to R1.
R1 ßR2 + R?3? + 1
Note: basically, taking 2's compliment means the negation of the number.
2’s compliment of 10 = -10( it denotes that number becomes negative after 2's compliment); therefore, the above statement can be written
as:
R1ß R2 – R3
• Increment – It is just an addition of 1 in R1( increase the value by one).
R1ßR1 +1
• Decrement- It is just a subtraction of 1 in R1( decrease the value by one).
Logic Micro-operations
AND – AND gate is known as a series circuit. R2 and R3 contain two inputs, and the
result is stored in R1.
OR – OR gate, we use the disjunction symbol. Two inputs are stored in R2 and R3
register, and the result is stored in R1.
X-OR – It is like an OR gate, but excluding both inputs are true. X-OR gate has two
inputs in two registers, and the result is stored in R1.
X-NOR- This is an X-OR gate with an inverted output. X-NOR gate has two inputs in
two registers, and the result is stored in R1.
Shift Micro-operations
Logical shift
The logic shift means that we have to shift digits logically from one place to another
place. It is of two types:- Left shift or Right shift.
Left shift:- let suppose a register has 4 bit 1011, and if we shift this value to left, then
the left-most digit is discarded and remaining three are shifted to the left, and the new
digit 0 is added to the number (remember that always 0 is added as a new digit). Now a
new number is 0110 after left shift.
Right-shift - let suppose a register has 4 bit 1011. If we shift
this value to the right, then the rightmost digit is discarded, and remaining three are
shifted to the right, and the new digit 0 is added to the number (remember that always 0
is added as a new digit). Now a new number is 1010 after the right shift.
Circular Shift
TYPES OF CIRCULAR SHIFT
Left circular shift:- let suppose a register has 4 bit 1011, and if we shift this value in
circular, then the left-most digit is not discarded. It is shifted to the rightmost corner,
and the remaining three are shifted to the left. Now a new number is 0111 in the
register after applying the left circular shift.
1011à 0111
Right circular shift:- let suppose a register has 4 bit 1011, and if we shift this value in
circular, then the rightmost digit is not discarded; it is shifted to a left most corner, and
the remaining three are shifted to the right. Now a new number is 1101 in the register
after the right circular shift.
Arithmetic Shift
Types of Arithmetic Shift
Left arithmetic shift: It is the same as a logical left shift, but it is allowed only when
the sign is not going to change. If left arithmetic shift is applied on a negative number
then after shifting that number, answer comes negative, it is allowed by CPU and in
other case too if the number is positive and after shifting that number, answer comes
negative, in some cases it is also not allowed by CPU
Right arithmetic shift: let suppose a register has 4-bit 1011 number and it's a negative
number as M.S.B. of number is 1. If we shift this value, the rightmost digit is
discarded, the remaining three digits are shifted to the right, and to maintain the
sign(negative or positive) of number the left-most digit is copied as M.S.B. ( same to
same). Now the result after the right arithmetic shift is 1101. 1011à 1101
CONTROL UNIT
Control Unit is the part of the computer’s central processing unit (CPU), which directs the
operation of the processor. It was included as part of the Von Neumann Architecture by John
von Neumann. It is the responsibility of the Control Unit to tell the computer’s memory,
arithmetic/logic unit and input and output devices how to respond to the instructions that have
been sent to the processor. It fetches internal instructions of the programs from the main
memory to the processor instruction register, and based on this register contents, the control
unit generates a control signal that supervises the execution of these instructions.
A control unit works by receiving input information to which it converts into control signals,
which are then sent to the central processor. The computer’s processor then tells the attached
hardware what operations to perform. The functions that a control unit performs are dependent
on the type of CPU because the architecture of CPU varies from manufacturer to manufacturer.
Examples of devices that require a CU are:
• Control Processing Units(CPUs)
• Graphics Processing Units(GPUs)
BLOCK DIAGRAM OF CONTROL UNIT
Functions of the Control Unit
In the Hardwired control unit, the control signals that are important for instruction
execution control are generated by specially designed hardware logical circuits, in
which we can not modify the signal generation method without physical change of the
circuit structure. The operation code of an instruction contains the basic data for control
signal generation. In the instruction decoder, the operation code is decoded. The
instruction decoder constitutes a set of many decoders that decode different fields of the
instruction opcode.As a result, few output lines going out from the instruction decoder
obtains active signal values. These output lines are connected to the inputs of the matrix
that generates control signals for executive units of the computer. This matrix
implements logical combinations of the decoded signals from the instruction opcode
with the outputs from the matrix that generates signals representing consecutive control
unit states and with signals coming from the outside of the processor, e.g. interrupt
signals. The matrices are built in a similar way as a programmable logic arrays.
Micro programmable control unit
The fundamental difference between these unit structures and the structure of the
hardwired control unit is the existence of the control store that is used for storing words
containing encoded control signals mandatory for instruction execution.In
microprogrammed control units, subsequent instruction words are fetched into the
instruction register in a normal way. However, the operation code of each instruction is
not directly decoded to enable immediate control signal generation but it comprises the
initial address of a microprogram contained in the control store
COMPONENTS OF CPU
Buses
Functions of Bus:
• It is used to share data between different devices.
• It supplies power to different components of the system.
Registers
The FLAGS register is the status register that contains the current state of
a CPU. The size and meanings of the flag bits are architecture dependent. It
usually reflects the result of arithmetic operations as well as information about
restrictions placed on the CPU operation at the current time.
STACKS
The computers which use Stack-based CPU Organization are based on a data structure
called a stack. The stack is a list of data words. It uses the Last In First Out
(LIFO) access method which is the most popular access method in most of the CPU. A
register is used to store the address of the topmost element of the stack which is known
as Stack pointer (SP). In this organization, ALU operations are performed on stack
data. It means both the operands are always required on the stack. After manipulation,
the result is placed in the stack.
I/O PORTS
Ports: The connection point acts as an interface between the computer and external
devices like printers, modems, etc.
There are two types of ports :
1. Internal Port: It connects the system’s motherboard to internal devices like hard disk,
CD drive, internal Bluetooth, etc.
2. External Port: It connects the system’s motherboard to external devices like a mouse,
printer, USB, etc.
General Register Organization
Addressing Modes– The term addressing modes refers to the way in which the
operand of an instruction is specified. The addressing mode specifies a rule for
interpreting or modifying the address field of the instruction before the operand is
actually executed.
Addressing modes for 8086 instructions are divided into two categories:
1) Addressing modes for data
2) Addressing modes for branch
The 8086 memory addressing modes provide flexible access to memory, allowing you
to easily access variables, arrays, records, pointers, and other complex data types. The
key to good assembly language programming is the proper use of memory addressing
modes.
UNIT : 04
MEMORY
ORGANIZATION
MEMORY ORGANISATION
The main memory acts as the central storage unit in a computer system. It is a
relatively large and fast memory which is used to store programs and data during the
run time operations.
The primary technology used for the main memory is based on semiconductor
integrated circuits. The integrated circuits for the main memory are classified into two
major units.
1. RAM (Random Access Memory) integrated circuit chips
2. ROM (Read Only Memory) integrated circuit chips
STATIC AND DYNAMIC
The secondary storage devices which are built into the computer or connected to the
computer are known as a secondary memory of the computer. It is also known as
external memory or auxiliary storage.
The secondary memory is accessed indirectly via input/output operations. It is non-
volatile, so permanently stores the data even when the computer is turned off or until
this data is overwritten or deleted. The CPU can't directly access the secondary
memory. First, the secondary memory data is transferred to primary memory then the
CPU can access it.
PERFORMANCE CONSIDERATION
There are three different types of mapping used for the purpose of cache memory
which are as follows: Direct mapping, Associative mapping, and Set-Associative
mapping.
Associative Mapping
Associative Mapping
In associative mapping both the address and data of the memory word are stored.
The associative mapping method used by cache memory is very flexible one as well as
very fast.
This mapping method is also known as fully associative cache.
DIRECT MAPPING
Direct Mapping
In direct mapping cache, instead of storing total address information with data in cache
only part of address bits is stored along with data.
The new data has to be stored only in a specified cache location as per the mapping rule
for direct mapping. So it doesn't need replacement algorithm.
Set-Associative Mapping
Set-Associative Mapping
In Set-Associative cache memory two or more words can be stored under the same
index address.
Here every data word is stored along with its tag. The number of tag-data words under
an index is said to form a text.
VIRTUAL MEMORY
Paging is a memory management scheme that eliminates the need for contiguous
allocation of physical memory. This scheme permits the physical address space of a
process to be non – contiguous.
• Logical Address or Virtual Address (represented in bits): An address generated by the
CPU
• Logical Address Space or Virtual Address Space( represented in words or bytes): The
set of all logical addresses generated by a program
• Physical Address (represented in bits): An address actually available on memory unit
• Physical Address Space (represented in words or bytes): The set of all physical
addresses corresponding to the logical addresses
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I/O ORGANIZATION
Peripherals Devices
Peripheral devices are those devices that are linked either internally or externally to a
computer. These devices are commonly used to transfer data. The most common processes
that are carried out in a computer are entering data and displaying processed data. Several
devices can be used to receive data and display processed data. The devices used to
perform these functions are called peripherals or I/O devices
The most common peripherals are a printer, scanner, keyboard, mouse, tape
device, microphone, and external modem that are externally connected to the
computer
The following are some of the commonly used peripherals −
Keyboard
The keyboard is the most commonly used input device. It is used to provide commands to
the computer. The commands are usually in the form of text. The keyboard consists of
many keys such as function keys, numeric keypad, character keys, and various symbols.
Monitor
The most commonly used output device is the monitor. A cable connects the monitor to the
video adapters in the computer’s motherboard. These video adapters convert the electrical
signals to the text and images that are displayed. The images on the monitor are made of
thousands of pixels. The cursor is the characteristic feature of display devices. It marks the
position on the screen where the next character will be inserted.
Printer
Printers provide a permanent record of computer data or text on paper. We can classify printers as impact and non-impact
printers. Impact printers print characters due to the physical contact of the print head with the paper. In non-impact
printers, there is no physical contact.
Magnetic Tape
Magnetic tapes are used in most companies to store data files. Magnetic tapes use a read-write mechanism. The read-write
mechanism refers to writing data on or reading data from a magnetic tape. The tapes sequentially store the data manner.
In this sequential processing, the computer must begin searching at the beginning and check each record until the desired
data is available.
Magnetic tape is the cheapest medium for storage because it can store a large number of binary digits, bytes, or frames on
every inch of the tape. The advantages of using magnetic tape include unlimited storage, low cost, high data density, rapid
transfer rate, portability, and ease of use.
Magnetic Disk
There is another medium for storing data is magnetic disks. Magnetic disks have high-speed rotational surfaces coated with
magnetic material. A read-write mechanism is used to achieve access to write on or read from the magnetic disk. Magnetic
disks are generally used for the volume storage of programs and information.
There are some peripheral devices found in computer systems including digital incremental plotters, optical and magnetic
readers, analog to digital converters, and several data acquisition equipment.
Input-Output Interface
Input-Output Interface is used as an method which helps in transferring of information
between the internal storage devices i.e. memory and the external peripheral device . A
peripheral device is that which provide input and output for the computer, it is also called
Input-Output devices. For Example: A keyboard and mouse provide Input to the computer
are called input devices while a monitor and printer that provide output to the computer
are called output devices. Just like the external hard-drives, there is also availability of
some peripheral devices which are able to provide both input and output.
In micro-computer base system, the only purpose of peripheral devices is just to provide
special communication links for the interfacing them with the CPU. To resolve the
differences between peripheral devices and CPU, there is a special need for communication
links.
1. It is used to synchronize the operating speed of CPU with respect to input-output devices.
2. It selects the input-output device which is appropriate for the interpretation of the input-
output device.
3. It is capable of providing signals like control and timing signals.
4. In this data buffering can be possible through data bus.
5. There are various error detectors.
6. It converts serial data into parallel data and vice-versa.
7. It also convert digital data into analog signal and vice-versa.
Asynchronous Data Transfer Mode :
The internal operations in an individual unit of a digital system are synchronized using clock
pulse. It means clock pulse is given to all registers within a unit. And all data transfer among
internal registers occurs simultaneously during the occurrence of the clock pulse. Now, suppose
any two units of a digital system are designed independently, such as CPU and I/O interface.
If the registers in the I/O interface share a common clock with CPU registers, then transfer
between the two units is said to be synchronous. But in most cases, the internal timing in each
unit is independent of each other, so each uses its private clock for its internal registers. In this
case, the two units are said to be asynchronous to each other, and if data transfer occurs
between them, this data transfer is called Asynchronous Data Transfer.
But, the Asynchronous Data Transfer between two independent units requires that control signals
be transmitted between the communicating units so that the time can be indicated at which they
send data. These two methods can achieve this asynchronous way of data transfer:
Strobe control: A strobe pulse is supplied by one unit to indicate to the other unit when the
transfer has to occur.
Handshaking: This method is commonly used to accompany each data item being transferred
with a control signal that indicates data in the bus. The unit receiving the data item responds with
another signal to acknowledge receipt of the data.
The strobe pulse and handshaking method of asynchronous data transfer is not restricted to I/O
transfer. They are used extensively on numerous occasions requiring the transfer of data between
two independent units. So, here we consider the transmitting unit as a source and receiving unit as
a destination.
Interrupts Handling:-
An interrupt in computer architecture is a signal that requests the processor to suspend its current
execution and service the occurred interrupt. To service the interrupt the processor executes the
corresponding interrupt service routine (ISR). After the execution of the interrupt service routine, the
processor resumes the execution of the suspended program. Interrupts can be of two types of
hardware interrupts and software interrupts.
Types of Interrupts:
Interrupts can be of two types:
1. Hardware Interrupts
2. Software Interrupts
1. Hardware Interrupts
If a processor receives the interrupt request from an external I/O device it is termed as a hardware
interrupt. Hardware interrupts are further divided into maskable and non-maskable interrupt.
Maskable Interrupt: The hardware interrupt that can be ignored or delayed for some time if the
processor is executing a program with higher priority are termed as maskable interrupts.
Non-Maskable Interrupt: The hardware interrupts that can neither be ignored nor delayed and must
immediately be serviced by the processor are termed as non-maske able interrupts.
2. Software Interrupts:
The processor requests a software interrupt upon executing particular instructions or
when certain conditions are met. Every software interrupt signal is associated with a
particular interrupt handler.
Priority Interrupt:
A priority interrupt is a system which decides the priority at which various devices, which generates the
interrupt signal at the same time, will be serviced by the CPU. The system has authority to decide which
conditions are allowed to interrupt the CPU, while some other interrupt is being serviced. Generally,
devices with high speed transfer such as magnetic disks are given high priority and slow devices such as
keyboards are given low priority.
When two or more devices interrupt the computer simultaneously, the computer services the device
with the higher priority first
Direct Memory Access (DMA) :
DMA Controller is a hardware device that allows I/O devices to directly access memory with less
participation of the processor. DMA controller needs the same old circuits of an interface to
communicate with the CPU and Input/Output devices.
Fig-1 below shows the block diagram of the DMA controller. The unit communicates with the CPU
through data bus and control lines. Through the use of the address bus and allowing the DMA and
RS register to select inputs, the register within the DMA is chosen by the CPU. RD and WR are
two-way inputs. When BG (bus grant) input is 0, the CPU can communicate with DMA registers.
When BG (bus grant) input is 1, the CPU has relinquished the buses and DMA can communicate
directly with the memory.
DMA controller registers :
Note –
All registers in the DMA appear to the CPU as I/O interface registers. Therefore,
the CPU can both read and write into the DMA registers under program control via
the data bus
Explanation :
The CPU initializes the DMA by sending the given information through the data bus.
• The starting address of the memory block where the data is available (to read) or where data
are to be stored (to write).
• It also sends word count which is the number of words in the memory block to be read or write.
• Control to define the mode of transfer such as read or write.
• A control to begin the DMA transfer.
Input/Output Processor:
Each IOP controls and manage the input-output tasks. The IOP is similar to CPU
except that it handles only the details of I/O processing. The IOP can fetch and
execute its own instructions. These IOP instructions are designed to manage I/O
transfers only.
Block Diagram Of I/O Processor:
Below is a block diagram of a computer along with various I/O Processors. The memory unit
occupies the central position and can communicate with each processor.
The CPU processes the data required for solving the computational tasks. The IOP provides a
path for transfer of data between peripherals and memory. The CPU assigns the task of
initiating the I/O program.
The IOP operates independent from CPU and transfer data between peripherals and memory
The communication between the IOP and the devices is similar to the program control method of
transfer. And the communication with the memory is similar to the direct memory access
method.
In large scale computers, each processor is independent of other processors and any processor
can initiate the operation.
The CPU can act as master and the IOP act as slave processor. The CPU assigns the task of
initiating operations but it is the IOP, who executes the instructions, and not the CPU. CPU
instructions provide operations to start an I/O transfer. The IOP asks for CPU through interrupt.
Instructions that are read from memory by an IOP are also called commands to distinguish them
from instructions that are read by CPU. Commands are prepared by programmers and are stored
in memory. Command words make the program for IOP. CPU informs the IOP where to find the
commands in memory.
Synchronous Data Transmission :
In synchronous data transmission, data moves in a completely paired approach, in the form of chunks
or frames. The synchronisation between the source and target is required so that the source knows
where the new byte begins since there are no spaces included between the data.
Synchronous transmission is effective, dependable, and often utilised for transmitting a large amount
of data. It offers real-time communication between linked devices.
An example of synchronous transmission would be the transfer of a large text file. Before the file is
transmitted, it is first dissected into blocks of sentences. The blocks are then transferred over the
communication link to the target location.
Because there are no beginning and end bits, the data transfer rate is quicker but there’s an increased
possibility of errors occurring. Over time, the clocks will get out of sync, and the target device would
have the incorrect time, so some bytes could become damaged on account of lost bits. To resolve this
issue, it’s necessary to regularly re-synchronise the clocks, as well as to make use of check digits to
ensure that the bytes are correctly received and translated.
Characteristics of Synchronous Transmission
• There are no spaces in between characters being sent.
• Timing is provided by modems or other devices at the end of the transmission.
• Special ’syn’ characters goes before the data being sent.
• The syn characters are included between chunks of data for timing functions.