CO Unit1
CO Unit1
CO Unit1
Computer Architecture:
Computer architecture is a set of rules and methods that describe the functionality,
organization, and implementation of computer systems. Some definitions of architecture
define it as describing the capabilities and programming model of a computer but not a
particular implementation.
Computer Organization:
The computer organization is concerned with the structure and behaviour of
digital computers. Organizational attributes include those hardware details transparent to the
programmer, such as control signals, interfaces between the computer and peripherals; and
the memory technology used.
1. Central processing unit: CPU is a brain of computer. It controls the computer system.
It converts data to information.
2. Arithmetic and logic unit: This is a part of CPU. It arithmetic unit and another one is
logic unit.
3. Input unit and output unit: This unit controls input and output devices. Input devices
are keyboard, mouse etc and output devices are printer, monitor, plotter, etc.
• CPU/Microprocessor
• Memory Subsystem
• I/O Subsystem
System Buses:
A bus is a communication system in computer architecture that transfers data between
components inside a computer, or between computers. A bus is a group of lines/wires
which carry computer signals.
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MCA Department
Following are the three components of a bus: –
The address bus, a one-way pathway that allows information to pass in one direction
only, carries information about where data is stored in memory.
The data bus is a two-way pathway carrying the actual data (information) to and from
the main memory.
The control bus holds the control and timing signals needed to coordinate all of the
computer’s activities.
Instruction Cycle:
A program residing in the memory unit of a computer consists of a sequence of instructions.
These instructions are executed by the processor by going through a cycle for each
instruction.
In a basic computer, each instruction cycle consists of the following phases:
1. Fetch instruction from memory.
2. Decode the instruction.
3. Execute the instruction.
Instruction Fetch Cycle: In this cycle, the instruction is fetched from the memory
location whose address is in the PC. This instruction is placed in the instruction register
(IR) in the processor.
Instruction Decode Cycle: In this cycle, the opcode of the instruction stored in the
instruction register is decoded/examined to determine which operation is to be performed.
Instruction Execution Cycle: In this cycle, the specified operation is performed by the
processor. This often involves fetching operands from the memory or from processor
registers, performing an arithmetic or logical operation, and storing the result in the
destination location. During the instruction execution, PC contents are incremented to
point to the next instruction. After completion of execution of the current instruction, the
PC contains the address of the next instruction, and a new instruction fetch cycle can
begin.
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MCA Department
Timing diagram for memory read and memory write operation
CPU Organization:
The CPU controls the computer it fetches instructions from the memory, supplying address
and control signals needed by memory to access data. the CPU decodes the instruction and
controls the execution process.
CPU has three sections
1. Register
2. ALU
3. Control Unit
1. Register section:
In this section as its name implies, includes a set of registers and a bus or other
communication mechanism. The registers in a processor instruction set architecture
are found in this section of the CPU. The system address and data buses interact with
this section of the CPU. The register section also contains other registers that are not
accessible by the programmer.
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MCA Department
2. Arithmetic/logic unit:
It performs most arithmetic and logical operations, such as adding and ANDing
values. It receives its operands from the register section of the CPU and stores its
results back in the register section.
3. Control Unit:
CPU controls the computer and control unit controls the CPU. This unit generates the
internal control signal that cause registers to overload, increment or clear their
contents, and output their contents, as well as cause the ALU to perform the correct
function. The control unit also generates the signals for the system control bus such as
READ, WRITE, and IO/M signals.
Memory Subsystem Organization and Interfacing:
In this we discuss about different types of physical memory and the internal organization of
their chips.
Types of Memory:
Computer memory is of two basic type – Primary memory(RAM and ROM) and Secondary
memory(hard drive,CD,etc.). Random Access Memory (RAM) is primary-volatile memory
and Read Only Memory (ROM) is primary-non-volatile memory.
1. RAM
• Static RAM
• Dynamic RAM
2. ROM
• PROM
• EPROM
• EEPROM
Random Access Memory (RAM):
It is also called as read write memory or the main memory or the primary memory.
The programs and data that the CPU requires during execution of a program are stored
in this memory.
It is a volatile memory as the data loses when the power is turned off.
Random Access Memory (RAM) is classified into two types. They are
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DRAM (Dynamic Random Access Memory) – DRAM Is commonly used as the main
memory for the computer. Inside an integrated circuit, each DRAM memory cell
consists of a transistor and a capacitor and a data bit is stored in the capacitor.
Because transistors often leak a small amount, the condensers gradually discharge,
allowing the information stored in it to drain thus, DRAM has to be refreshed every
few milliseconds (given a new electronic charge) to maintain data.
SRAM (Static Random Access Memory) – SRAM is composed of 4 to 6 transistors.
It holds data in the memory as long as power is supplied to the device, unlike DRAM,
which needs to be regularly refreshed. As such, SRAM is more costly but quicker,
making DRAM the more widespread memory in computer systems.
2. Read Only Memory (ROM):
Stores crucial information essential to operate the system, like the program essential to
boot the computer.
It is not volatile.
Always retains its data.
Used in embedded systems or where the programming needs no change.
Used in calculators and peripheral devices.
Read-Only Memory has three types in it. They are
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Peripheral Devices:
Input or output devices that are connected to computer are called peripheral devices. These
devices are designed to read information into or out of the memory unit upon command from
the CPU and are considered to be the part of computer system. These devices are also
called peripherals.
For example: Keyboards, display units and printers are common peripheral devices.
There are three types of peripherals:
1. Input peripherals: Allows user input, from the outside world to the computer.
Example: Keyboard, Mouse etc.
2. Output peripherals: Allows information output, from the computer to the outside
world. Example: Printer, Monitor etc
3. Input-Output peripherals: Allows both input(from outised world to computer) as
well as, output(from computer to the outside world). Example: Touch screen etc.
Input-Output Interface:
Peripherals connected to a computer need special communication links for interfacing with
CPU. In computer system, there are special hardware components between the CPU and
peripherals to control or manage the input-output transfers. These components are
called input-output interface units because they provide communication links between
processor bus and peripherals. They provide a method for transferring information between
internal system and input-output devices.
An input device: a) with its interface b) The enable logic for tri-state buffer
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MCA Department
Relatively Simple Computer Organization - Memory Details:
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Relatively Simple Computer Organization - Final Design:
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MCA Department
8085-based Computer Specifications:
8085-based Computer Specifications are
• 2K EPROM starting at 0000H
• 256 bytes RAM starting at 2000H
• Four 8-bit I/O ports at 00H, 01H, 19H, and 1AH
• One 6-bit I/O port at 1BH
In 8085 instead of having 16 address pins and 8 data pins the 8085 has 8 multiplexed pins
for both the data bits and low order eight bits of the address bus. The pins are labeled AD7
through AD0. During the first clock cycle of the memory access, these pins contains lower
half of the address. For the rest of the memory access, they are used to transmit or receive
data. This was done to minimize the number of pins on the microprocessor chip. This won’t
work without additional circuitry. Memory needs to have the entire address available for
this we have ALE (address latch enable). This signal is set to logic 1 during first clock
cycle of memory or I/O access, and 0 for the duration of the access. It is used to load a
register with the lower order address bits so they will be available from the register even
after they are removed from the AD pins. This is called demultiplexing the bus.
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MCA Department
8085-based Computer Organization
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MCA Department