Capitulo 4

Electrónica: Teoría de Circuitos y Dispositivos
Electrónicos
Robert L. Boylestad y Louis Nashelsky
Polarizado DC de Transistores de Unión

Bipolar (BJT)
Capítulo 4
Electrónica I (EM-0520)
Profesor: Ing. Adolfo Santana

FIGURE 12-8 Makeup of Darlington transistor.
Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
All rights reserved.
FIGURE 12-9 Specification information on Darlington transistor package (2N999).
FIGURE 12-7 Practical cascode circuit for Example 12.4.
FIGURE 4-70a Relay driver: absence of protective device.
FIGURE 12-10 Basic Darlington bias circuit.
FIGURE 12-10 Basic Darlington bias circuit.
FIGURE 12-7 Practical cascode circuit for Example 12.4.
FIGURE 4-70b Relay driver: with a diode across the relay coil. (continued)
FIGURE 4-71a Using the transistor as a switch to control the on-off states of a bulb: network.
FIGURE 4-71b Using the transistor as a switch to control the on-off states of a bulb: effect of low bulb resistance on collector current.
(continued)
FIGURE 4-71c Using the transistor as a switch to control the on-off states of a bulb: limiting resistor. ( continued)
FIGURE 4-72a Building a constant-current source assuming ideal BJT characteristics: ideal characteristics.
FIGURE 4-72b Building a constant-current source assuming ideal BJT characteristics: network. (continued)
FIGURE 4-72c Building a constant-current source assuming ideal BJT characteristics: demonstrating why IC remains constant. ( continued)
FIGURE 4-73 Network establishing a fairly constant current source due to its reduced sensitivity to changes in beta.
FIGURE 4-75 LM2900 operational amplifier: (a) dual-in-line package (DIP); (b) components; (c)impact of low-input impedance.
FIGURE 4-76 Points of operation for a BJT logic gate.
FIGURE 4-77 BJT logic gates: (a) OR; (b) AND.
FIGURE 4-78 current mirror using back-to-back BJTs.
FIGURE 4-79 Base characteristics for transistor Q1 (and Q2).
FIGURE 4-80 Voltage level indicator.
FIGURE 4-89 Problems 5, 10, 19, 35, 36
FIGURE 4-90 Problems 6, 9, 11, 48, 51, 54
FIGURE 4-91 Problem 7
FIGURE 4-93 Problems 12, 15, 18, 20, 24, 49, 51, 52, 55
FIGURE 4-96 Problems 16, 17, 21
FIGURE 4-97 Problems 22, 56
FIGURE 4-109a Problem 39
FIGURE 4-109b Problem 39
FIGURE 4-109c Problem 39

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Electrónica: Teoría de Circuitos y Dispositivos

Polarizado DC de Transistores de Unión

Profesor: Ing. Adolfo Santana

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