Cap 4 A

Chapter 4
DC Biasing–BJTs
Biasing
Biasing: The DC voltages applied to a transistor in

order to turn it on so that it can amplify the AC signal.
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Operating Point
The DC input
establishes an
operating or
quiescent point
called the Q-point.
The Three States of Operation
• Active or Linear Region Operation

Base–Emitter junction is forward biased
Base–Collector junction is reverse biased
• Cutoff Region Operation

Base–Emitter junction is reverse biased
Base–Collector junction is reverse biased
• Saturation Region Operation

Base–Emitter junction is forward biased
Base–Collector junction is forward biased
DC Biasing Circuits
• Fixed-bias circuit
• Emitter-stabilized bias circuit
• Collector-emitter loop
• Voltage divider bias circuit
• DC bias with voltage feedback
Fixed Bias
The Base-Emitter Loop
From Kirchhoff’s voltage

law:
+VCC – IBRB – VBE = 0
Solving for base current:
VCC − VBE
IB =
RB
Collector-Emitter Loop
Collector current:
I C = I B
From Kirchhoff’s voltage law:
VCE = VCC − I C R C
Saturation
When the transistor is operating in saturation, current

through the transistor is at its maximum possible value.
VCC
I Csat =
RC
VCE  0 V
Load Line Analysis
The end points of the load line are:

ICsat
IC = VCC / RC
VCE = 0 V
VCEcutoff
VCE = VCC
IC = 0 mA
The Q-point is the operating point:

• where the value of RB sets the value of
IB
• that sets the values of VCE and IC
Circuit Values Affect the Q-Point
more …
more …
Emitter-Stabilized Bias Circuit
Adding a resistor
(RE) to the emitter
circuit stabilizes
the bias circuit.
Base-Emitter Loop

+ VCC - I E R E - VBE - I E R E = 0
Since IE = ( + 1)IB:
VCC - I B R B - ( + 1)I B R E = 0
Solving for IB:

VCC - VBE
IB =
R B + ( + 1)R E
I R +V +I R −V =0
E E CE C C CC
Since IE  IC:
VCE = VCC – I C (RC + R E )
Also:
VE = I E R E
VC = VCE + VE = VCC - I C R C
VB = VCC – I R R B = VBE + VE
Improved Biased Stability
Stability refers to a circuit condition in which the currents and voltages

will remain fairly constant over a wide range of temperatures and
transistor Beta () values.
Adding RE to the emitter improves the stability of a transistor.
Saturation Level
The endpoints can be determined from the load line.

VCEcutoff: ICsat:
VCE = VCC VCE = 0 V
I C = 0 mA VCC
IC =
RC + RE
Voltage Divider Bias
This is a very stable

bias circuit.
The currents and

voltages are nearly
independent of any
variations in .
Approximate Analysis
Where IB << I1 and I1  I2 :
R 2 VCC
VB =
R1 + R 2
IB = IC
Where RE > 10R2:

VE
IE =
RE
VE = VB − VBE
VCE = VCC − I CRC − I E R E

IE  IC
VCE = V CC −I C (R C + R E )
Voltage Divider Bias Analysis
Transistor Saturation Level

V CC
I Csat = I Cmax =
RC + RE
Load Line Analysis

Cutoff: Saturation:
VCC
VCE = VCC IC =
RC + RE
I C = 0mA
VCE = 0V
En resumen….
VB =
(VCC )R 2 R1 R3
R1 + R 2 Vcc
5% 5%
150kOhm 10kOhm
24 V Vsalida
VE = VB − VBE
*
C
B XMM1
VE VR 4 Ventrada Q1
IE = =  IC 2N2222A
R4 R4 E
VR 3 = (I C )(R3 ) R2 R4
5% 5%
10kOhm 1kOhm
VC = VCC − VR3
I E  IC
VCE = VC − VE VCE = V CC −I C (R 3 + R 4 )
DC Bias with Voltage Feedback
Another way to
improve the stability
of a bias circuit is to
add a feedback path
from collector to
base.
In this bias circuit

the Q-point is only
slightly dependent on
the transistor beta, .
Base-Emitter Loop
VCC – IC R C – I B R B – VBE – I E R E = 0
Where IB << IC:

I' = I + I  I
C C B C
Knowing IC = IB and IE  IC, the loop

equation becomes:
VCC – I B R C − I B R B − VBE − I B R E = 0
Solving for IB:

VCC − VBE
IB =
R B + (R C + R E )
Applying Kirchoff’s voltage law:
IE + VCE + I’CRC – VCC = 0

Since IC  IC and IC = IB:
IC(RC + RE) + VCE – VCC =0
Solving for VCE:
VCE = VCC – IC(RC + RE)
Base-Emitter Bias Analysis
Transistor Saturation Level

V CC
I Csat = I Cmax =
RC + RE
Load Line Analysis

Cutoff: Saturation:
V
VCE = VCC I = CC
C R +R
I C = 0 mA C E
VCE = 0 V
Transistor Switching Networks
Transistors with only the DC source applied can be used

as electronic switches.
Switching Circuit Calculations
Saturation current:
VCC
I Csat =
RC
To ensure saturation:
I
I B  Csat
 dc
Emitter-collector resistance
at saturation and cutoff:
VCEsat
R sat =
I Csat
VCC
R cutoff =
I CEO
Switching Time
Transistor switching times:
t on = t r + t d
t off = t s + t f
Troubleshooting Hints
• Approximate voltages
– VBE  .7 V for silicon transistors
– VCE  25% to 75% of VCC
• Test for opens and shorts with an ohmmeter.
• Test the solder joints.
• Test the transistor with a transistor tester or a curve tracer.
• Note that the load or the next stage affects the transistor operation.
PNP Transistors
The analysis for pnp transistor biasing circuits is the same

as that for npn transistor circuits. The only difference is that
the currents are flowing in the opposite direction.

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Chapter 4

Biasing: The DC voltages applied to a transistor in

• Active or Linear Region Operation

• Cutoff Region Operation

• Saturation Region Operation

From Kirchhoff’s voltage

Solving for base current:

From Kirchhoff’s voltage law:

When the transistor is operating in saturation, current

The end points of the load line are:

The Q-point is the operating point:

From Kirchhoff’s voltage law:

Solving for IB:

Stability refers to a circuit condition in which the currents and voltages

Adding RE to the emitter improves the stability of a transistor.

The endpoints can be determined from the load line.

This is a very stable

The currents and

Where RE > 10R2:

From Kirchhoff’s voltage law:

VCE = VCC − I CRC − I E R E

Transistor Saturation Level

Load Line Analysis

In this bias circuit

Where IB << IC:

Knowing IC = IB and IE  IC, the loop

Solving for IB:

Applying Kirchoff’s voltage law:

IE + VCE + I’CRC – VCC = 0

IC(RC + RE) + VCE – VCC =0

Solving for VCE:

VCE = VCC – IC(RC + RE)

Transistor Saturation Level

Load Line Analysis

Transistors with only the DC source applied can be used

Transistor switching times:

The analysis for pnp transistor biasing circuits is the same

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