0memory Hierarchy

Amity School of Engineering & Technology
Amity School of
Engineering &
B. Tech. (CSE), V Semester
Technology
Computer Architecture
Jitendra Rajpurohit
Module IV
Memory Organization and Input

Output Organization
Memory Organization
• Memory Hierarchy
• Main Memory
• Auxiliary Memory
• Associative Memory
• Cache Memory
• Virtual Memory
Memory Hierarchy
• The memory unit is an essential component in any digital
computer since it is needed for storing programs and data
• Not all accumulated information is needed by the CPU at the same

time
• Therefore, it is more economical to use low-cost storage devices to
serve as a backup for storing the information that is not currently used
by CPU
Memory Hierarchy
• The memory unit that directly communicate with CPU is
called the main memory
• Devices that provide backup storage are called auxiliary

memory
• The memory hierarchy system consists of all storage devices

employed in a computer system from the slow by high-
capacity auxiliary memory to a relatively faster main memory,
to an even smaller and faster cache memory
Memory Hierarchy
• The main memory occupies a central position by being able to
communicate directly with the CPU and with auxiliary memory devices
through an I/O processor
• A special very-high-speed memory called cache is used to increase the
speed of processing by making current programs and data available to the
CPU at a rapid rate
Memory Hierarchy
• CPU logic is usually faster than main memory access time,

with the result that processing speed is limited primarily by the
speed of main memory
• The cache is used for storing segments of programs currently
being executed in the CPU and temporary data frequently
needed in the present calculations
• The typical access time ratio between cache and main memory
is about 1to7
• Auxiliary memory access time is usually 1000 times that of
main memory
Memory Hierarchy
Auxiliary memory
Magnetic
tapes I/O Main
processor memory
Magnetic
disks
CPU Cache
memory
Register
Memory Hierarchy is to obtain the
highest possible access speed while Cache
minimizing the total cost of the
memory system Main Memory
Magnetic Disk
Magnetic Tape
Main Memory
• Most of the main memory in a general purpose computer is

made up of RAM integrated circuits chips, but a portion of the
memory may be constructed with ROM chips
• RAM– Random Access memory

– Integrated RAM are available in two possible operating modes, Static
and Dynamic
• ROM– Read Only memory
Random-Access Memory (RAM)

• Static RAM (SRAM)
– Each cell stores bit with a six-transistor circuit.
– Retains value indefinitely, as long as it is kept powered.
– Relatively insensitive to disturbances such as electrical noise.
– Faster and more expensive than DRAM.
• Dynamic RAM (DRAM)

– Each cell stores bit with a capacitor and transistor.
– Value must be refreshed every 10-100 ms.
– Sensitive to disturbances.
– Slower and cheaper than SRAM.
SRAM vs DRAM
Tran. Access
per bit time Persist? Sensitive? Cost Applications
SRAM 6 1X Yes No 100x cache memories
DRAM 1 10X No Yes 1X Main memories,

frame buffers
ROM
• ROM is used for storing programs that are PERMANENTLY
resident in the computer and for tables of constants that do
not change in value once the production of the computer is
completed
• The ROM portion of main memory is needed for storing an

initial program called bootstrap loader, witch is to start the
computer software operating when power is turned off
Main Memory
• A RAM chip is better suited for communication with the

CPU if it has one or more control inputs that select the chip
when needed
• The Block diagram of a RAM chip is shown next slide, the

capacity of the memory is 128 words of 8 bits (one byte) per
word
RAM
ROM
Memory Address
Map
• Memory Address Map is a pictorial representation of
assigned address space for each chip in the system
• To demonstrate an example, assume that a computer system

needs 512 bytes of RAM and 512 bytes of ROM
• The RAM have 128 byte and need seven address lines, where
the ROM have 512 bytes and need 9 address lines
Memory Address
Map
Memory Address
Map
• The hexadecimal address assigns a range of hexadecimal
equivalent address for each chip
• Line 8 and 9 represent four distinct binary combination to

specify which RAM we chose
• When line 10 is 0, CPU selects a RAM. And when it’s 1, it

selects the ROM
Memory Connection to CPU

-RAM and ROM chips are connected to a CPU through the
data and address buses
-The low-order lines in the address bus select the byte within
the chips and other lines in the address bus select a particular
chip through its chip select inputs
Connection of Memory to CPU
CPU
Address bus
16-11 10 9 7-1 Data bus
8 RD
WR
Decoder
3 2 1 0
CS1
CS2
Data
RD 128 x 8
RAM 1
WR
AD7
CS1
CS2
Data
RD 128 x 8
WR RAM 2
AD7
CS1
Data
128 x 8
CS2 RAM 3
RD
CS1
WR
CS2
Data
RD 128 x 8
AD7
WR RAM 4
AD7
CS1
512 x 8
Data
1- 7 CS2
8 ROM
9 }

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Amity School of Engineering & Technology

Memory Organization and Input

• Not all accumulated information is needed by the CPU at the same

• Devices that provide backup storage are called auxiliary

• The memory hierarchy system consists of all storage devices

• CPU logic is usually faster than main memory access time,

• Most of the main memory in a general purpose computer is

• RAM– Random Access memory

Random-Access Memory (RAM)

• Dynamic RAM (DRAM)

SRAM 6 1X Yes No 100x cache memories

DRAM 1 10X No Yes 1X Main memories,

• The ROM portion of main memory is needed for storing an

• A RAM chip is better suited for communication with the

• The Block diagram of a RAM chip is shown next slide, the

• To demonstrate an example, assume that a computer system

• Line 8 and 9 represent four distinct binary combination to

• When line 10 is 0, CPU selects a RAM. And when it’s 1, it

Memory Connection to CPU

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