Computer and Data Security 4 Class: Dr. Ashwaq Mahmood Alabaichi 2015-2016 Lec.9
Computer and Data Security 4 Class: Dr. Ashwaq Mahmood Alabaichi 2015-2016 Lec.9
Computer and Data Security 4 Class: Dr. Ashwaq Mahmood Alabaichi 2015-2016 Lec.9
Security
4th Class
Dr. Ashwaq Mahmood Alabaichi
2015-2016
lec.9
The Vernam Cipher
It was published in 1926 by Vernam.
The Vernam cipher is defined by
◦ the plaintext is a bitstring: an element of {0, 1} n
◦ the secret key is a uniformly distributed element of {0, 1} n
◦ the ciphertext is C= P ⊕ K where ⊕ is the bitwise XOR
◦ the plaintext is P= C ⊕ K
The key is aimed at being used for only one plaintext. For this reason this cipher is
also known as one-time pad.
A one-time pad can be shown to be theoretically unbreakable.
The drawbacks of this cipher are that
the key must be at least as long as the plaintext,
it becomes insecure if a key is used twice,
the security is when the key source is truly random,
Stream Cipher
A stream cipher is a symmetric key cipher where plaintext bits are combined with a
pseudorandom bit generator (keystream).
typically by an exclusive-or (XOR) operation. In a stream cipher the plaintext are
encrypted one at a time.
Stream ciphers typically are executed at a higher speed than block ciphers.
Linear Feedback Shift Register(LFSR)
A feedback shift register is made up of two parts: a shift register
and a feedback function
The shift register is a sequence of bits. (The length of a shift
register is figured in bits; if it is n bits long, it is called an n-bit shift
register.)
Each time a bit is needed, all of the bits in the shift register are
shifted 1 bit to the right.
The new left-most bit is computed as a function of the other bits in
the register. The output of the shift register is 1 bit, often the least
significant bit.
The period of a shift register is the length of the output sequence
before it starts repeating.
Cont…
Feedback shift register.
output
-
1
1
1
1
0
1
0
1
1
0
0
1
0
0
0
output
0001
1000 1
1100 0
1110 0
1111 0
0111 1
1011 1
0101 1
1010 1
1101 0
0110 1
0011 0
1001 1
0100 1
0010 0
0001 0
1
100011110101100
Cont …
4-bit LFSR tapped as 1101 with initial state 0001
what is the polynomial?
T(r) = r4 + r3 + r+1 and the I0= 0001
output
0001
1000 1
1100 0
0110 0
1011 0
0101 1
0010 1
0001 0
1
Output:10001101