8051 Microcontroller
8051 Microcontroller
8051 Microcontroller
0 1 Bank1 (08H-0FH)
1 0 Bank2 (10H-17H)
1 1 Bank3 (18H-1FH)
• F0 (Flag 0)
• This is a general-purpose user defined flag the use of this flag is decided by the user.
• AC (Auxiliary Carry Flag)
• It is used for BCD operations only. This flag is set to ‘1’ when in the addition the carry is
transferred from bit B3 to B4 and in subtraction the borrow was transferred from bit B4 to
B3.
• CY (Carry Flag)
• This flag is set to ‘1’ when in the addition operation the final carry is generated or in
subtraction operation the Minuend is less than the Subtrahend.
• PC (Program Counter)
• It holds the next instruction byte address of the program memory
• DPTR (Data Pointer)
• It is made up of two 8-bit registers those are DPH & DPL. This register gives the addresses of
internal and external memories for data access. The DPTR has two independent internal
addresses, one for DPL and another for DPH.
• Internal Memory
• The 8051 Microcontroller has internal program memory (PROM) and internal data memory
(RAM). Due to this 8051 has a Harvard architecture, which uses a same address in different
memories, for code and data.
• Internal RAM
• The 8051 microcontroller has 128 bytes of internal RAM, its address range from 00H to
07FH. From 80H to 0FFH addresses are assigned to SFRs (Special Function Registers).
• The internal RAM 128Bytes can divide into three parts.
Those are
• Register Banks – 32 Bytes (00H – 1FH)
• Bit/Byte addressable memory – 16 Bytes (20H – 2FH)
• User memory or General purpose memory—80 Bytes (30H – 7FH)
INTERNAL RAM
• Bit / Byte Addressable Memory General Purpose Memory
• Mode-2 Operation
• This is an 8-bit counter/timer operation. Counting is performed in TLX while THX
store a constant value.
• Mode-3 Operation
• Timer 1 in Mode-3 simply holds its count. The effect is same as setting TR1=0.
Timer0 in mode-3 establishes TL0 and TH0 as two separate counters.
• Control bits TR1 and TF1 are used by Timer-0 (TH0) and TR0 and TF0 are available
to Timer-0 (TL0).
Interrupts in 8051
• 8051 provides 5 vectored interrupts. They are –
• INTO’
• TF0
• TF1
• INT1’
• RI/TI
• INTO’ and INT1’ are external interrupts whereas Timer and Serial port
interrupts are generated internally.
• Interrupt Enable register (IE)
• Its internal address is A8H. It is bit addressable register
.
PRIORITY STRUCTURE
• Each interrupt source can be programmed to have one of the two
priority levels by setting (high priority) or clearing (low priority) a bit
in the IP (Interrupt Priority) Register.
• A low priority interrupt can itself be interrupted by a high priority
interrupt, but not by another low priority interrupt.
• 4. Branching Instructions
• These instructions are also called as Transfer of control Instructions, or
Program flow control instructions.
• By using these instructions the program flow control is transferred from
one location to another location conditionally or unconditionally.
• Basically these are two types of instructions
A. Unconditional Branching Instructions
B. Conditional Branching Instructions