I/O devices (Peripherals)

 Examples: switches, LED, LCD, printers,

keyboard, keypad
 Interface chips
 are needed to resolve the speed problem
 synchronizes data transfer between CPU and I/O
device
 Connection of Interface and CPU
 Data pins are connected to CPU data bus
 I/O port pins are connected to I/O device
 CPU may be connected to multiple interface
 IO ports are simplest interface
hsabaghianb @ kashanu.ac.ir Microprocessors 6-2
 I/O Interfacing
 Dedicated instructions for IO operations
(Isolated I/O)

 same instruction for memory and IO

(memory-mapped I/O)

 MCS-51 (8051) is memory mapped

hsabaghianb @ kashanu.ac.ir Microprocessors 6-3

 Synchronization of CPU
and interface chip

 To make sure that there are valid data in the

interface
 two ways
 Polling method: Read status bit - Simple method

 Interrupt driven method: interface interrupts

the CPU when it has new data - CPU executes the
ISR

hsabaghianb @ kashanu.ac.ir Microprocessors 6-4

 Synchronization of CPU
and interface chip

 Output synchronization: two ways of doing this

1. Polling method
 interface chip uses a status bit to indicate that the data
register is empty
 CPU keeps checking status bit until it is set, and then writes
data into interface chip
2. Interrupt driven method: interface chip interrupts
the CPU when it data register is empty. CPU executes
the ISR

hsabaghianb @ kashanu.ac.ir Microprocessors 6-5

 Synchronization of CPU
and interface chip
 Methods used to synchronize data transfer between interface
chip and I/O devices:
1. Brute force method: interface chip returns voltage levels in its
input ports to CPU and makes data written by CPU directly
available on its output ports
 All 8051 port can perform brute force I/O
2. Strobe method:
 During input, the I/O device activates a strobe signal when data are
stable. Interface chip latches the data
 For output, interface chip places output data on output port. when
data is stable, it activates a strobe signal. I/O device latches the
data
3. Handshake method: two handshake signals are needed
 One is asserted by interface chip and the other by I/O device

hsabaghianb @ kashanu.ac.ir Microprocessors 6-6

 8051 - Switch On I/O Ports

 Case-1:
 Gives a logic 0 on switch close
 Current is 0.5ma on switch close

 Case-2:
 Gives a logic 1 on switch close
 High current on switch close
 Case-3:
 Can damage port if 0 is output

hsabaghianb @ kashanu.ac.ir Microprocessors 6-7

 Simple input devices
 DIP switches usually have 8 switches
 Use the case-1 from previous page
 Sequence of instructions to read is:

MOV P1,#FFH
MOV A,P1,

hsabaghianb @ kashanu.ac.ir Microprocessors 6-8

 Bouncing contacts
 Contact:
 Push-button switches
 Toggle switches
 Electromechanical relays
 Make and break Contact normally open switch
 The effect is called "contact bounce" or, in a
switch, "switch bounce”.

 If used as edge-triggered input (as INT0),

several interrupt is accorded

hsabaghianb @ kashanu.ac.ir Microprocessors 6-9

 Hardware Solution

 An RC time constant to suppress the bounce

 The time constant has to be larger than the switch bounce

Vcc

OUT

hsabaghianb @ kashanu.ac.ir Microprocessors 6-10

 Hardware Solution

hsabaghianb @ kashanu.ac.ir Microprocessors 6-11

 Software Solution

 Read the new state of switch N time

 Wait-and-see technique
 When the input drops
 an “appropriate” delay is executed (10 ms)
 then the value of the line is checked again to make
sure the line has stopped bouncing

hsabaghianb @ kashanu.ac.ir Microprocessors 6-12

 Interfacing a Keypad
16 keys arranged as a 4X4 matrix
 Place a 0 on R0 port
 Read C port
F E D
 If there is a 0 bit C

then the button

R 1
B A 9 8 R 2
at the column/row R
R
3
4
intersection has 7 6 5 4

been pressed. 3 2 1 0
 Otherwise, try next row
C 1
 Repeat constantly C
C
2
3
C 4

hsabaghianb @ kashanu.ac.ir Microprocessors 6-13

 Interfacing a Keypad

scan: mov P1,#EFH

jnb P1.0,db_0
scan1: jnb P1.1,db_1
scan2: jnb P1.2,db_2 F E D C 8051
scan3: jnb P1.3,db_3
P1.7
scan4: mov P1,#DFH B A 9 8 P1.6
jnb P1.0,db_4 P1.5
P1.4
….. 7 6 5 4
…..
3 2 1 0
…..

P1.3
P1.2
P1.1
P1.0

hsabaghianb @ kashanu.ac.ir Microprocessors 6-14

 Interfacing a Keypad
db_0: lcall wt_10ms
jb P1.0, scan1
mov A, #0
ljmp get_code
db_1: lcall wt_10ms
jb P1.1, scan2
mov A, #1
ljmp get_code
…..
…
…..
get_code: mov DPTR, #key_tab
movc A, @A+DPTR
ljmp scan
key_tab: db ‘0123456789ABCDEF’
END

hsabaghianb @ kashanu.ac.ir Microprocessors 6-15

 Simple output devices
 Case-1
 LED is ON if output=zero
 Most LEDs drop 1.7 volts and need about 10ma
 Current is (5-1.7)/470
 Case-2
 Too much current
 Failure of Port or LED
 Case-3
 Not enough drive (1ma)
 LED is too dim

hsabaghianb @ kashanu.ac.ir Microprocessors 6-16

 The 7-Segment Display

 7 LEDs arranged to form the number 8.

 By turning on and off (LEDs), different
combinations can be produced.
 useful for displaying the digits 0 through 9, and
some characters.

f b
g

e c
d

hsabaghianb @ kashanu.ac.ir Microprocessors 6-17

 The 7-segment Display (Cont.)

 7-segment displays come in 2 configurations:

Common Anode Common Cathode

Connect cathode to the output Connect cathode to the output

 Therefore, the common anode variety would

be better for our interfacing needs.

hsabaghianb @ kashanu.ac.ir Microprocessors 6-18

 Interfacing a 7-segment display
 A resistor will be needed to control the current
 This leaves two possibilities:

 Case 2 would be more appropriate

 Case 1 will produce different brightness depending on the
number of LEDs turned on.
hsabaghianb @ kashanu.ac.ir Microprocessors 6-19
 Use of current buffer
 Interfacing to a DIP switch and 7-segment display
 Output a ‘1’ to ON a segment
 We can use 74244 to common cathode 7_seg

hsabaghianb @ kashanu.ac.ir Microprocessors 6-20

 BCD to 7_Seg lookup table
BCD pgfedcba he
7_seg x
mov a,p3
0000 001111 11 3f
anl a,0fh
0001 00110000 30
get_code: mov DPTR, #7s_tab
0010 0101101 1 5b
movc A, @A+DPRT
mov p1,a 0011 010011 11 4f
0100 011001 10 66
7s_tab: db 3fh,30h,5bh,4fh,66h 0101 01101101 6d
db 6dh,7dh,07h,7fh,6fh 0110 01111101 7d
END 0111 00000111 07
1000 01111111 7f
1001 01101111 6f
a a a a a a a a
f b f b b f b f f b f b f b
g g g g g g g
e c e e c c c e c c e c c
d d d d d d d

hsabaghianb @ kashanu.ac.ir Microprocessors 6-21

 LCD Interfacing
 Liquid Crystal Displays (LCDs)
 cheap and easy way to display text
 Various configurations (1 line by 20 X char up to 8 lines X 80)
 Integrated controller
 The display has two register
 command register
 data register

 By RS you can select register

 Data lines (DB7-DB0) used to transfer data and commands

hsabaghianb @ kashanu.ac.ir Microprocessors 6-22

 Alphanumeric LCD Interfacing
Microcontrolle
r
 Pinout
E
 8 data pins D7:D0 communications
bus
R/W
 RS: Data or Command
Register Select
RS

 R/W: Read or Write DB7–DB0

 E: Enable (Latch data) 8

LCD
controller

 RS – Register Select
LCD Module
 RS = 0  Command Register
 RS = 1  Data Register
 R/W = 0  Write , R/W = 1  Read
 E – Enable
 Used to latch the data present on the data pins.

 D0 – D7
 Bi-directional data/command pins.
 Alphanumeric characters are sent in ASCII format.

hsabaghianb @ kashanu.ac.ir Microprocessors 6-23

 LCD Commands

 The LCD’s internal controller can accept several

commands and modify the display accordingly.
Such as:
 Clear screen
 Return home
 Decrement/Increment cursor

 After writing to the LCD, it takes some time for it to

complete its internal operations. During this time, it
will not accept any new commands or data.
 We need to insert time delay between any two commands or
data sent to LCD

hsabaghianb @ kashanu.ac.ir Microprocessors 6-24

 Pin Description

hsabaghianb @ kashanu.ac.ir Microprocessors 6-25

 Command
Codes

hsabaghianb @ kashanu.ac.ir Microprocessors 6-26

 LCD Addressing

hsabaghianb @ kashanu.ac.ir Microprocessors 6-27

 LCD Timing

hsabaghianb @ kashanu.ac.ir Microprocessors 6-28

hsabaghianb @ kashanu.ac.ir Microprocessors 6-29
 Interfacing LCD with 8051
8051

LM015
P3.4
RW
P3.5 E

P3.3 RS

P1.7-P1.0 D7-D0

hsabaghianb @ kashanu.ac.ir Microprocessors 6-30

 mov A, command

Interfacing LCD
call cmd
delay
mov A, another_cmd
call cmd
delay with 8051
mov A, #’A’
call data
delay
mov A, #’B’
call data
delay
….
Command and Data Write Routines
data:mov P1, A ;A is ascii data
setb P3.3 ;RS=1 data
clr P3.4 ;RW=0 for write
setb P3.5 ;H->L pulse on E
clr P3.5
ret
cmd:mov P1,A ;A has the cmd word
clr P3.3 ;RS=0 for cmd
clr P3.4 ;RW=0 for write
setb P3.5 ;H->L pulse on E
clr P3.5
ret

hsabaghianb @ kashanu.ac.ir Microprocessors 6-31

 Example

hsabaghianb @ kashanu.ac.ir Microprocessors 6-32

 8255 Usage: Simple Example
 8255 memory mapped to 8051 at address C000H base
 A = C000H, B = C001H, C = C002H, CR = C003H
 Control word for all ports as outputs in mode0
 CR : 1000 0000b = 80H

test: mov A, #80H ; control word

mov DPTR, #C003H ; address of CR
movx @DPTR, A ; write control word
mov A, #55h ; will try to write 55 and AA

; alternatively
repeat:mov DPTR,#C000H ; address of PA
movx @DPTR, A ; write 55H to PA
inc DPTR ; now DPTR points to PB
movx @DPTR, A ; write 55H to PB
inc DPTR ; now DPTR points to PC
movx @DPTR, A ; write 55H to PC
cpl A ; toggle A (55AA, AA55)
acall MY_DELAY ; small delay subroutine
sjmp repeat ; for (1)
hsabaghianb @ kashanu.ac.ir Microprocessors 6-33