Lecture Slide 4
Lecture Slide 4
Lecture Slide 4
By
Dr. Supratim Gupta
Part-0: RTOS
RTOS in the 8051: Overall Structure
Address Vectoring:
.Org 0000H
sjmp Main
.Org 000BH
sjmp TM0
Information to Assembler
Caution: The syntax is
Macros:
tickN .reg 3FH
assembler specific
INT0_edg .reg TCON.0
IE_cont .equal 81H
Initialization Module:
Main: mov IE,#IE_cont
setb INT0_edg
RTO
S Run Module: Interrupt Module:
Loop: acall KBD TM0: cpl P1.0
sjmp Loop reti
INITIALIZATION MODULE
Design Issues:
Mode of timer (16 or 8-
bit) tim_mod .equal 02h
mov TMOD, #tim_mod
Address Vectoring
.org 0
ajmp main
.org 000bh
ajmp TM0 ;jump to timer0 routine
RTOS in the 8051
RUN
MODULE
Time
ISR: Interrupt Service Routine
Part-1: Interfacing Keys
Keyboard Configuration
Lead-per-Key
Matrix Keypad
Coded Keyboard
Keyboard Configuration: Lead-per-Key
Keyboard Configuration: Matrix
Keyboard Configuration: Coded Keyboard
Robust Keyboard Operations: Human Factors
To guard against multiple & simultaneous key press and release in arbitrary
sequence
Schmitt Trigger
De-bounce/Accidental Key hit: To wait until a time interval –longer than the
manufacturer’s specification –lapses during both key press & release.
Multiple Key press: To use only a valid key patterns –all other patterns will be
ignored; the first valid key patterns will be accepted
Key Hold: To identify valid key press if the same valid pattern exists after the
de-bounce delay
Rapid Key hit: Keys are scanned at a rate faster than human reaction time
The Algorithm for keyboard Interface
Step 3: Check if same switch is remained pressed else return to main routine
Step 4: Check if valid key pattern is pressed else return to main routine
Key scanning via polling: May sluggish, but usable for small keypad & less
number of multi-task environment
Key scanning via interrupt: CPU will scan keys when interrupted; Optimal for
large key board & larger number of multi-tasking environment
Robust Keyboard Operations: Embedded Solution
To ADC Channel
Pre-conditioning Circuit
DAC Interfacing: DAC0808
27
𝐴 𝐴 𝐴 𝑉 𝐴 𝐴 𝐴
𝐼 =𝐼 + + …+ 𝐼 = + + …+
2 4 256 𝑅 2 4 256
DAC Interfacing: DAC0808
28
𝐴 𝐴 𝐴
𝐼 =𝐼 + + …+
𝑅 2 4 256
𝑉 𝐴 𝐴 𝐴
𝑅 𝐼 = + + …+
𝑅 2 4 256
𝑉 𝐴 𝐴 𝐴
𝑉 = + + …+ 𝑅
𝑅 2 4 256
DAC Interfacing: Bipolar output signal
29
I0
DAC0809
LCD Display
7-Segment Display
7-Segment Display: Single Unit
Common Anode/Cathode
Step 3: Use index addressing –Base address + index (the nibbles of BCD no.) –
to a look up table for fetching code for 7-Segment LEDs
Step 4: Send the code to Port where the unit(s) is (are) connected
Part-5: Device Communication
Device Communication Modes
Parallel communication implies sending a whole byte (or more) of data over
multiple parallel wires
Serial communication implies sending data bit by bit over a single wire
Add: Start, Stop, Parity Bits Remove: Start, Stop, Parity Bits
Transmitter + – Receiver
Data
Shifts the parallel data onto the Extracts the data using its own clock
serial line using its own clock
Converts the serial data back to the
Also adds the start, stop and parallel form after stripping off the
parity check bits start, stop and parity bits
Asynchronous Serial Communication
Start Bit Parity Bit 1 or 2 Stop Bits
D0 D1 D2 D3 D4 D5 D6 D7
1 Asynchronous Byte