CS 35101 Computer

Architecture
Section 600
Dr. Angela Guercio
Fall 2010

Structured Computer
Organization
A computers native language, machine
language, is difficult for humans to use to
program the computer
Due to this difficulty, computers are often
structured as a series of abstractions, each
building on the one below it
In this way, complexity can be mastered
This approach is called structured computer
organization

Languages, Levels, and

Virtual Machines
Let the machine language be called L0 (since it
is at the lowest level of abstraction)
L0 is inconvenient for human use, so lets
design a new language L1 which is easier
A program written in L1 must be translated into an
equivalent L0 program before it can be executed
Another possibility is to write a program in L0 that
examines each individual instruction and executes
the equivalent sequence of L0 instructions. This
technique is called interpretation and the program
is called an interpreter.

Languages, Levels, and

Virtual Machines
Translation and interpretation are similar. Both methods,
and a combination of the two, are widely used

Rather than think of translation/interpretation, it is

often simpler to imagine a virtual machine whose
machine language is L1. Call this machine M1.
Why not implement M1 directly? It might be too
expensive or complicated to construct out of electrical
circuits.
In order to make translation practical, M0 (the real
machine) and M1 must not be too different. So, L1 might
still be difficult to program! Solution? Create a new VM
M2. If necessary repeat until we have a useful machine.
This leads to a computer consisting of a number of layers
or levels, one on top of another.

Computer as Multilevel
Machine

Contemporary Multilevel
Machines
Most modern computers consist of two or
more levels (as many as six)
The lowest level is the digital logic level
constructed from gates
Each gate has one or more digital inputs and
computes some simple function of the inputs such as
AND or OR. Gates are built up from transistors.
A small number of gates can be combined to form a
1-bit memory. 1-bit memories can be combined to
from 16, 32, or 64 bit registers which can hold a
single binary number.

Contemporary Multilevel
Machines
The next level up is the microarchitecture
level
At this level we see a collection of (typically) 8 to
32 registers that form a local memory and a circuit
called an ALU (Arithmetic Logic Unit) capable of
performing simple arithmetic operations.
The registers are connected to the ALU to form a
data path over which data flow
On some machines the operation of the data path is
controlled by a program called a microprogram.
On other machines the data path is controlled
directly by hardware.

Contemporary Multilevel
Machines
Level 2 is the Instruction Set Architecture (ISA)
level. This level consists of the instructions that can
be carried out by the computer.
The facilities added at level 3 are carried out by an
interpreter running at level 2 called an operating
system. This level is called the operating system
level.
Levels 4 and 5 are used by application programmers
(only systems programmers use the lower three
levels). The languages of levels 4 and 5 are usually
translated while those of levels 2 and 3 are always
interpreted.

Contemporary Multilevel
Machines
Levels 4 and 5 provide symbolic languages while
the machine languages of levels 1, 2, and 3 are
numeric.
Level 4 is the assembly language level. It provides
a program called an assembler which translates a
symbolic form of the level 1, 2, or 3 language.
Level 5 consists of high-level languages such as
BASIC, C, C++, and Java. Programs written in these
languages are translated to level 3 or 4 languages by
translators known as compilers.

A Six-Level Computer

Evolution of Multilevel
Machines
The first digital computers had only two levels: the
ISA level (where programming was done) and the
digital logic level. The digital logic circuits were
very complicated.
In 1951, Maurice Wilkes suggested the idea of a threelevel computer in order to simplify the hardware. The
machine was to have a built-in unchangeable program (the
microprogram whose function was to execute ISA-level
programs. The microprogram was easier to implement in
hardware then the instruction set, so the circuits needed
were simpler.
A few three-level machines were constructed in the 1950s,
more during the 1960s and by 1970 microprogrammed
machines were dominant.

Evolution of Multilevel
Machines
Early computers were operated directly by a
programmer (or a computer operator) who entered a
deck of cards containing (e.g.) a FORTRAN
program. The program was translated to machine
language, output on cards and subsequently run.
Around 1960 people tried to reduce wasted time by
automating the operators job. A program called an
operating system was kept in the computer at all
times. The programmer provided certain control
cards along with the program that were read and
carried out by the operating system.

A Sample Job for FMS OS

Evolution of Multilevel
Machines
Early operating systems read card decks and printed
output on the line printer. These were known as
batch systems. In the early 1960s timesharing
systems in which users were connected to the CPU
using terminals and the CPU was shared were
introduced.
Due to the ease of introducing new instructions in
microprogrammed architectures, by the 1970s
instruction sets had grown large and the
microprogram large and slow. At this point
researchers realized that by simplifying the
instruction set and implementing it directly in
hardware the computer could be much faster.

Milestones in Computer Architecture (1)

Milestones in Computer Architecture (2)

Computer Generations
Zeroth Generation
Mechanical Computers (1642 1945)
First Generation
Vacuum Tubes (1945 1955)
Second Generation
Transistors (1955 1965)
Third Generation
Integrated Circuits (1965 1980)
Fourth Generation
Very Large Scale Integration (1980 ?)

A von Neumann Machine

First Bus-Based System

The IBM 360 Product Line

The initial offering of the IBM product line.

Moores Law
Moores law is named after Gordon Moore,
co-founder and Chairman of Intel, who
discovered it in 1965
The law states that the number of transistors
that can be put on a chip doubles every 18
months
Many observers expect Moores law to
continue to hold into the 21st Century, possibly
around 2020

Technological and Economic Forces

Moores law predicts a 60-percent annual increase in the

number of transistors that can be put on a chip.
The data points given in this figure are memory sizes, in bits.

The Computer Spectrum

Although PCs are the most common type of computer, there are
others as well

The current spectrum of computers available. The prices should

be taken with a grain (or better yet, a metric ton) of salt.

The Computer Spectrum

NOW (Network of Workstations) or COW
(Cluster of Workstations) consist of standard
PCs or workstations connected by gigabit/sec
networks, and running specialized software that
allow all the machines to work together on a
single problem
Mainframes are large computers which have
high I/O capacity and vast storage capacities
Supercomputers are typically highly parallel
machines made from high-end components

Typical Prices of Computers

Personal Computer
1. Pentium 4 socket
2. 875P Support chip
3. Memory sockets
4. AGP connector
5. Disk interface
6. Gigabit Ethernet
7. Five PCI slots
8. USB 2.0 ports
9. Cooling technology
10. BIOS
A printed circuit board is at the heart of every personal computer. This
figure is a photograph of the Intel D875PBZ board. The photograph is
copyrighted by the Intel Corporation, 2003 and is used by permission.

Pentium II
The Intel Corporation was formed in 1968.
In 1970, Intel manufactured the first singlechip CPU, the 4-bit 4004 for a Japanese
company to use in an electronic calculator.
The 8088, a 16-bit CPU was chosen as the
CPU for the original IBM PC.
A series of backward compatible chips
(80286, 386, 486, Pentium, Pentium Pro and
Pentium II) followed.

The Intel CPU Family

The Intel CPU family. Clock speeds are
measured in MHz (megahertz) where 1
MHZ is 1 million cycles/sec.

Moores Law
Moores law for (Intel) CPU chips.

The Pentium 4 Chip

The Pentium 4 chip. The photograph is copyrighted by

the Intel Corporation, 2003 and is used by permission.

Example Computer Families

Pentium 4 by Intel
UltraSPARC III by Sun Microsystems
The 8051 chip by Intel, used for embedded
systems

UltraSPARC II
In the 1970s, UNIX was popular at universities,
but it ran only on timeshared minicomputers
such as the VAX and PDP-11
In 1981, a Stanford graduate student built a
personal UNIX workstation using off-the-shelf
parts. It was called the SUN-1.
Early Sun workstations used Motorola CPUs.
In 1987, Sun decided to design its own CPU
based on a Cal Berkeley design called the RISC
II.

UltraSPARC II
The new CPU was called the SPARC (Scalable
Processor ARChitecture) and was used in the Sun4.
The SPARC was licensed to several semiconductor
manufacturers who developed binary compatible
versions.
The first SPARC was a 32-bit machine with only 55
instructions (an FPU added 14 additional
instructions).
A 64-bit version, the UltraSPARC I was developed
in 1995. This machine was aimed at high-end
applications (e.g. web and database servers).

picoJava II
The Java programming language defines a Java
Virtual Machine (JVM) in order to allow
portability across many architectures
Usually Java programs are interpreted by a
JVM interpreter written in C, but interpretation
is slow.
One solution is to have a JIT (Just In Time)
compiler for the machine running the JVM
Another alternative is to design hardware JVM
chips, thus avoiding a level of software
interpretation or JIT compilation.

picoJava II
Such Java chips are especially useful in
embedded systems
The picoJava II is not a concrete chip, but a
chip design which is the basis for a number of
chips such as the Sun microJava 701 CPU.
The picoJava has two optional units: a cache
and a floating-point unit which can be included
or removed as the manufacturer sees fit.

MCS-51 Family

Members of the MCS-51 family.

Metric Units

The principal metric prefixes.