Epmc Pu 0114 1.0

78K Primer Kit
78K0S & 78K0 (8-bit) & 78K0R (16-bit)

Microcontrollers for the Industrial Market
Architecture, Peripherals and Development Tools

1
Disclaimer
The information in this document is current as of January, 2009. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-todate specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document.
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application.
(Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above).
Purpose of the 78K Primer Kit
This kit has been created to help and educate newcomers to get started quickly and easily with 78K Microcontrollers, both 78K0 8-bit and 78K0R 16-bit.
This is ideal for Engineers and Students new to NECs Microcontrollers
Contents
1. Introduction 2. 3. 4. 5. 6. 7.
General Purpose & Industrial MCU Roadmap Industrial Applications Focus Industrial Application Examples NEC Microcontroller Nick-Naming 8/16-bit NEC Microcontroller Nomenclature Quality Grades
10. The 78K On-Chip Peripherals
Clock generator, Ports, Power-On Clear, Low-Voltage Indicator, Timers, Comparators/Operational Amplifiers, RealTime Clock, Window Watchdog Timer, Option Byte, A/D Converter, D/A Converter, Multiplier/Divider, Serial Interfaces, Interrupt Functions, Key Interrupt Functions, LCD Controller/Driver, DMA Controller, External Bus Interface
8. Different NEC cores
11. Flash Technology

78K0 & 78K0R Microcontroller Series
General Purpose Microcontroller Motor Control Microcontroller Microcontroller with LCD C/D
Parameters and security On-board programming Self-Programming EEPROM Emulation
9. The 78K Architecture

Memory Organization Processor Registers Mirror Area Pipeline Structure
12. The Development Tools Environment
78K0 & 78K0R Tools Environment
13. Support
1. Introduction
All of our Multi Market Microcontrollers employ reliable Flash memory
All Flash continues to evolve, contributing to the success of customers
Answering ever more specific needs, contributing to cost cutting, delivering peace of mind that can be relied on. This lineup comprises the V850E and V850ES 32-bit microcontrollers delivering high performance for system control, and the 78K0 and 78K0S 8-bit microcontrollers, which boast a small size and low power consumption making them ideal as subcontrollers. A truly diversified lineup of 8-bit devices that offers a full range of products, which are available with 10 to 100 pins and ROM capacity of 1 KB to 128 KB; cuts total cost by allowing program changes, the incorporation of peripheral functions, and lower power consumption; as well as providing a full range of development tools that dramatically enhance ease of use. NEC Electronics' All Flash lineup is completed by the 78K0R 16-bit microcontrollers, positioned between 8-bit and 32-bit microcontrollers. These microcontrollers achieve a low power consumption on a par with that of 8-bit microcontrollers while delivering the performance of 16bit microcontrollers. NEC Electronics' All Flash lineup supports from 30 to 144 pins and ROM capacities of 16 to 512 KB. The lineup also inherits the existing 78K0 and 78K0S 8-bit microcontrollers. Should 8-bit microcontrollers fall short in terms of performance and ROM capacity for the intended application, smooth migration to 16-bit microcontrollers is possible. More than just providing its devices with sophisticated functions, NEC Electronics has also created an entire infrastructure that ranges from the development of flash microcontrollers to their delivery and that enables more effective and simple use of All Flash. Our products and environment, which make the most of the merits of flash memory products, work for the success of our customers everywhere.
2. General Purpose & Industrial MCU Roadmap

32-bit
1024 768 640 512 384 256 Flash: K Bytes 128 96 64 48 32 24 16 8 4 2 1 10
16-bit
Higher performance & large memory
High performance, low power & High integration
8-bit
Low power & high integration

Multi Purpose
Low pin count MCU

16 20 30 44/48 52 64 80 100
LCD drive / control Industrial ASSPs 128 144 pin

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3. Industrial Applications Focus
Industrial Markets & Applications
Motor Control
Major Appliances
Building Management
HVAC
Industrial Automation
Control Systems Sensors Operator Panels (HMI) Instrumentation Industrial Networking
Healthcare
Diagnostic Imaging
Small Appliances Power Tools
Fire & Security Lighting Metering Biometrics
Therapy Other Healthcare
Industrial Motor Control
4. Industrial Application Examples
Fire Detectors Washing Machines Electricity/Water/Gas Meters
Electric Drills
Some Industrial Applications
Electric shavers
Thermostats Programmable Logic Controller (PLC) Patient Monitors Blood Glucose Meter
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5. NEC Microcontroller Nick-Naming
78K0/Kx2 - L
Extension L -> Low Power Device generation (1st, 2nd, etc.) Device package information A: 20 pins G: 100 pins Device family name (K, F, L , etc.)
CPU core name (78K0, 78K0S

78K0/KE2 78K0R/KG3
8-bit; 78K0R
16-bit)
8-bit CPU, K Series (General Purpose) 2nd generation, 64 pin package 16-bit CPU, K Series (General Purpose) 100 pin package
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6. 8/16-Bit Microcontroller Nomenclature
PD78F0547GK-8EU-A
Package + Lead Frame + Lead free Series & ROM size Core (0: 78K0, 1: 78K0R, 9: 78K0S) Memory (no: ROM, F: Flash) Member of the 78K MCU family Microcontroller CMOS
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7. Quality grades
PD78F0547GK(A)-8EU-A PD78F0547GK(A)-8EU-A
= Ta : - 40C + 85C (A) = Ta : - 40C + 85C (A2)= Ta : - 40C + 125C NECs standard quality NECs automotive quality
All A grades get an additional burnin and are tested at high temperature.
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8. Different NEC Cores
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
Different Cores for each Application Requirement
High - End 8-bit
78K0
78K0S
Low-End 8-bit
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V850E
High-End 32-bit
78K0S Core
8-bit CISC CPU core
200ns min. instruct. exec. time 8 and 16-bit data transfers 8x8-bit or 4x16-bit registers
V850ES
Low-End 32-bit
47 assembler instructions

1 register bank organized as Free configurable software stack Vectorized interrupts for each source
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
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V850E
High-End 32-bit
78K0 Core
8-bit CISC CPU core

V850ES
Low-End 32-bit
100ns min. instruct. exec. Time Code banking for > 60k 8 and 16-bit data transfers mul/div instruction (8x8, 16/8-bit) 8x8-bit or 4x16-bit registers fast interrupt handling
63 assembler instructions
78K0R
High-End 16-bit
4 register banks organized as
High - End 8-bit
78K0
Free configurable software stack Vectorized interrupts for each source
Selectable priority
78K0S
Low-End 8-bit
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V850E
High-End 32-bit
78K0R Core
16-bit CISC CPU core

V850ES
Low-End 32-bit
50ns min. instruct. exec. Time Up to 512kB ROM 16-bit shift instructions
71 assembler instructions 3-stage pipeline 2 DMA channels Ultra low power consumption
78K0R
16-bit
4mA @10MHz 3V
High - End 8-bit
78K0
Free configurable software stack Vectorized interrupts for each source
4 interrupt priority level
78K0S
Low-End 8-bit
15
8-bit Micro Series
16
8-bit 78K0 K Series

78K0 K Series
V850E
High-End 32-bit
V850ES
Low-End 32-bit
10 to 100 pins 8- and 16-bit Timers 10-bit A/D Converter 8-bit D/A Converter Serial Interfaces
UART with LIN Functionality 3-wire (SPI) I2C
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Devices
Internal Oscillators Secure Watchdog POC / LVI Circuit Wide Operating Voltage Range Wide Package Variety RoHS Compliant
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78K0S/Kx1+
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
Low Pin Count Microcontrollers 78K0S/Kx1+
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Devices
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78K0S/Kx1+ Product Line-up
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78K0S/Kx1+ - Version Line-Up
8K
256 128 128 128 128 128 128 128 128 128 128 128 128 20-pin KA1+
x RAM size with AD conv.
Flash (Byte)
4K 2K 1K
256 128
256
10-pin KU1+
x
16-pin KY1+
RAM size w/o AD conv.
30-pin KB1+
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PD78F950x 10pin (78K0S/KU1+) (1/2)

Interrupt Controller 10-Pin Package 8-bit Timer TMHx
1-ch, 2 x Compare/1 x PWM MA (SSOP 0.65 mm pin pitch) 2 external / 8 internal
Window Watchdog Timer
78K0S Core
200 ns @ 10MHz 2 to 5.5V -40 to +85C
Flash
1 KB Flash 2 KB Flash 4 KB Flash 128 B RAM 128 B RAM 128 B RAM 78F9500 78F9501 78F9502
On-chip Oscillator
8 MHz (2%), 240kHz Single Voltage Flash Secure Self-Programming
Power-On Reset Low-Voltage Indicator Up to 8 I/O lines

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PD78F920x 10pin (78K0S/KU1+) (2/2)

16-bit Timer TM0
1-ch, 2 x Capture/Compare
Interrupt Controller 10-Pin Package

MA (SSOP 0.65 mm pin pitch) 2 external / 8 internal
8-bit Timer TMHx

1-ch, 2 x Compare/1 x PWM
78K0S Core
200 ns @ 10MHz 2 to 5.5V -40 to +85C
A/D Converter
4 x 10-bit
Flash
On-chip Oscillator
8 MHz (3%), 240kHz
Cer. / Crystal Oscillator

Up to 10 MHz
Single Voltage Flash Secure Self-Programming

22
PD78F951x 16pin (78K0S/KY1+) (1/2)

16-bit Timer TM0
16-Pin Package
GR (SSOP 0.65 mm pin pitch, 225 mil) FH ( WCSP 2.2 x 1.9 mm2) CS (SDIP)
Interrupt Controller
2 external / 8 internal
8-bit Timer TMHx

78K0S Core
200 ns @ 10MHz 2 to 5.5V -40 to +125C
Flash
On-chip Oscillator
8 MHz (3%), 240kHz

Up to 10 MHz

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PD78F921x 16pin (78K0S/KY1+) (2/2)

16-bit Timer TM0
16-Pin Package
GR (SSOP 0.65 mm pin pitch, 225 mil) FH ( WCSP 2.2 x 1.9 mm2) CS (SDIP)
8-bit Timer TMHx

78K0S Core
200 ns @ 10MHz 2 to 5.5V -40 to +125C
A/D Converter
4 x 10-bit
Flash
On-chip Oscillator
8 MHz (3%), 240kHz

Up to 10 MHz

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PD78F952x 20pin (78K0S/KA1+)

16-bit Timer TM0
20-Pin Package
MC ( SSOP 0.65 mm pin pitch, 300 mil) FH ( WLBGA, 2.03 x 2.55 mm2) CS (SDIP)
8-bit Timer TMHx

1-ch, UART (1 x LIN capable)
Serial Interface
78K0S Core
200 ns @ 10MHz 2 to 5.5V -40 to +125C
Flash
2 KB Flash 4 KB Flash 128 B RAM 256 B RAM 78F9521 78F9522
On-chip Oscillator
8 MHz (3%), 240kHz

Up to 10 MHz

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PD78F953x 30pin (78K0S/KB1+)

16-bit Timer TM0
Interrupt Controller 30-Pin SSOP Package

MC ( 0.65 mm pin pitch, 300 mil) 4 external / 10 internal
8-bit Timer TMHx

Serial Interface
8-bit Timer TM8

1-ch, 1 x Compare
78K0S Core
200 ns @ 10MHz 2 to 5.5V -40 to +125C
Flash
HW Multiplier
(8x8)
On-chip Oscillator
8 MHz (3%), 240kHz

Up to 10 MHz

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78K0S/Kx1+ - Peripherals
KU1+
Pin count Flash [KB] RAM [Bytes] Main Clock Clock Subclock Sources Watchdog 16-bit Memory Timers 8-bit RTC Watchdog 10
KY1+
16
KA1+
20
KB1+
30
1/2/4 1/2/4 2/4 4/8 128 128 128 / 256 256 Note1 and 8 MHz (+/- 3%) on-chip 1 to 10 MHz extern 240 kHz (+/- 50%) on-chip 1 channelNote1 1 channels 1 channel 1channel (supporting LIN) Power-On-Reset: 2.1V0.1V, LVI: 2.35V to 4.30V 4 channels Up to 8 I/O Up to 14I/O
Note2
2 channels
Serial UART Interface POC / LVI 10-bit A/D-Converter Operational AmplifierNote 2 Ports InterruptsNote 3
Note 1: external osc not on 78F950x devices
Up to 17 I/O
Up to 26 I/O
2 ext./ 8 int.
Note 2: only 78F92xx
4 ext./ 10 int.
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78K0S/Kx1+ Space Saving Packages
16-pin WCSP is the smallest packaged MCU in the world!
KY1+ 16pin WCSP 1.9x2.2mm 0.5mm pitch
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78K0/Kx2
General purpose peripherals & scalability at its best
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78K0/Kx2
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
78K0/Kx2
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Devices
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78K0/Kx2 Product Line-up
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78K0/Kx2 - Version Line-Up

Portfolio Extension on A version
7K 7K 5K 3K 2K 1K 1K 1K 768 512 1K 1K 1K 768 512 1K 1K 1K 768 1K 1K 1K 768
128K 96K 60K 48K 32K 24K 16K 8K
7K 7K 5K 3K 3K 2K 1K 1K 768
7K 7K 5K 3K 2K 1K 1K 768
7K 7K 5K 3K 2K 1K 1K 768
7K 7K 5K 3K 2K
Flash (Byte)
30-pin 36-pin 38-pin 44-pin 48-pin 52-pin 64-pin 80-pin KB2 KC2 KF2 KD2 KE2 x
RAM size 78K0/Kx2
RAM size 78K0/Kx2 On Chip Debug version

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Improvements on A version
Extended portfolio

Up to 128 KB Flash in 30-pin SSOP and 48-pin LQFP 38-pin SSOP Qualified for up to 140 C
Improved Flash macro

Code: Data:
1000 (instead of 100) W/E cycles, 15 years data retention 10000 (instead of 100) W/E cycles, 3 years data retention
Extended settings for A/D conversion time

Increased accuracy with noisy signals Higher flexibility to adapt the conversion time to the frequency
Improved self-programming firmware
Optimized for shorter interrupt response times
Wide operating range
20 MHz at 2.7 - 5.5 V
Caution: Do not confuse A version and A/A2 grade
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Tool Changes for A Version

Hardware Update Software Update No Update Use as it is
IECube
No Update
(K Series: control code F or higher, F Series: control code "C" or higher)
MiniCube 2 Device File
No Update Use as it is No Update Use as it is No Update Use as it is
No Update Use as it is No Update Use as it is Parameter File Update Required
PG-FP5-EE
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PD78F050x 30pin (78K0/KB2)

16-bit Timer TM0
30/36-Pin Package
MC ( SSOP, 300 mil, 0.65 mm pin pitch) FC(LGA, 4 x 4 mm2, 0.5mm pin pitch)
8-bit Timer TMHx

2-ch, 2 x Compare/1 x PWM each
Serial Interface
8-bit Timer TM5x

Serial Interface
78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +125C
1 x CSI (SPI)
Serial Interface
1-ch, I2C
A/D Converter Flash

8 KB Flash 16 KB Flash 24 KB Flash 32 KB Flash 48 KB Flash 60 KB Flash* 96 KB Flash* 128 KB Flash* 512 B RAM 768 B RAM 1 KB RAM 1 KB RAM 2 KB RAM 3 KB RAM 5 KB RAM 7 KB RAM 78F0500A 78F0501A 78F0502A 78F0503A 78F0504A 78F0505A 78F0506A 78F0507A 4 x 10-bit
Ext. Multiplier
(from 48KB onwards)
On-chip Oscillator
8 MHz (5%), 240kHz (10%)
Power-On Reset Low-Voltage Indicator Voltage Regulator Up to 23 I/O lines

35

Up to 20 MHz
Single Voltage Flash Secure Self-Programming On-Chip Debugging 78F0503D,78F0507D * Only 30 pin version
PD78F051x 44/48pin (78K0/KC2)

16-bit Timer TM0
38/44/48-Pin Package
MC ( SSOP, 300 mil, 0.65 mm pin pitch) GB (QFP, 10 x 10 mm2, 0.8 mm pin pitch) GA (QFP, 7 x 7 mm2, 0.50 mm pin pitch)
7/8 external / 16 internal
8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

Serial Interface
Window Watchdog Timer Clock / Buzzer Output Flash Watch Timer Subclock Oscillator
32.768 kHz
78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +125C
1 x CSI (SPI)
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit
On-chip Oscillator
8 MHz (5%), 240kHz (10%)
16 KB Flash 24 KB Flash 32 KB Flash 48 KB Flash* 60 KB Flash* 96 KB Flash* 128 KB Flash*
768 B RAM 1 KB RAM 1 KB RAM 2 KB RAM 3 KB RAM 5 KB RAM 7 KB RAM
78F0511A 78F0512A 78F0513A 78F0514A 78F0515A 78F0516A 78F0517A
Key Return Inputs Ext. Multiplier

(from 48KB onwards)
Power-On Reset Low-Voltage Indicator Voltage Regulator Up to 37/41 I/O lines

36

Up to 20 MHz
Single Voltage Flash Secure Self-Programming On-Chip Debugging 78F0513D/5D/7D * Only 48 pin version
PD78F052x 52pin (78K0/KD2)

16-bit Timer TM0
Interrupt Controller 52-Pin QFP Package

GB (10 x 10 mm2, 0.65 mm pin pitch) 9 external / 16 internal
8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

Serial Interface
32.768 kHz
78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +125C
1 x CSI (SPI)
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit
On-chip Oscillator
8 MHz (5%), 240kHz (10%)
16 KB Flash 24 KB Flash 32 KB Flash 48 KB Flash 60 KB Flash 96 KB Flash 128 KB Flash
78F0521A 78F0522A 78F0523A 78F0524A 78F0525A 78F0526A 78F0527A

(from 48KB onwards)
Power-On Reset Low-Voltage Indicator Voltage Regulator

Up to 20 MHz
Single Voltage Flash Secure Self-Programming On-Chip Debugging
78F0527D
Up to 45 I/O lines
37
PD78F053x 64pin (78K0/KE2)

16-bit Timer TM0
Up to 2-ch, 2 x Capture/Compare
64-Pin QFP Package

GC (14 x 14 mm2, 0.8 mm pin pitch) GK (12 x 12 mm2, 0.65 mm pin pitch) GB (10 x 10 mm2, 0.50 mm pin pitch) GA (7 x 7 mm2, 0.40 mm pin pitch) FC (5 x 5 mm2, FLGA)
9 external / 16 (19) internal
8-bit Timer TMHx

Serial Interface Serial Interface
8-bit Timer TM5x

32.768 kHz
78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +125C
Up to 2 x CSI (SPI)
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit
On-chip Oscillator
8 MHz (5%), 240kHz (10%)
16 KB Flash 24 KB Flash 32 KB Flash 48 KB Flash 60 KB Flash 96 KB Flash 128 KB Flash
78F0531A 78F0532A 78F0533A 78F0534A 78F0535A 78F0536A 78F0537A

(from 48KB onwards)

Up to 20 MHz
78F0537D
Up to 55 I/O lines
38
PD78F054x 80pin (78K0/KF2)

16-bit Timer TM0
80-Pin QFP Package

GC (14 x 14 mm2, 0.65 mm pin pitch) GK (12 x 12 mm2, 0.50 mm pin pitch)
8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +125C
Serial Interface
3-ch, 2 x CSI (SPI) 1 x Auto CSI
32.768 kHz 48 KB Flash 60 KB Flash 96 KB Flash 128 KB Flash
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit 2 KB RAM 3 KB RAM 5 KB RAM 7 KB RAM 78F0544A 78F0545A 78F0546A 78F0547A
Key Return Inputs Ext. Multiplier Power-On Reset Low-Voltage Indicator
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 20 MHz
Voltage Regulator
78F0547D
Up to 71 I/O lines
39
78K0/Kx2 - Peripherals
KB2
Pin count Flash [KB] RAM [KBytes] Main Clock Clock Subclock Sources Watchdog 16-bit Memory Timers 8-bit Watch timer Watchdog 30 / 36 8 to 128 0. 5 to 7
KC2
38 / 44 /48
KD2
52
KE2
64
KF2
80
16 to 128 16 to 128 16 to 128 48 to 128 0.75 to 7 0.75 to 7 0.75 to 7 2 to 7 1 to 20 MHz extern and 8 MHz ( 5%) on-chip 32.768 kHz 240 kHz (10 %) on-chip 2 channel Note1 1 channel 4 channels 1 channel 1 channel 2/1/1 channel 2/2 8 channels 1 channel
Note1 Note1
Serial UART/CSI/I2c Interface POC / LVI 10-bit A/D-Converter HW-multiplier Ports Interrupts
Note 1:
(16x16,32/16)
/1 ch.
2/3/1 channel
Power-On-Reset: 1.59V0.15V, LVI: 2.35V to 4.30V 4 channels
23 6 ext. / 14 int.
31 / 37 / 41 7 ext. / 16 int.
45
55 7 ext. / 19 int.
71 7 ext. / 20 int.
only version >= 48K flash
40
Introducing 78K0/Kx2-L
Industry Leading Low Power 8-bit MCUs
41
78K0/Kx2-L
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0/Kx2-L
P
78K0S
Low-End 8-bit
S AS
Devices
42
Low Power 78K Series Overview
Pin count
78K0R/Next
16-bit
78K0R/Kx3
16-bit 64-144pin
Wide operating voltage range
78K0R/Kx3-L
44-100pin
1.8V to 5.5V
78K0/Kx2
8-bit 30-80pin
Low-power Internal Oscillator

With 2% accuracy
78K0/Kx2-L
16-48pin
Analog function
78K0S/Kx1+
8-bit 10-30pin
43
78K0/Kx2-L Product Line-up

Family Concept: + 16 to 48 pins + 4 KB - 32 KB Flash + 384 B - 1 KB RAM + 8 and 16 bit timers + UART, CSI,IIC + AD conv. /comparator + POC/LVI/on-chip oscillator
78K0/KC2-L
PD78F058x 8/16-Bit Timer Comparator 8/11 x 10-Bit A/D 8 - 32 KB Flash 512B 1KB RAM 44/48-pin QFP
78K/KB2-L
PD78F057x 8/16-Bit Timer Comparator 4/7 x 10-Bit A/D 8 - 32 KB Flash 512B - 1KB RAM 30-pin SSOP
78K0/KA2-L
PD78F056x 8/16-Bit Timer Comparator 6 x 10-Bit A/D 4 - 16 KB Flash 384B - 768B RAM 20-pin SSOP
78K0/KY2-L
PD78F055x 8/16-Bit Timer Comparator 4 x 10-Bit A/D 4 - 16 KB Flash 384B - 768B RAM 16-pin SSOP
44
78K0/Kx2-L Product Line-up
32K
1K 768 512 384 16-pin KY2-L

x
1K 768 512
1K 768 512
1K 768 512
Flash (Byte)
16K 8K 4K
768 512 384
768 512 384 20-pin KA2-L
768 512 384
768 512
30-pin KB2-L
x RAM size w/ Op. Amp.
44-pin / 48-pin KC2-L
RAM size w/o Op. Amp.
All devices support the On-Chip Debug function
45
PD78F055x 16pin (78K0/KY2-L)(1/2)

16-bit Timer TM0
16-Pin SSOP Package

MC (225 mil, 0.65 mm pin pitch)
8-bit Timer TMHx

1-ch, UART (LIN capable)
Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
A/D Converter Flash

4 KB Flash 8 KB Flash 16 KB Flash 0.384 KB RAM 0.512 KB RAM 0.768 KB RAM 78F0555 78F0556 78F0557 4 x 10-bit
Prg. Gain Amp./Op. Amp.

1-ch / 1-ch for A/D-Converter each
4 MHz (2%)Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator
Power-On Reset Low-Voltage Indicator

Single Voltage Flash Secure Self-Programming On-Chip Debugging Note: 4 MHz2%@TA=-20 to +70 C 4 MHz3%@TA=-40 to +85 C

Up to 10 MHz
Voltage Regulator Up to 12 I/O lines

46
PD78F055x 16pin (78K0/KY2-L)(2/2)

16-bit Timer TM0
16-Pin SSOP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
A/D Converter Flash

4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

47
PD78F056x 20pin (78K0/KA2-L)(1/2)

16-bit Timer TM0
20-Pin SSOP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
A/D Converter Flash


4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

48
PD78F056x 20pin (78K0/KA2-L)(2/2)

16-bit Timer TM0
20-Pin SSOP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
A/D Converter Flash

4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

49
PD78F057x 30pin (78K0/KB2-L)(1/2)

16-bit Timer TM0
30-Pin SSOP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
A/D Converter Flash


4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

50
PD78F057x 30pin (78K0/KB2-L)(2/2)

16-bit Timer TM0
30-Pin SSOP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, CSI (SPI)
Serial Interface
1-ch, I2C
A/D Converter Flash

4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

51
PD78F058x 44/48pin (78K0/KC2-L)(1/2)

16-bit Timer TM0
44-Pin QFP Package

GB (10 x 10
10-12 external / 16 internal
8-bit Timer TMHx

48-Pin QFP Package
mm2,
0.80 mm pin pitch)
GA (7 x 7 mm2, 0.50 mm pin pitch)
Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
1-ch, CSI (SPI)
Window Watchdog Timer Clock / Buzzer Output Flash Real Time Clock Unit Subclock Oscillator
32.768 kHz 8 KB Flash 16 KB Flash 32 KB Flash
Serial Interface
1-ch, I2C
A/D Converter
11 x 10-bit
0.512 KB RAM 0.768 KB RAM 1.024 KB RAM
78F0586 78F0587 78F0588
Key Return Inputs Prg. Gain Amp./Op. Amp.

4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

52
PD78F058x 44/48pin (78K0/KC2-L)(2/2)

16-bit Timer TM0
44-Pin QFP Package

GB (10 x 10
10-12 external / 17 internal
8-bit Timer TMHx

48-Pin QFP Package
mm2,
0.80 mm pin pitch)
Serial Interface
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Serial Interface
2-ch, CSI (SPI)
Window Watchdog Timer Clock / Buzzer Output Flash Real Time Clock Unit Subclock Oscillator
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit
0.512 KB RAM 0.768 KB RAM 1.024 KB RAM
78F0581 78F0582 78F0583
Key Return Inputs
4 MHz (2%) Note, 8 MHz (5%), 30 kHz (10%)
On-chip Oscillator


Up to 10 MHz

53
78K0/Kx2-L - Peripherals
KY2-L
Pin count Flash [KB] RAM [Bytes] Main Clock Clock Subclock Sources Watchdog 16-bit Memory Timers 8-bit RTC Watchdog 16 4 / 8 / 16 384 / 512 / 768
KA2-L
20
KB2-L
30 44
KC2-L
48
Serial UART/CSI/I2c Interface POC / LVI
4 / 8 / 16 8 / 16 / 32 8 / 16 / 32 8 / 16 / 32 384 / 512 / 768 512 / 768 / 1024 512 / 768 / 1024 512 / 768 / 1024 1 to 10 MHz extern and 4/8 MHz on-chip 32.768 kHz 30 kHz10 % on-chip 1 channel 3 channels 4 channels 1 channel 1 channel 1/-/1 channel 1/1Note 1/1 channel 1/2Note 1/1 channel(s)
Power-On-Reset: 1.61V0.1V, LVI: 2.35V to 4.30V 6 channels 7 ch. with Op.Amp. 11 channels with Op. Amp. 7 channels 10-bit A/D-Converter 4 ch. without Op.Amp. 8 channels without Op. Amp. 0 channels / 1 channel 0 channels / 2 channels Operational AmplifierNote 2 10 I/O / 2 Inputs 14 I/O / 2 Inputs 21 I/O / 3 Inputs 33 I/O / 5 Inputs 37 I/O / 5 Inputs Ports InterruptsNote 3 On-chip debug interface
Note 1: CSI is not supported on 78K0/KB2-L with Op. Ampl. Only 1 CSI is supported on 78K0/KC2-L with Op. Ampl. Note 2:
2 ext./10 int.
4 ext./10 int.
8 ext./12-13 int. 10 ext./16-17 int. 12 ext./16-17 int. 1 channel

Depends on product Note 3: Higher number of internal interrupts for products without Op. Ampl. 54
78K0/Kx2-L Current Consumption

Standby current w/ int. LS Osc
5 4 3 2
4uA
Internal high-speed oscillator
4MHz
Internal high-speed oscillator
1.2uA
1 0
0.9uA
0.8uA 0.8
1MHz
Sub clock HALT mode
K0 Kx2-L
32.768KHz 650uA 260uA <1uA
Internal low-speed Oscillator + TMH1 STOP mode
30KHz 0.8uA
RTC Running
0.2uA
55
78K0/Lx2 & Lx3

Scalable devices with large-segment LCD Controller-Driver
56
8-bit 78K0 L Series
V850E
High-End 32-bit
78K0 L Series
48 to 100 pins 8- and 16-bit Timers 10-bit A/D Converter Serial Interfaces
UART with LIN Functionality 3-wire (SPI) I2C
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Devices
LCD Controller / Driver Up to 288 segments Internal Oscillators Secure Watchdog POC / LVI Circuit Wide Operating Voltage Range RoHS Compliant
57
L Series - Roadmap
Wide LCD application range

78K0/Lx2: up to 40x4 seg., Booster, 128K Flash, 20MHz 78K0/Lx3: up to 36x8 seg., A/D-Conv., 60K Flash, 20MHz 78K0R/Lx3 up to 50x8 seg., 12-Bit A/D-Converter, 128K Flash, 20MHz
78K0R / LF3 (128pin) 78K0R / LG3 (100pin) 78K0R / LH3 (80pin) 78K0 / LG2 (100pin) 78K0 / LF2 (80pin) 78K0 / LE2 (64pin) 78K0 / LF3 (80pin) 78K0 / LE3 (64pin) 78K0 / LD3 (52pin) 78K0 / LC3 (48pin)
* under planning 58
78K0/Lx2
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0/Lx2
P
78K0S
Low-End 8-bit
S AS
Devices
59
78K0/Lx2 L Series Overview

7K 7K 5K 5K 3K 2K 1K 1K 1K 768 64-pin LE2
x x
128K 96K 5K 5K 3K 2K 1K 1K
5K 3K 2K 1K
Flash (Byte)
60K 48K 32K 24K 16K
1K 1K
80-pin LF2
100-pin LG2
x x RAM size with AD conv. RAM size with AD conv. and OCD interface
60
RAM size w/o AD conv. RAM size w/o AD conv. and OCD interface
78K0/Lx2 100% Compatibility with the K Series
4 common lines, up to 40 segment lines
K _ L I N E P I N S
LCD
IC
controller/ driver
L C D P I N S
IC
LCD
controller/driver
resistor ladder capacitors
main clock
32.768 kHz
61
PD78F036x 64pin (78K0/LE2)

16-bit Timer TM0
2-ch , 2 x Capture/Compare
64-Pin QFP Package

GK (12 x 12 mm2, 0.65 mm pin pitch) GB (10 x 10 mm2, 0.50 mm pin pitch)
8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +85C
1-ch, CSI (SPI)
Serial Interface
1-ch, I2C
A/D Converter
5 x 10-bit
LCD controller/driver
20 seg x 4 com 768 B RAM 1 KB RAM 1 KB RAM 78F0361 78F0362 78F0363
On-chip Oscillator
8 MHz (5%), 240kHz (10%)


Up to 20 MHz
Voltage Regulator
78F0363D
Up to 34 I/O lines
62
Note 1: only 1 channel on 32K version
PD78F037x 80pin (78K0/LF2)(1/2)

16-bit Timer TM0
2-ch
Note1,
2 x Capture/Compare
80-Pin QFP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

Serial Interface
78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +85C
1-ch, CSI (SPI)
32.768 kHz 24 32 48 60 96 KB KB KB KB KB Flash Flash Flash Flash Flash
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit
26 seg x 4 com 1 1 2 3 5 KB KB KB KB KB RAM RAM RAM RAM RAM 78F0372 78F0373 78F0374 78F0375 78F0376

(from 48KB onwards)
On-chip Oscillator
8 MHz (5%), 240kHz (10%)


Up to 20 MHz
Voltage Regulator
78F0376D
Up to 34 I/O lines
63
PD78F038x 80pin (78K0/LF2)(2/2)

16-bit Timer TM0
2-ch
Note1,
2 x Capture/Compare
80-Pin QFP Package

8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +85C
1-ch, CSI (SPI)
32.768 kHz 24 32 48 60 96 KB KB KB KB KB Flash Flash Flash Flash Flash
Serial Interface
1-ch, I2C
36 seg x 4 com 1 1 2 3 5 KB KB KB KB KB RAM RAM RAM RAM RAM 78F0382 78F0383 78F0384 78F0385 78F0386

(from 48KB onwards)
On-chip Oscillator
8 MHz (5%), 240kHz (10%)


Up to 20 MHz
Voltage Regulator
78F0386D
Up to 26 I/O lines
64
PD78F039x 100pin (78K0/LG2)

16-bit Timer TM0
2-ch
Note1,
2 x Capture/Compare
100-Pin QFP Package

GC (14 x 14 mm2, 0.5 mm pin pitch) GF (20 x 14 mm, 0.65 mm pin pitch)
8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
100 ns @ 20MHz 1.8 to 5.5V -40 to +85C
2-ch
Note1,
CSI (SPI)
32.768 kHz 32 KB Flash 48 KB Flash 60 KB Flash 96 KB Flash 128 KB Flash
Serial Interface
1-ch, I2C
A/D Converter
8 x 10-bit
40 seg x 4 com 1 KB RAM 2 KB RAM 3 KB RAM 5 KB RAM 7 KB RAM 78F0393 78F0394 78F0395 78F0396 78F0397

(from 48KB onwards)
On-chip Oscillator
8 MHz (5%), 240kHz (10%)


Up to 20 MHz
Voltage Regulator
78F0397D
Up to 40 I/O lines
65
78K0/Lx2 - Peripherals
LE2
Pin count Flash [KB] RAM [KBytes] Main Clock Clock Subclock Sources Watchdog 16-bit Memory Timers 8-bit Watch timer Watchdog 64
LF2
80
LG2
80
16/24/32 24/32/48/60/96 48/60/96/128 1/1/2/3/5 0.75/1/1 2/3/5/7 1 to 20 MHz extern and 8 MHz ( 5%) on-chip 32.768 kHz 240 kHz (10 %) on-chip 1 channel 2 channel Note1 4 channels 1 channel 1 channel 2/1 channel 20 x 4 5 channels 1 channel 24 7 ext. / 16 int. 26
Note1
Serial UART(LIN)/CSI Interface LCD controller/driver 10-bit A/D-Converter POC / LVI HW-multiplier Ports Interrupts
Note 1: versions >=48K
2/2 channel 26 x 4 8 channels 40 x 4
36 x 4
Power-On-Reset: 1.59V0.15V, LVI: 2.35V to 4.30V 34
40 7 ext. / 19 int.
7 ext. / 19 (16) int. 1 channel
Note 1: only 1 channel on 32K version On- chip debug interface
66
78K0/Lx3
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0/Lx3
P
78K0S
Low-End 8-bit
S AS
Devices
67
78K0/Lx3 L Series Overview
68
PD78F040x 48pin (78K0/LC3)(1/2)

16-bit Timer TM0
48-Pin QFP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

3-ch, 3 x Compare
Window Watchdog Timer Clock / Buzzer Output Real Time Clock Manchester Code Gener. Subclock Oscillator
32.768 kHz
78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Flash
8 KB Flash 16 KB Flash 24 KB Flash 32 KB Flash 512 B RAM 768 B RAM 1 KB RAM 1 KB RAM 78F0400 78F0401 78F0402 78F0403
18 seg x 8 com 22 seg x 4 com
Key Return Inputs Power-On Reset Low-Voltage Indicator
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

69
PD78F041x 48pin (78K0/LC3)(2/2)

16-bit Timer TM0
48-Pin QFP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

3-ch, 3 x Compare
78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
Window Watchdog Timer Clock / Buzzer Output Real Time Clock Manchester Code Gener. Subclock Oscillator
32.768 kHz
A/D Converter
6 x 10-bit
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz Note 1: only 1 channel on 32K version

70
PD78F042x 52pin (78K0/LD3)(1/2)

16-bit Timer TM0
52-Pin QFP Package

GB (10 x 10 mm2, 0.65 mm pin pitch)
8-bit Timer TMHx

8-bit Timer TM5x

3-ch, 3 x Compare
78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
1-ch, 1x CSI(SPI)
Window Watchdog Timer Clock / Buzzer Output Real Time Clock Manchester Code Gener. Remote Control Receiver Subclock Oscillator
32.768 kHz
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

71
PD78F043x 52pin (78K0/LD3)(2/2)

16-bit Timer TM0
52-Pin QFP Package

8-bit Timer TMHx

8-bit Timer TM5x

3-ch, 3 x Compare
78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
1-ch, 1x CSI(SPI)
32.768 kHz
A/D Converter
6 x 10-bit
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

72
PD78F044x 64pin (78K0/LE3)(1/3)

16-bit Timer TM0
64-Pin QFP Package

8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
1-ch, 1x CSI(SPI)
32.768 kHz
Flash
16 24 32 48 60 KB KB KB KB KB Flash Flash Flash Flash Flash 768 B RAM 1 KB RAM 1 KB RAM 2 KB RAM 2 KB RAM 78F0441 78F0442 78F0443 78F0444 78F0445
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz Note 1: only 1 channel on 32K version

73
PD78F045x 64pin (78K0/LE3)(2/3)

16-bit Timer TM0
64-Pin QFP Package

8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
1-ch, 1x CSI(SPI)
32.768 kHz
A/D Converter
8 x 10-bit
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

74
PD78F046x 64pin (78K0/LE3)(3/3)

16-bit Timer TM0
64-Pin QFP Package

8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
1-ch, 1x CSI(SPI)
32.768 kHz
A/D Converter
8 x 10-bit
A/D-Converter
3 x 16-bit
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

75
PD78F046x 64pin (78K0/LE3)(3/3)

16-bit Timer TM0
64-Pin QFP Package

8-bit Timer TMHx

Serial Interface
8-bit Timer TM5x

Serial Interface
78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
1-ch, 1x CSI(SPI)
32.768 kHz
A/D Converter
8 x 10-bit
A/D-Converter
3 x 16-bit
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

76
PD78F047x 80pin (78K0/LF3)(1/3)

16-bit Timer TM0
80-Pin QFP Package

8-bit Timer TMHx

8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
2-ch, 1x CSI(SPI), 1x AUTO CSI
32.768 kHz
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

77
PD78F048x 80pin (78K0/LF3)(2/3)

16-bit Timer TM0
80-Pin QFP Package

8-bit Timer TMHx

Serial Interface Serial Interface A/D Converter

8 x 10-bit
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
32.768 kHz
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

78
PD78F049x 80pin (78K0/LF3)(3/3)

16-bit Timer TM0
80-Pin QFP Package

8-bit Timer TMHx

Serial Interface Serial Interface A/D Converter

8 x 10-bit
8-bit Timer TM5x

78K0 Core
200 ns @ 10MHz 1.8 to 5.5V -40 to +85C
32.768 kHz
A/D-Converter
3 x 16-bit
Flash
On-chip Oscillator
8 MHz (5%), 240kHz (10%)

Up to 10 MHz

79
78K0/Lx3 - Peripherals
LC3
Pin count Flash [KB] RAM [KBytes] Main Clock Clock Subclock Sources Watchdog 16-bit Memory Timers 8-bit Real Time Clock Watchdog 48 8/16/24/32 0.5/0.75/1/1
LD3
52
LF3
64
LF3
80
8/16/24/32 16/24/32/48/60 16/32/48/60 0.5/0.75/1/1 0.75/1/1/2/2 0.75/1/1/2/2 1 to 10 MHz extern and 8 MHz ( 5%) trimmable on-chip 32.768 kHz 240 kHz (10 %) on-chip 1 channel 6 channels 1 channel 1 channel 2/1 channel 24 x 4 / 20 x 8 6 ch 32x4/28x8 24x4/20x8 8 ch 3 ch 2/2 channel 40x4/36x8 32x4/28x8 8 ch 3 ch
2 channel Serial UART(LIN)/CSI Interface LCD controller/driver 22 x 4 / 18 x 8 10-bit SAR 6 ch A/D Converter16-bit Manchester Code Gener. Remote Control Receiver POC / LVI 30 Ports Interrupts On- chip debug interface 5 ext. / 18 int.
1 channel 1 channel Power-On-Reset: 1.59V0.15V, LVI: 2.35V to 4.30V 34 5 ext. / 20 int. 46 6 ext. / 20int. 1 channel
80
62 7 ext. / 22int.
8-bit 78K0 I Series
V850E
High-End 32-bit
78K0 I Series
16 to 30 pins 8- and 16-bit Timers 10-bit A/D Converter Serial Interfaces
I2C Interface UART/Manchester
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Devices
Cpmparators Op. Amps. / PGA Internal Oscillators Secure Watchdog POC / LVI Circuit Wide Operating Voltage Range On Chip Debug Interface
81
78K0/Ix2
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0/Ix2
P
78K0S
Low-End 8-bit
S AS
Devices
82
78K0/Ix2 Product Line-up

Family Concept: + 16 to 30 pins + 4 KB - 16 KB Flash + 384 B - 512 KB RAM + up to 20MHz for core + up to 40 MHz for timer X + 8 and 16 bit timers + UART,IIC + AD conv. /comparator + POC/LVI/on-chip oscillator
78K/IB2
PD781223/4/5 8/16-Bit Timer Comparator
78K0/IA2
PD781211/3/4/5 8/16-Bit Timer Comparator 6 x 10-Bit A/D 4 - 16 KB Flash 384B - 768B RAM 20-pin SSOP
9 x 10-Bit A/D 8 - 16 KB Flash 512B - 1KB RAM 30-pin SSOP
78K0/IY2
PD781201/3 8/16-Bit Timer Comparator 5 x 10-Bit A/D 4 - 16 KB Flash 384B - 768B RAM 16-pin SSOP
83
78K0/Ix2 I Series Overview
16K 8K 4K
768 512 384
768 512 384
768 512 384
768 512 384
768 512
768 512
Flash (Byte)
16-pin IY2
x
20-pin IA2
RAM size w/o Op. Amp. x
30-pin IB2
RAM size with Op. Amp.
84
PD78F0750/1/2 16pin (78K0/IY2)(1/2)

2 x 16-bit Timer X
1 x Capt./ AD trigger 4x Comp. each Two outputs each
16-Pin SSOP Package

16-bit Timer TM0

1-ch, 1xCapture/2xCompare
8-bit Timer TMHx

78K0 Core
100 ns @ 20MHz 2.7V to 5.5V -40 to +85C
8-bit Timer TM5x

1-ch, 1 x Compare
A/D Converter
5 x 10-bit
Window Watchdog Timer PLL

x10
Flash
Prg. Gain Amp. /OpAmp

1-ch for AD converter /1-ch
Comparator
3-ch
On-chip Oscillator
4 MHz (2%), 30 kHz (10%)


Up to 10 MHz

85
PD78F0740/1/2 16pin (78K0/IY2)(2/2)

2 x 16-bit Timer X
16-Pin SSOP Package

16-bit Timer TM0

8-bit Timer TMHx

78K0 Core
100 ns @ 20MHz 2.7V to 5.5V -40 to +85C
8-bit Timer TM5x

1-ch, 1 x Compare
A/D Converter
5 x 10-bit

x10
Flash
Comparator
3-ch
On-chip Oscillator
4 MHz (2%), 30 kHz (10%)


Up to 10 MHz

86
PD78F0753/4 20pin (78K0/IA2)(1/2)

2 x 16-bit Timer X
20-Pin SSOP Package

Serial Interface
16-bit Timer TM0

1-ch, UART (LIN and DALI capable) (Mancester)
8-bit Timer TMHx

78K0 Core
100 ns @ 20MHz 2.7V to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
8-bit Timer TM5x

1-ch, 1 x Compare
A/D Converter
6 x 10-bit

x10
Flash

Comparator
3-ch
On-chip Oscillator
4 MHz (2%), 30 kHz (10%)


Up to 10 MHz

87
PD78F0743/4 20pin (78K0/IA2)(2/2)

2 x 16-bit Timer X
20-Pin SSOP Package

Serial Interface
16-bit Timer TM0

8-bit Timer TMHx

78K0 Core
100 ns @ 20MHz 2.7V to 5.5V -40 to +85C
Serial Interface
1-ch, I2C
8-bit Timer TM5x

1-ch, 1 x Compare
A/D Converter
6 x 10-bit

x10
Flash
Comparator
3-ch
On-chip Oscillator
4 MHz (2%), 30 kHz (10%)


Up to 10 MHz

88
PD78F0755/6 30pin (78K0/IB2)(1/2)

2 x 16-bit Timer X
30-Pin SSOP Package

Serial Interface
16-bit Timer TM0

8-bit Timer TMHx

78K0 Core
100 ns @ 20MHz 2.7V to 5.5V -40 to +85C
Serial Interface
1-ch I2C / 1-ch CSI
8-bit Timer TM5x

1-ch, 1 x Compare
A/D Converter
9 x 10-bit

x10
Flash

Comparator
3-ch
On-chip Oscillator
4 MHz (2%), 30 kHz (10%)


Up to 10 MHz

89
PD78F0745/6 30pin (78K0/IB2)(2/2)

2 x 16-bit Timer X
30-Pin SSOP Package

Serial Interface
16-bit Timer TM0

8-bit Timer TMHx

78K0 Core
100 ns @ 20MHz 2.7V to 5.5V -40 to +85C
Serial Interface
1-ch I2C / 1-ch CSI
8-bit Timer TM5x

1-ch, 1 x Compare
A/D Converter
9 x 10-bit

x10
Flash
Comparator
3-ch
On-chip Oscillator
4 MHz (2%), 30 kHz (10%)


Up to 10 MHz

90
78K0/Ix2 - Peripherals
IY2
Pin count Memory 16
IA2
20
IB2
30
Flash [KB] 4 / 8 / 16 8 / 16 8 / 16 RAM [Bytes] 384 / 512 / 512 512 / 512 512 / 512 Main Clock Up to 20 MHz and 4 MHz (2%) on-chip with PLL Clock Subclock Sources 30 kHz10 % on-chip Watchdog 2 channel 16-bit timer X 1 channel 16-bit timer0 Timers 2 channels 8-bit 1 channel Watchdog 1/1/- channel Serial UART/I2c/CSI 1/1/1 channel Interface POC / LVI Power-On-Reset: 1.61V0.1V, LVI: 2.35V to 4.30V 5 channels 6 channels 9 ch. with Op.Amp. 10-bit A/D-Converter Op. Amp./PGANote 1 Comparators Ports InterruptsNote 3 On- chip debug interface
Note 1: Only available on devices with OpAmp. (78F075x) 91
12
1 channels / 1 channel 3 channel 16 4 ext. 1 channel
25 6 ext.
16-bit Micro Series
92
78K0R
Super low-power high performance 16-bit MCUs
93
16-bit 78K0R K Series
V850E
High-End 32-bit
78K0R K Series
44 to 144 pins 16-bit Timers 10-bit A/D Converter 8-bit D/A Converter Serial Interfaces
V850ES
Low-End 32-bit
LIN Functionality
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Internal Oscillators Secure Watchdog Wide Operating Voltage Range POC / LVI Circuit RoHS Compliant Wide Package Variety
Devices
94
78K0R/Kx3
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0R/Kx3
P
78K0S
Low-End 8-bit
S AS
Devices
95
78K0R/Kx3 Product Line-up

Family Concept: + 64 to 144 pins + 64 KB - 512 KB Flash + 4 KB - 30 KB RAM + Same type of peripherals + POC/LVI/on-chip oscillator
78K0R/KJ3
PD78F1184A8A 16-Bit Timer Unit 16 x 10-Bit A/D 128-512 KB Flash 8-30 KB RAM 144-pin QFP
78K0R/KH3
78K0R/KG3
78K0R/KF3
78K0R/KE3
PD781142A6A 16-Bit Timer Unit 8 x 10-Bit A/D 64-256 KB Flash 4-12 KB RAM 64-pin QFP
96
78K0R/Kx3 K Series Overview

512K 384K 256K 192K 128K 96K 64K 12K 10K 8K 6K 4K 64-pin KE3 12K 10K 8K 6K 4K 80-pin KF3
x
30K 24K 12K 10K 8K 6K 4K 100-pin KG3

RAM size
30K 24K 12K 10K 8K
30K 24K 12K 10K 8K
Flash (Byte)
128-pin KH3
144-pin KJ3

97
PD78F114xA 64pin (78K0R/KE3)

16-bit Timer Array Unit
8-ch, Timer Mode or PWM Mode
64-Pin LQFP Package

GK (12 x 12 mm2, 0.65 mm pin pitch) GB (10 x 10 mm2, 0.50 mm pin pitch) NEW F1, (5 x 5 mm, 0.50 mm pin pitch)
Window Watchdog Timer Clock / Buzzer Output Real Time Clock Unit 16 x 16-bit Multiplier DMA Controller
2-ch
4-ch each, up to 2 CSI (SPI), up to 1 simplified I2C, up to 3 UART
2 x Serial Array Unit I2C

1-ch
78K0R Core
50 ns @ 20MHz (13 MIPS) 1.8 to 5.5V -40 to +85C
Key Return Inputs A/D Converter
Flash
64 KB Flash 96 KB Flash 128 KB Flash 196 KB Flash 256 KB Flash 4.0 6.0 8.0 10.0 12.0 KB KB KB KB KB RAM RAM RAM RAM RAM 78F1142A 78F1143A 78F1144A 78F1145A 78F1146A
8 x 10-bit
Subclock Oscillator
32.768 kHz
On-chip Oscillator
8 MHz (5%), 240 kHz (10%)

Up to 20 MHz
Up to 55 I/O lines
98
PD78F115xA 80pin (78K0R/KF3)

80-Pin LQFP Package

2-ch

1-ch
78K0R Core
Flash
64 KB Flash 96 KB Flash 128 KB Flash 196 KB Flash 256 KB Flash 4.0 6.0 8.0 10.0 12.0 KB KB KB KB KB RAM RAM RAM RAM RAM 78F1152A 78F1153A 78F1154A 78F1155A 78F1156A
8 x 10-bit
D/A Converter
2 x 8-bit
Subclock Oscillator
32.768 kHz
On-chip Oscillator
8 MHz (5%), 240 kHz (10%)

Up to 20 MHz
Up to 70 I/O lines
99
PD78F116xA 100pin (78K0R/KG3)

100-Pin LQFP Package

GF (14 x 20 mm2, 0.65 mm pin pitch) GC (14 x 14 mm2, 0.50 mm pin pitch)
2-ch

1-ch
78K0R Core
Flash
64 KB Flash 96 KB Flash 128 KB Flash 196 KB Flash 256 KB Flash 384 KB Flash 512 KB Flash 4.0 6.0 8.0 10.0 12.0 24.0 30.0 KB KB KB KB KB KB KB RAM RAM RAM RAM RAM RAM RAM 78F1162A 78F1163A 78F1164A 78F1165A 78F1166A 78F1167A 78F1168A
16 x 10-bit
External Memory Access Subclock Oscillator

32.768 kHz
D/A Converter
2 x 8-bit
On-chip Oscillator
8 MHz (5%), 240 kHz (10%)

Up to 20 MHz
Up to 88 I/O lines
100
PD78F117xA 128pin (78K0R/KH3)

128-Pin LQFP Package

GF (14 x 20 mm2, 0.50 mm pin pitch)
2-ch

1-ch
78K0R Core
Flash
128 192 256 384 512 KB KB KB KB KB Flash Flash Flash Flash Flash 8.0 10.0 12.0 24.0 30.0 KB KB KB KB KB RAM RAM RAM RAM RAM 78F1174A 78F1175A 78F1176A 78F1177A 78F1178A
16 x 10-bit

32.768 kHz
D/A Converter
2 x 8-bit
On-chip Oscillator
8 MHz (5%), 240 kHz (10%)

Up to 20 MHz
Up to 116 I/O lines
101
PD78F118xA 144pin (78K0R/KJ3)

144-Pin QFP Package

GJ (20 x 20 mm2, 0.50 mm pin pitch)
2-ch

1-ch
78K0R Core
Flash
128 192 256 384 512 KB KB KB KB KB Flash Flash Flash Flash Flash 8.0 10.0 12.0 24.0 30.0 KB KB KB KB KB RAM RAM RAM RAM RAM 78F1184A 78F1185A 78F1186A 78F1187A 78F1188A
16 x 10-bit

32.768 kHz
D/A Converter
2 x 8-bit
On-chip Oscillator
8 MHz (5%), 240 kHz (10%)

Up to 20 MHz
Up to 132 I/O lines
102
78K0R/Kx3 Peripherals
KE3
Pin count Memory Flash [KB] 64 64 / 96 / 128 / 192 / 256 4/6/8/10/12
KF3
80
KG3
100
KH3
128
KJ3
144
RAM [KB] Main Clock Clock Subclock Sources Watchdog 16-bit Timers RTC Watchdog
64 / 96 / 128 / 64/96/128/192/ 128 / 192 / 256 128 / 192 / 256 256/384/512 / 384 / 512 / 384 / 512 192 / 256 4/6/8/10/12/24/30 4/6/8/10/12 8/10/12/24/30 8/10/12/24/30 2 to 20 MHz extern and 8 MHz on-chip 32.768 kHz 240 kHz10 % on-chip 8 channels 12 channels 1 channel 1 channel 4/4/2 channel(s) 4/6/4 channel(s)
UART/CSI/I2C 3/2/1 channel(s) Serial Interface I2C POC / LVI 10-bit A/D-Converter 8-bit D/A-Converter Ports Interrupts DMA-Controller HW Multiplier
1 channel Power-On-Reset: 1.61V0.09V, Power-Down-Reset: 1.59V0.09V / LVI: 1.91V to 4.22V 8 channels 16 channels 51 2-channels 70 88 116 132
13 ext. / 25 int.
13 ext. / 28 int. 2 channels 16 x16
13 ext. / 32 int.
103
Introducing 78K0R/Kx3-L
Industry Leading Low Power 16-bit MCUs
104
16-bit 78K0R Low-Power K Series
V850E
High-End 32-bit
78K0R Low-power K Series

44 to 64 pins 16-bit Timers 10-bit A/D Converter Serial Interfaces

V850ES
Low-End 32-bit
LIN Functionality Comparator Operational Amplifier
Analog Functions
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Internal Oscillators Low power consumption Secure Watchdog POC / LVI Circuit Wide Package Variety RoHS Compliant
Devices
105
78K0R/Kx3-L
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0R/Kx3-L
P
78K0S
Low-End 8-bit
S AS
Devices
106
Low Power 78K Series Overview
Pin count
78K0R/Next
16-bit
78K0R/Kx3
16-bit 64-144pin
78K0R/Kx3-L
44-100pin
1.8V to 5.5V
78K0/Kx2
8-bit 30-80pin
Low-power Internal Oscillator

With 2% accuracy
78K0/Kx2-L
16-48pin
Analog function
78K0S/Kx1+
8-bit 10-30pin
107
78K0R/Kx3-L Concept
Saving Energy & Saving Cost

Ultra Low Power
5.3mA 3mA 190uA 1uA @ 20MHz operation @ 10MHz operation @ 1MHz operation @ 32KHz+RTC
High Performance
16.9DMIPS @ 20MHz 0.94mW/MIPS (@ 3V)
1MHz 8MHz/20MHz
Selectable Clock
for low-power system for high-speed system (+/-1% accuracy)
12 channels 10bit A/D converter with 3us conversion x1 to x12 Programmable Gain Amplifier 2 Comparator channels
Rich Analog
Operation : 1.8V~5.5V Flash programming : 1.8V~5.5V to further extend battery life
1.8V Programming
108
78K0R/Kx3-L Product Line-up

Family Concept: + 44 to 64 pins + 16 KB - 64 KB Flash + 1 KB - 3 KB RAM + Same type of peripherals + POC/LVI/on-chip oscillator + Low power consumption 78K0R/KD3-L
PD78F10046 16-Bit Timer Unit 11 x 10-Bit A/D 32-64 KB Flash 1.5-3 KB RAM 52-pin QFP
78K0R/KE3-L
PD78F10079 16-Bit Timer Unit 12 x 10-Bit A/D 128-512 KB Flash 1.5-3 KB RAM 64-pin QFP/BGA
78K0R/KC3-L
PD78F1000...3 16-Bit Timer Unit 10/11 x 10-Bit A/D 16-64 KB Flash 1-3 KB RAM 44-pin/48-pin QFP
109
78K0R/Kx3-L K Series Overview

Portfolio Extension
128K 96K 8K 6K 3K 2K 1.5K 1K 44-pin 48-pin KC3-L
x
8K 6K 4K
Flash (Byte)
64K 48K 32K 16K
3K 2K 1.5K
3K 2K 1.5K
3K 2K 1.5K
4K
52-pin KD3-L
RAM size
64-pin KE3-L
80-pin KF3-L
100-pin KG3-L

110
PD78F100x 44pin (78K0R/KC3-L)(1/2)

44-Pin QFP Package

Window Watchdog Timer Clock / Buzzer Output Real Time Clock Unit 16 x 16-bit Multiplier 32 / 32-bit Divider DMA Controller
2-ch
4-ch, up to 3 CSI (SPI), up to 1 simplified I2C, up to 2 UART
Serial Array Unit I2C

1-ch
78K0R Core
A/D Converter Flash

16 32 48 64 KB KB KB KB Flash Flash Flash Flash 1.0 1.5 2.0 3.0 KB KB KB KB RAM RAM RAM RAM 78F1000 78F1001 78F1002 78F1003 10 x 10-bit
Comp. / Op. Amplifier

2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator
1/8/20 MHz, 30 kHz

Up to 20 MHz
Up to 37 I/O lines
111
PD78F100x 48pin (78K0R/KC3-L)(2/2)

48-Pin QFP Package

2-ch

1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator
1/8/20 MHz, 30 kHz

Up to 20 MHz
Up to 41 I/O lines
112
PD78F100x 52pin (78K0R/KD3-L)

64-Pin QFP Package

2-ch

1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator
1/8/20 MHz, 30 kHz

Up to 20 MHz
Up to 45 I/O lines
113
PD78F100x 64pin (78K0R/KE3-L)

64-Pin QFP Package

FC (5 x 5 mm2, 0.50 mm pin pitch) GA (7 x 7 mm2, 0.40 mm pin pitch) GB (10 x 10 mm2, 0.50 mm pin pitch) GK (12 x 12 mm2, 0.65 mm pin pitch)
2-ch

1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator
1/8/20 MHz, 30 kHz

Up to 20 MHz
Up to 55 I/O lines
114
78K0R/Kx3-L Peripherals
KC3-L
Pin count Memory 44 48
KD3-L
52
KE3-L
64
Flash [KB] 32 / 48 / 64 32 / 48 / 64 32 / 48 / 64 16 / 32 / 48 / 64 1.5 / 2 / 3 1.5 / 2 / 3 RAM [KB] 1.5 / 2 / 3 1 / 1.5 / 2 / 3 Main Clock 2 to 20 MHz extern and 1/8/20 MHz on-chip Clock Subclock 32.768 MHz Sources Watchdog 30 kHz10 % on-chip 16-bit 8 channels Timers RTC 1 channel Watchdog 1 channel 2C UART/CSI/I 3/2/1 channel(s) Serial 2C Interface I 1 channel Comparator 2 channels Analog Op. Amplifier 1 channel POC / LVI Power-On-Reset: 1.61V0.09V, Power-Down-Reset: 1.59V0.09V / LVI: 1.91V to 4.22V 10 channels 11 channels A/D-Converter 12 channels Ports Interrupts DMA-Controller 37 9 ext. / 24 int. 41 45 9 ext. /25 int. 2 channels 55
115
78K0R/Lx3
High performance, super-low power, enhanced analog
116
16-bit 78K0R L Series

78K0R L Series
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0S
Low-End 8-bit
S AS
Devices
80 to 128 pins 16-bit Timers 12-bit A/D Converter 12-bit D/A Converter LCD Controller/Driver Voltage boosting method, capacitor split method and resistance splitting method supported Six different display modes Up to 400 segments (50 x 8) Analog Functions Comparator Operational Amplifier Serial Interfaces LIN Functionality Internal Oscillators Secure Watchdog Wide Operating Voltage Range POC / LVI Circuit RoHS Compliant Wide Package Variety
117
78K0R/Lx3
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0R/Lx3
P
78K0S
Low-End 8-bit
S AS
Devices
118
L Series - Roadmap
Wide LCD application range

78K0/Lx2: up to 40x4 seg., Booster, 128K Flash, 20MHz 78K0/Lx3: up to 36x8 seg., A/D-Conv., 60K Flash, 20MHz 78K0R/Lx3 up to 50x8 seg., 12-Bit A/D-Converter, 128K Flash, 20MHz
78K0R / LF3 (128pin) 78K0R / LG3 (100pin) 78K0R / LH3 (80pin) 78K0 / LG2 (100pin) 78K0 / LF2 (80pin) 78K0 / LE2 (64pin) 78K0 / LF3 (80pin) 78K0 / LE3 (64pin) 78K0 / LD3 (52pin) 78K0 / LC3 (48pin)
* under planning 119
78K0R/Lx3 Product Line-up

Family Concept: + 80 to 128 pins + 64 KB - 128 KB Flash + 4 KB - 7 KB RAM + 12-Bit A/D with Op.Amp. + Up to 400 LCD segments (50 x 8) + Same type of peripherals + POC/LVI/on-chip oscillator 78K0R/LG3
PD78F1503..5 288 seg. (36x8) 12-Bit A/D 64-128 KB Flash 4-7 KB RAM 100-pin QFP
78K0R/LH3
78K0R/LF3
120
78K0R/Lx3 L Series Overview
128K 96K 64K
7K 6K 4K 80-pin LF3
x
7K 6K 4K
7K 6K 4K
Flash (Byte)
100-pin 128-pin LG3 LH3

RAM size All devices support the On-Chip Debug function
121
PD78F150x 80pin (78K0R/LF3)

80-Pin QFP Package

GK (12 x 12 0.5 mm pin pitch) GC (14 x 14 mm2, 0.65 mm pin pitch) mm2,
8 external / 24 internal 2-ch/4-ch, up to 2 CSI (SPI), up to 2 simplified I2C, up to 3 UART
2-ch
2 x Serial Array Unit
78K0R Core
Key Return Inputs Voltage Reference A/D Converter

8 x 12-bit
LCD Controller / Driver

Up to 27 x 8 Segments
Flash
64 KB Flash 96 KB Flash 128 KB Flash 4.0 KB RAM 6.0 KB RAM 7.0 KB RAM 78F1500 78F1501 78F1502
D/A Converter
2 x 12-bit
Subclock Oscillator
32.768 kHz
Operational Amplifier
2-ch
On-chip Oscillator
8 MHz (1%), 30 kHz (10%)


Up to 20 MHz

122
PD78F150x 100pin (78K0R/LG3)


GC (14 x 14 mm2, 0.5 mm pin pitch) 12 external / 29 internal 4-ch each, up to 3 CSI (SPI), up to 2 simplified I2C, up to 4 UART
2-ch
2 x Serial Array Unit 1 x I2C
78K0R Core

12 x 12-bit

Flash
D/A Converter
2 x 12-bit
Subclock Oscillator
32.768 kHz
3-ch
On-chip Oscillator
8 MHz (1%), 30 kHz (10%)


Up to 20 MHz

123
PD78F150x 128pin (78K0R/LH3)


GF (14 x 20 mm2, 0.5 mm pin pitch) 13 external / 29 internal 4-ch each, up to 4 CSI (SPI), up to 2 simplified I2C, up to 4 UART
2-ch
2 x Serial Array Unit 1 x I2C
78K0R Core

12 x 12-bit

Flash
D/A Converter
2 x 12-bit
Subclock Oscillator
32.768 kHz
3-ch
On-chip Oscillator
8 MHz (1%), 30 kHz (10%)


Up to 20 MHz

124
78K0R/Lx3 Peripherals
LF3
Pin count Flash [KB] RAM [KB] Main Clock Clock Subclock Sources Watchdog 16-bit Timers RTC Watchdog Memory UART/CSI/I2C Serial Interface I2C LCD Controller / Driver POC / LVI 12-bit A/D-Converter 12-bit D/A-Converter Ports Interrupts DMA-Controller 80
LG3
100
LH3
128
64 / 96 / 128 64 / 96 / 128 64 / 96 / 128 4/6/7 4/6/7 4/6/7 2 to 20 MHz extern and 8 MHz on-chip 32.768 kHz 30 kHz10 % on-chip 6 channels 8 channels 1 channel 1 channel 3/2/2 channel(s) 4/3/2 channel(s) 4/4/2 channel(s) 1 channel 36 x 8 segments 47 x 8 segments 50 x 8 segments Power-On-Reset: 1.61V0.09V, Power-Down-Reset: 1.59V0.09V LVI: 1.91V to 4.22V 8 channels 12 channels 2-channels 51 67 83 8 ext. / 24 int. 12 ext. / 29 int. 2 channels 13 ext. / 29 int.
125
78K0R/Lx3 Performance
126
78K0R/Ix3 ASSP 16-bit Motor Control Microcontrollers
127
16-bit 78K0R I Series
V850E
High-End 32-bit
78K0R I Series
30 to 64 pins 16-bit Timers

V850ES
Low-End 32-bit
78K0R
16-bit
10-bit A/D Converter Comparators
Inverter Timer with Motor Control Functionality PWM Output Operation with a max. resolution of 40MHz Dead-Time Generation
Serial Interfaces
High - End 8-bit
Fail-Safe Application to set PWM output to high-impedance in case of overcurrent LIN Functionality
78K0
78K0S
Low-End 8-bit
S AS
Devices
Internal Oscillators Secure Watchdog POC / LVI Circuit RoHS Compliant Wide Package Variety
128
78K0R/Ix3
V850E
High-End 32-bit
V850ES
Low-End 32-bit
78K0R
16-bit
High - End 8-bit
78K0
78K0R/Ix3
P
78K0S
Low-End 8-bit
S AS
Devices
129
78K0R/Ix3 The Concept Parts
The Complete Solution
78K0R/Ix3
130
78K0R/Ix3 Product Line-up

Family Concept: + 30 to 64 pins + 16 KB - 64 KB Flash + 1 KB - 3 KB RAM + 16-Bit Timer Array Unit + Serial Interface Array Unit + Same type of peripherals + POC/LVI/on-chip oscillator
78K0R/IE3
PD781233/4/5 16-Bit Timer Unit Comparator 12 x 10-Bit A/D 32-64 KB Flash 1.5-3 KB RAM 64-pin QFP
78K0R/ID3
PD781223/4/5 16-Bit Timer Unit Comparator 12 x 10-Bit A/D 32-64 KB Flash 1.5-3 KB RAM 52-pin QFP
78K0R/IC3
PD781211/3/4/5 16-Bit Timer Unit Comparator 8 - 11 x 10-Bit A/D 16-64 KB Flash 1-3 KB RAM
38-p. SSOP 44-/48-p. QFP
78K0R/IB3
PD781201/3 16-Bit Timer Unit Comparator 6 x 10-Bit A/D 16-32 KB Flash 1-1.5 KB RAM 30-pin SSOP
131
78K0R/Ix3 I Series Overview
64K
3K 2K 1.5K 1K 30-pin IB3 1.5K 1K 38-pin

x
3K 2K 1.5K
3K 2K 1.5K
Flash (Byte)
48K 32K 16K 1.5K 1K 44-pin IC3

RAM size
1.5K 1K 48-pin
52-pin ID3
64-pin IE3
132
PD78F120x 30pin (78K0R/IB3)

12-ch, 40MHz, A/D Timer Trigger, 6phase PWM with Dead Time
30-Pin QFP Package

MC (7.62 (300 mil), 0.65 mm pin pitch)

1-ch
78K0R Core
Real Time Clock Unit 16 x 16-bit Multiplier 32 / 32-bit Divider DMA Controller
2-ch 50 ns @ 20MHz (13 MIPS) 2.7 to 5.5V -40 to +85C
A/D Converter Flash

16 KB Flash 32 KB Flash 1.0 KB RAM 1.5 KB RAM 78F1201 78F1203 6 x 10-bit

2-ch / 1-ch
Subclock Oscillator
32.768 kHz

On-chip Oscillator
8 MHz/40 MHz, 30 kHz

Up to 20 MHz
Up to 23 I/O lines
133
PD78F121x 38pin (78K0R/IC3)(1/3)

16-bit Timer Array Unit Window Watchdog Timer
38-Pin MC Package
MC (7.62 (300 mil), 0.65 mm pin pitch)

1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator

Up to 20 MHz
Up to 31 I/O lines
134
PD78F121x 44pin (78K0R/IC3)(2/3)

16-bit Timer Array Unit Window Watchdog Timer
44-Pin QFP Package


1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator

Up to 20 MHz
Up to 37 I/O lines
135
PD78F121x 48pin (78K0R/IC3)(3/3)

16-bit Timer Array Unit Window Watchdog Timer Clock / Buzzer Output Real Time Clock Unit 16 x 16-bit Multiplier 32 / 32-bit Divider DMA Controller
2-ch
48-Pin QFP Package


1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator

Up to 20 MHz
Up to 41 I/O lines
136
PD78F123x 52pin (78K0R/ID3)

2-ch
52-Pin LQFP Package


1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator

Up to 20 MHz
Up to 47 I/O lines
137
PD78F123x 64pin (78K0R/IE3)

2-ch
64-Pin LQFP Package

GB (10 x 10 mm2, 0.50 mm pin pitch) GK (12 x 12 mm2, 0.65 mm pin pitch)

1-ch
78K0R Core
A/D Converter Flash


2-ch / 1-ch
Subclock Oscillator
32.768 kHz
On-chip Oscillator

Up to 20 MHz
Up to 55 I/O lines
138
78K0R/Ix3 Peripherals
IB3
Pin count Memory 30
IC3
38 / 44 / 48
ID3
52
IE3
64
Flash [KB] 16 / 32 / 48 / 64 32 / 48 / 64 32 / 48 / 64 16 / 32 1 / 1.5 / 2 / 3 1.5 / 2 / 3 RAM [KB] 1.5 / 2 / 3 1 / 1.5 Main Clock 2 to 20 MHz extern, 8/40 MHz on-chip (CPU max. 20 MHz) Clock Subclock 32.768 kHz Sources Watchdog 30 kHz10 % on-chip 16-bit 12 channels (incl. Motor Control Feat.: 6-phase PWM with Dead Time, A/D Timer Trigger) Timers RTC 1 channel Watchdog 1 channel UART/CSI/I2C 2/1/1 channel(s) 2/1-3/1 channel(s) 2/3/1 channel(s) Serial Interface I2C 1 channel 1 ch (48-pin) Comparator 2 channels Analog Op. Amplifier 1 channel POC / LVI Power-On-Reset: 1.61V0.09V, Power-Down-Reset: 1.59V0.09V / LVI: 1.91V to 4.22V 6 channels 8-11 channels 11 channels A/D-Converter 12 channels Ports Interrupts DMA-Controller 23 6 ext. / 31 int. 31 / 37 / 41 8 ext. / 33-34 int. 2 channels 47 8 ext. / 34 int. 55
139
9. The 78K Architecture

Memory Organization Processor Registers Mirror Area Pipeline Structure
140
78K0S Memory Organization

Up to 8 KB on-chip Flash
Linear addressing
Up to 256 B on-chip RAM

Short address area 256 byte Less opcode Fast memory access
Flash memory is segmented in 256 Byte blocks 8 x 8-Bit register area
Core integrated (not mapped into RAM)
141
78K0 Memory Organization

Up to 128 KB on-chip Flash
Linear addressing up to 60K Banking is used for more than 60K
Up to 7 KB on-chip RAM
Short address area 256 byte Less opcode Fast memory access
Flash memory segmented in 1KByte blocks 32 x 8-Bit register area Code execution possible in Internal Expansion RAM
142
78K0 Banked Memory Organization

Interrupt service routines must be located in the common area Full code banking support by IAR Compiler
143
78K0R Memory Organization

Up to 512 KB on-chip Flash (max. 960KB)
Linear addressing
Up to 30 KB on-chip RAM (max. 64 KB) Flash memory segmented in:

1K blocks (78K0R/Ix3/Kx3-L/Fx3) 2K blocks (78K0R/Kx3)
32 x 8-Bit register area
144
Processor Registers
Program Counter
16-bit / 20-bit register that holds the address information of the next instruction to be executed PC is automatically incremented according to the number of bytes of the instruction to be fetched Reset signal generation sets the reset vector table values at addresses 0000H and 0001H to the program counter
78K0S, 78K0:
15
78K0R:
145
Processor Registers
Program Status Word
8-bit register consisting of various flags set/reset by instruction execution Program status word contents are stored in the stack area upon interrupt request generation or PUSH PSW instruction execution and are restored upon execution of the RETB, RETI and POP PSW instructions
78K0S: 78K0: 78K0R:
IE: Z: RBS0, RBS1: ISP:
Interrupt enable flag Zero Flag Register bank select flags Interrupt service priority flag
AC: CY:
Auxiliary Carry Carry flag
146
Processor Registers
General Purpose Registers (78K0, 78K0R)

8 x 8-bit or 4 x 16-bit register Flexible use 4 register banks (For 78K0S is only register bank 0 available.) switch by software no push / pop flexible use by interrupts
F
147
Processor Registers
Special Function Registers
Registers to control the peripheral hardware, e.g. ports, timers, etc. Delivering status information of the peripheral hardware Located in the address area 0xFFF00 to 0xFFFFF (K0R) Located in the address area 0xFF00 to 0xFFFF (K0 and K0S)
148
Processor Registers
IMS Register (78K0)
Used to adapt the internal Flash ROM and high-speed RAM Adaptation of the OCD device to the corresponding mass product
IXS Register (78K0)
Defines the internal expansion RAM size
Registers must be initialized after reset !
149
Mirror Area
Purpose
(78K0R only)
Mirror area allows a near access to constant data located in ROM (For devices with >64KB Flash memory only)
Size of the mirror area

Depending on the RAM size Larger RAM size causes a smaller mirror area Maximum mirror area size is 55.75 KB @ 4KB RAM size
150
Mirror Area
(78K0R only)
Reading data from F0000H to FFFFFH can be done by an instruction without using the ES registers as an operand E.g. Data move instruction MOV A, !addr16 instead of MOV ES, #byte MOV A, ES:!addr16
Instruction Group 8-bit data transfer Mnemonic Operands Bytes Clocks Note 1 MOV A, !addr16 ES, #byte A, ES:!addr16 Notes 3 2 4 1 1 2 Note 2 4 5 A ES A (addr16) byte (ES, addr16) Operation
1. When the internal RAM area, SFR area, or extended SFR area is accessed, or for an instruction with no data access. 2. When the program memory area is accessed.
151
Mirror Area
(78K0R only)
Processor mode control register (PMC)

This register selects the flash memory space for mirroring to area from F0000H to FFFFFH Set PMC only once during the initial settings prior to the DMA Controller.
PMC register is written in CSTARTUP routine according to the settings in the Project>Options of the IAR Embedded Workbench
152
Pipeline Structure
Features
(78K0R only)
Three-stage pipeline control is used to enable single-cycle execution of almost all instructions Instructions are executed in three stages: instruction fetch (IF), instruction decode (ID), and memory access (MEM)
t = 1 clock
SET1 P1.0 CLR1 P1.0
typical instructions
153
Pipeline Structure
(78K0R only)
Numbers of Operation clocks
Access to constants in flash memory

Pipeline operation is stopped at the MEM stage Number of operation clocks will be increased
Instruction fetch from RAM

Instruction queue becomes empty because reading from RAM takes more time CPU waits until the data is set to the instruction queue
154
Pipeline Structure
(78K0R only)
Instruction fetch from RAM
Instruction queue becomes empty because reading from RAM takes more time. CPU waits until the data is set to the instruction queue.
Data access to external data memory
CPU is set to wait mode during data access from external memory.
Instruction fetch from external memory

Instruction queue becomes empty because reading from the external memory takes more time CPU waits until the data is set to the instruction queue.
155
10. The 78K On-Chip Peripherals

Clock generator, Ports, Timers, A/D-Converter, Serial Interfaces, Interrupts
* no existing device
Flash Memory 256 KB
RAM 12 KB
78K0R 16-bit CPU Core

Main Clock 2-20 MHz On-Chip Osc. 8 MHz
156
Internal Structure
8-Bit (78K0) / 16-bit (78K0R) CPU core
Operates at up to 20MHz [@ VDD = 4.0V-5.5V (78K0), @ VDD = 2.7V-5.5V (78K0R)] Minimum instruction cycle time 100ns (78K0) , 50ns (78K0R)

VDD = 1.8V-5.5V @5MHz 8MHz High-speed on-chip oscillator On-chip voltage regulator (2.5V) leads to low current consumption and low EMI
VDD REGC
Reg.
2.5V
CPU Flash RAM Peripherals LVI
Oscillation circuit
HS Osc. LS Osc. POC
Port
VSS
157
Clock Generator
Up to four different oscillators
Main system clock oscillator up to 10 MHz (78K0S, 78K0/Kx2-L) 20 MHz (others 78K0, 78K0R) Internal high speed on-chip oscillator (typ. 1/4/8/20 MHz) Internal low speed on-chip oscillator (typ. 30/240 kHz) Subsystem clock oscillator (32.768 kHz) (78K0, 78K0R)
CPU core operation on all clocks possible (except 240 kHz on-chip osc.)
Speed can be selected by software Reduces power consumption Adaptation to VDD level Best speed / IDD relation
158
Clock Generator
Int. Oscillator: 20/8/4/1 MHz Ext. Oscillator: 2 - 20 MHz

(others 78K0/78K0R) (78K0S/78K0/Kx2-L)
Selector
CPU
2 - 10 MHz
Selector
Peripherals
Ext. Oscillator: 32.768 kHz

78K0S 78K0
Int. Oscillator: 240/30 kHz 10%
Watchdog
Oscillator terminals can be used as ports, if no external oscillator is connected.

159
Clock Generator
Possible chip operation
Main system clock and high-speed on-chip oscillator Operation mode Different speed selections by software are possible
Halt mode Oscillator is operating, CPU core is stopped, peripherals are active Halt mode release possible with interrupts, reset, by subsystem clock supplied peripherals or watchdog timer Stop mode Oscillator is stopped, CPU core is stopped, peripherals are not active Stop mode release possible with external interrupts, reset, by subsystem clock supplied peripherals or watchdog timer
Low-speed on-chip oscillator Operation mode Only the watchdog timer can operate with the low-speed on-chip oscillator For 78K0S and 78K0 also Timer H1 can operate with the low-speed onchip oscillator
160
Clock Generator
Subsystem clock Operation mode CPU core and peripherals are using subsystem clock
Halt mode CPU core is stopped, peripherals are using subsystem clock Halt mode release possible with external interrupts, reset, peripherals supplied by subsystem clock or watchdog timer
161
Clock Generator Start-up behaviour of the oscillators (78K0S)
162
Clock Generator
Start-up behaviour of the oscillators (78K0, 78K0R)
The CPU core is operating from here onwards The switch over of the CPU clock must be done by software, if necessary
Stabilisation time
Clock generator init
Normal operation mode
The external oscillator must be switched on by software
163
Initialization of Clock Generator

void initClockGenerator(void) { AMPH = 1; EXCLK = 0; OSCSEL = 1; EXCLKS = 0; OSCSELS = 0; MOC = 0x00; while(OSTC <=0x10) { __no_operation(); } PCC = 0x00; XSEL = 1; MCM0 = 1; while(MCS != 1) { __no_operation(); } RCM = 0x01; } Wait for stable main osc operation. Depends on the resonator
(78K0)
Osc > 10 MHz Setup the oscillators External quartz / resonator on X1,X2 No subclock XT1, XT2 used as ports Start oscillator
High speed mode no internal prescaler is used Provide ext. clock to peripherals and core Wait for internal switch form internal osc. to external osc.
stop internal high speed ring oscillator
164
Initialization of Clock Generator

void OscInit(void) { CMC = 0x51; OSTS CKC MSTOP OSMC = = = = 0x07; 0x08; 0; 0x01; // Clock generator initialization // // // // // //
(78K0R)
Set up the operation mode of the X1/P121, X2/EXCLK/P122, XT1/P123, and XT2/P124 pins Select the required oscillator stabilization time Select the CPU and the peripheral hardware clock and the prescaler. Enable X1 input clock operation Set operation speed mode control, if fX1 > 10MHz
while (OSTC < 0xFF) { __no_operation(); } do { MCM0 = 1; } while (MCS != 1); // // HIOSTOP = 1; XTSTOP = 1; PER0 = 0xFF; PER1 = 0x01; }
// Wait until X1 input clock stabilization time has been changed
// Switch CPU clock to fX1 input clock and // check, if CPU is operating on fX1 input clock // If not, switch CPU clock again to fX1 input clock and check again
// Switch off the high-speed on-chip oscillator and // the subclock if not needed // Switch on the peripheral clock supply
165
Clock Generator
Definition of instruction cycle time
(78K0: fCPU 20MHz, 78K0S: fCPU 10MHz)
One instruction clock cycle (TCYCL) is one cycle of the CPU clock (fCPU) selected by the processor clock control register (PCC). Example (for 78K0):
fX = 20MHz, PCC = 0x00 => fCPU = 20MHz => TCYCL = 1/ fCPU = 50ns (78K0)
e.g.
MOV r,#byte : TINST = 4 clocks * TCYCL => TINST = 4 * 50ns = 200ns (78K0)
166
Clock Generator
Definition of instruction cycle time
(78K0R: fCPU 20MHz)
One instruction clock cycle (TCYCL) is one cycle of the CPU clock (fCPU) selected by the processor clock control register (CKC). Example (for 78K0R):
fX = 20MHz, CKC = 0x18 => fCPU = 20MHz => TCYCL = 1/ fCPU = 50ns
e.g.
MOV r,#byte : TINST = 1 clock * TCYCL => TINST = 1 * 50ns = 50ns

167
Clock Generator
(78K0)
Minimum instruction cycle time vs. supply voltage
Note: This is an example for K0
168
Clock Generator
(78K0R)
Minimum instruction cycle time vs. supply voltage
Note: This is an example for K0R
169
Clock Generator
Low current consumption (78K0/Kx2)
78F0533 current consumption 8MHz intern
100 PCC=0 RUN PCC=0 per. on RUN PCC=4 HALT 1 Idd / mA main stopped LSR and TMH1 RUN fxt/2 CPU RUN 0.1 CPU with fxt/2 into HALT mode 0.01
10
PCC = 1 per. ON RUN
0.001 1.5 2 2.5 3 3.5 Vdd / V 4 4.5 5 5.5 6
PCC=2 per. ON RUN
Note: The above measured IDD data are only characteristic data and cannot be guaranteed.
170
Clock Generator
Low current consumption (78K0/Kx2)
Current Consumption 78F0533 20MHz
10.0
1.0 PCC = 0 RUN IDD / mA PCC=0/ per. ON/ RUN 0.1 PCC=4 / HALT Main stopped/ LSR & TMH1 RUN CPU RUN with fxt/2 into HALT mode fxt/2 CPU RUN 0.0
0.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Vdd / V
171
Clock Generator
Low current consumption (78K0R/Kx3)
78F1142 VDD vs IDD MAIN RUN(PER0=FFH) 9 8 7 6 IDD(m A) 5 4 3 2 1 0 0 1 2 3 VDD(V) 4 5 6

8MHz_Ring 10MHz_X'tal 20MHz_X'tal
172
Clock Generator
Low current consumption (78K0R/Kx3)
78F1142 VDD vs IDD SUB STOP 8 7 6

IDD(A)
SUB_RUN SUB_HALT STOP
5 4 3 2 1 0 0
3 VDD(V)
173
Clock Generator
Low current consumption
174
Ports
Pin I/O Circuit Types

CMOS I port (2) Schmitt-trigger behavior CMOS O ports (3-C) Output only CMOS I/O port (5-AG) Switchable between in- and output Internal pull-up settable by software CMOS I/O port (5-AN) Switchable between in- and output Internal pull-up settable by software Switchable CMOS or TTL input characteristic CMOS I/O port (8-R) Switchable between in- and output Internal pull-up settable by software Schmitt-trigger behavior CMOS I/O port (11-G) Switchable between A/D converter, logical input and output
175
Ports
Pin I/O Circuit Types
CMOS I port (12D) Switchable between A/D converter, logical input and output CMOS I/O port (13-P) Switchable between input and N-ch open-drain output CMOS I/O port (13-R) Schmitt-trigger behaviour Switchable between in- and Nch open-drain output CMOS I/O port (37-A) Switchable between in- and output Selectable oscillator input function CMOS I/O port (39) Operation mode input Programming Mode or Normal operation mode selectable
176
Ports
Example for shared function
Alternate function could be either wired-OR or wired-AND No port function control registers
Caution: Take care for the correct port settings.
177
Power-On-Clear Circuit
Functions
Generates internal reset signal at power on Compares supply voltage VDD and detection voltage VPOC = 1.59 0.09VNote (2.1V @ K0S) and generates internal reset signal when VDD < VPOC CPU can be also released by LVI, selectable by option byte
Block Diagram
Note: These are preliminary values and subject to change.

178
Operation
(78K0)
Reset not used Option byte: POCMODE = 0 Advantage: Can be used in 1.8 V applications!
VDD 1.8V VPOC=1.59V
(1) Internal reset release
(3) Start CPU operation Assumed, that VDD exceeds 1.8V after 3.6ms
.5 .0 in m
m V/
(2) Start internal state machine readoption byte
t 3.6ms
179
Operation
(78K0)
Reset used or unused Option byte: POCMODE = 1 Can be used in applications with VDD 2.7V
VDD 2.07V VPOC=1.59V
(3) Start CPU operation VDD exceeds 2.07V after 4.14ms
(2) Start internal state machine readoption byte start LVI
t 4.14ms
180
Operation
(78K0R)
Reset not used Option byte: LVIOFF = 1 Advantage: Can be used in 1.8V applications!
VDD 1.8V VPOC=1.59V

(3) Start CPU operation Assumed, that VDD exceeds 1.8V after 3.6ms
.5 .0 in m
m V/
t 3.6ms
181
Operation
(78K0R)
Reset used Option byte: LVIOFF = 1 Advantage: Can be used in 1.8V applications!
VDD 1.8V VPOC=1.59V

.5 .0 in m
m V/
t 3.6ms 1.9ms
Reset t
182
Operation
(78K0R)
Reset used or unused Option byte: LVIOFF = 0 Advantage: Can be used in applications with VDD 2.07V
VDD 2.07V VPOC=1.59V

(2) Start internal state machine readoption byte start LVI
t 4.14ms
183
Low-Voltage Indicator
Functions
Compares supply voltage VDD and detection voltage VLVI, and generates an internal interrupt signal or internal reset signal when VDD < VLVI 16 internal detection levels of supply voltage or 1 external level (1.21V) can be selected by software Changeable between interrupt or reset function Operable in STOP mode
Block Diagram
184
Detection voltage levels (for 78K0S)
185
Detection voltage levels (for 78K0R)
Note: These are preliminary values and subject to change.

186
16-bit Timer TM0

Operation Modes

(78K0S, 78K0)
Interval Timer External event counter Square-wave output PPG output Pulse width measurement Timer output
Features
Selectable clock sources 1 shared timer input/output port 1 timer input port 16-bit capture/compare
187
16-bit Timer TM0

Block Diagram
(78K0S, 78K0)
188
16-bit Timer TM0
(78K0S, 78K0)
Example for pulse width measurement

Pulse width measurement by means of restart The value for the puls width can be read out directly from CR000 No further calculations needed
78K0/Kx CR000
fallig edge force a capture in CR000

f
timer
INTTM000
TM00
INTTM010
rising edge starts the timer Ti000

edge detector
CR010
input signal
189
8-bit Timer TM5x

Operating Modes
(78K0S, 78K0)
Interval timer Interrupt request generation at preset time interval External event counter Counting of pulses of an external input signal Square wave output Output of square wave signal with any selected frequency PWM output PWM output with 8-bit resolution is possible Periode defined by overflow
190
8-bit Timer TM5x

Block Diagram
(78K0S, 78K0)
191
8-bit Timer TM5x

PWM output timing
(78K0S, 78K0)
N = 01H to FFh TCE50 = 1 Note The initial value of TO50 is low at output enable (TOE50=1) Caution Do not set CR50 to 00H in PWM output mode. Otherwise, PWM may not be output normally.
192
8-bit Timer TMH

Operation modes
(78K0S, 78K0)
Interval timer (timer output) High speed PWM
Features of the TMHx

Selectable clock sources Low-speed on-chip oscillator can be selected as clock source for TMH1 2 compare registers 2 timer output ports
193
8-bit Timer TMH

Block Diagram
(78K0S, 78K0)
194
8-bit Timer TMH
(78K0S, 78K0)
High-speed PWM mode
Countclock CMP0 value CMP1 value1 CMP1 value2 0 CMP1 value T0O (TOLEV0=0) T0O (TOLEV0=1) value 1 value 2
t
195
Timer Array Unit TAU

Timer operation
(78K0R)
Eight 16-bit timers per Timer Array Unit Each 16-bit Timer is called a channel Each 16-bit Timer can be used as an independent timer 16-bit Timers can be used in combination with a second timer
Operation Modes
Independent Operation Mode Interval timer Square wave output External event counter Divider function Input pulse interval measurement Input signal high-/low level width measurement
196

Operation Modes
(78K0R)
Combined Operation Mode PWM output One-shot pulse output Multiple PWM output LIN-bus Supporting Function (channel 7 only) used for Detection of wakeup signal Detection of sync break field Measurement of pulse width of sync field
197

Block Diagram
(78K0R)
198
(78K0R)
Basic rules for combined operating modes
199
(78K0R)
Example for interval timer mode

Generation of timer interrupt INTTM0n at a preset interval Interrupt interval can be calculated as follows:
tINT = Period of count clock x ( Set value of TDR0n + 1 )
Block Diagram of interval timer mode operation
200
(78K0R)
Example for interval timer mode
Basic timing of interval timer mode operation

(1) Start Timer
(2) Status Timer operation enabled (4) Timer counts down to 0000H
(3) Load content of Timer Data Register TDR0 to Timer Count Register TCR0
(5) When Timer Count Register TCR0 reaches 0000H, an interrupt will be generated and the timer output toggles. 201

void TAUInit(void) { PER0 |= 0x01; TPS0 = 0x0011; TMR00 = 0x0000; // // // // // // // // // // // // //
(78K0R)
TDR00 = 0x7FFF;
TS0 }
|= 0x0001;
TAU initialization for interval timer operation Channel 0 is used. Power on Timer Array Unit Select clock frequencies CK00 and CK01 CK00 = fCLK/2 and CK01 = fCLK/2 CK00 is timer input clock Software trigger is used to start count operation Interval timer mode is selected Select interval time tINT = (0x7FFF + 1) * 1 / (fCLK / 2) tINT = (0x7FFF + 1) * 1 / (20MHz / 2) tINT = 3.2768 ms Start timer count operation
202

Example for PWM mode
(78K0R)
Master channel operates in interval timer mode and counts the period Slave channel operates in one-count mode and outputs the PWM waveform The pulse period and the duty factor can be calculated as follows:
Pulse period = Period of count clock x ( Set value of TDR0nMASTER + 1 ) Duty Factor = [ Set value of TDR0mSLAVE / ( Set value of TDR0nMASTER + 1 )] x 100% 100% output = Set value of TDR0mSLAVE = 0000H 100% output = Set value of TDR0mSLAVE {Set value of TDR0nMASTER + 1}
203
(78K0R)
Block Diagram of PWM mode operation

(2)TCR0n counts down from the starting value of TDR0n, INTTM0n is output, which is the trigger for the slave timer and the TO0m output is changed (3)When TCR0n = 0000H INTTM0n is output again
(1) When channel start trigger TS0n is set to 1
(5)TCR0m counts down from the starting values of TDR0m
(4)The TO0m output is changed again
(6)When TCR0m = 0000H, INTTM0m is output and TM0m output is changed
204

Example for PWM mode
(78K0R)
Basic timing of PWM mode operation
205
Timer Array Unit TAUS

Timer operation
(78K0R/Ix3)
12 x 16-bit timers Each 16-bit Timer is called a channel Each 16-bit Timer can be used as an independent timer 16-bit Timers can be used in combination with one or more timers
Operation Modes
Independent Operation Mode Interval timer Square wave output External event counter Divider function Input pulse interval measurement Input signal high-/low level width measurement
206

Operation Modes
(78K0R/Ix3)
Combined Operation Mode PWM output One-shot pulse output Multiple PWM output PWM output with dead-time generation 6-phase PWM output generation (Triangle) A/D Trigger on triangle wave LIN-bus Supporting Function (channel 7 only) used for Detection of wakeup signal Detection of sync break field Measurement of pulse width of sync field
207

Block Diagram
(78K0R/Ix3)
208
(78K0R/Ix3)
Basic rules for combined operating modes
209
Inverter Control Functions

Operation Modes
Complementary PWM output function 6-phase PWM output function (triangular wave modulation, upper arm, lower arm, six outputs) A waveform of an arbitrary period, the duty, and the dead time can be generated by using channel 7 of the TAUS in combination.
Half-bridge output function (two outputs 2) A waveform of an arbitrary period, the duty, and the dead time can be generated by using channel 4 of the TAUS in combination. Full-bridge output function (four outputs) This function uses the above-mentioned half-bridge output.
210

Operation Modes
Non-complementary PWM output function 6-phase PWM output function (sawtooth wave modulation or triangular wave modulation, six outputs) A waveform of an arbitrary frequency, the duty, and one without dead time can be generated by using channel 7 of the TAUS in combination. Interrupt-thinning function The interrupts of channels 0 and 4 that are used for setting the period can be thinned.
211

Operation Modes

Arbitrary dead time setting function A/D converter start timing setting function (Four types of timings can be generated.) The A/D converter start timing can be output by using channels 8 and 9 of the TAUS. 0% and 100% output can be performed both with the complementary PWM output function and noncomplementary Forward and reverse settings of the timer output can be performed for each pin
212

Operation Modes
Real-time output function (PWM modulation can be performed with this function) Forcible output stop function The outputs of TO02 to TO07 can be set to high impedance during detection of the valid edge by the internal comparator or by an external pin input (TMOFF0).
213

Major Features
180 degrees sinusoidal wave generation 0%, 100% duty for Space Vector Modulation 120 degrees sinusoidal wave generation Complementary PWM for brake torque generation PWM forward/backward chopping with any timing 6-step block control wave generation BLDC motors
PMAC
AC Induction
SR
78K0R/Ix3
BLDC
Universal
DC
214
Comparators/Operational Amplifiers
Comparator Operation
The output signal of an operational amplifier can be used as the positive-side input signal of a comparator An interrupt request is generated when an overvoltage is detected (INTCMP0 and INTCMP1) The output signal of a comparator is connected to the timer array unit and sets the timer output pin (TOn) to a Hi-Z state
215
Operational Amplifiers Operation
An operational amplifier amplifies and outputs an analog voltage that is input. Eight amplification factors can be selected The output signal of an operational amplifier can be used as the positive-side input signal of a comparator. (In this case, the output signal is simultaneously input to both channels of comparators 0 and 1) The output signal of an operational amplifier can be selected as the analog input of an A/D converter
216
Over-voltage Detection Function
The timer output pin (TOn) can be set to a Hi-Z state while an overcurrent flows by using an operational amplifier and a comparator. A function to set the pin to a Hi-Z state can be selected from the following two functions 2-stage over-current detection function Reference voltage of comparator 0 < input signal voltage < reference voltage of comparator 1 Sets the TOn pin to a Hi-Z state Reference voltage of comparator 1 < input signal voltage Sets the TOn pin to a Hi-Z state.
Over-current/electromotive force detection function Input signal voltage (electromotive force) < comparator 0, or comparator 1 < input signal voltage overcurrent) Sets the TOn pin to a Hi-Z state.
217
Block Diagram of Operational Amplifier (for 78K0/Kx2-L)
Two Operational Amplifier channels One Prog. Gain amplifier channel
=> For A/D Converter
218
Block Diagram of Comparator and Programmable Gain Amplifier (for 78K0R)
219
Real-Time Counter
Operation Modes
Counting year, month, week, day, hour, minute and second Counts up to 99 years Constant period interrupt function Period: 1 month to 0.5 seconds Alarm interrupt function Alarm: week, hour, minute
Interval interrupt function Pin output function 1Hz 512 Hz 16.384 kHz 32kHz
220
Real-Time Counter
Block Diagram
221
Real-Time Counter
Basic operation
Sub-count Register (RSUBC) Counts reference time of 1 second 0000H7FFFH corresponding to 1 second @ 32.768 kHz If RSUBC reaches 8000H, the second count register (SEC) will be incremented by 1
Watch Error Correction
Watch Error Correction Register (SUBCUD) Correction of the count value of the Sub-count register (RSUBC) Improves the accuracy of the real-time counter due to inaccuracy of the subclock
222
Real-Time Counter
Example for Watch Error Correction

fSUB = 32.768 kHz:
( 1 / fSUB ) x 8000H = ( 1 / 32.768 kHz ) x 32768 clks = 1 sec ( 1 / fSUB ) x 8000H = ( 1 / 32.780 kHz ) x 32768 clks = 0.9996 sec clocks = ( fCLK / 32.768 kHz 1 ) x 32768 clks = 12 clks clocks = [(F5...F0) - 1] * 2 (F5...F0) = clocks / 2 + 1 = 12 / 2 + 1 = 7 => SUBCUD = 10000111b = 87H ( 1 / 32.780 kHz ) x ( 32768 + 12) clks = 1 sec
fSUB = 32.780 kHz:

223
Watchdog Timer
Function
(78K0S)
Detection of an inadvertent program loop (runaway) RESET generation
Watchdog Timer mode Register (WDTM)

Enable/Disable Window Watchdog Timer operation Select clock source Select overflow time
Watchdog Timer Enable Register (WDTE)
Writing ACH to WDTE clears the watchdog timer and starts counting again
Option byte
Select, if low-speed on-chip oscillator can be stopped by software or not
224
Watchdog Timer
Block Diagram
(78K0S)
225
Watchdog Timer
Operation
(78K0S)
Ring-OSC cannot be stopped
WDT operation RESET is released Counting starts
Count Clock Ring-OSC
Interval time Max. time
Set WDTM (Interval time change)
Time set by WDTM
Counter is cleared, if ACH is written to WDTE.
Cannot be stopped
Cannot be changed
Cannot be changed
The watchdog timer triggers a hard reset, The watchdog timer triggers a hard reset,
if the watchdog timer counter overflows if the watchdog timer counter overflows If WDTM register is written a second time If WDTM register is written a second time if a wrong value is written into WDTE if a wrong value is written into WDTE if the WDTE register is accessed by a 1-bit manipulation instruction if the WDTE register is accessed by a 1-bit manipulation instruction
226
Watchdog Timer
Operation
(78K0S)
Ring-OSC can be stopped
WDT operation RESET is released Counting starts
Count Clock Ring-OSC
Interval time Max. time
Set WDTM (Int. time/Source clock change)
Ring-OSC fXP STOP
Time set by WDTM
Counter is cleared, if ACH is written to WDTE.
Cannot be stopped
Cannot be changed
Cannot be changed
if the watchdog timer counter overflows if the watchdog timer counter overflows If WDTM register is written a second time If WDTM register is written a second time if a wrong value is written into WDTE if a wrong value is written into WDTE if the WDTE register is accessed by a 1-bit manipulation instruction if the WDTE register is accessed by a 1-bit manipulation instruction
227

Function
Detection of an inadvertent program loop (runaway) RESET generation
Watchdog functionality is set by option byte

Watchdog timer interval interrupt (K0R only) Enable/Disable Window Watchdog Timer operation Select overflow time Select window size Window Watchdog timer operation in HALT/STOP mode
Watchdog Timer Enable Register (WDTE)
Writing ACH to WDTE clears the watchdog timer and starts counting again
228

Block Diagram
229

Overflow
(0%) open *
RESET!
Total Window Size
25% 50%
closed
75% 100%
Writing of magic word into WDTE reset register
*: example shown for 50% window opening
if the watchdog timer counter overflows if the watchdog timer counter overflows if, the magic word is written into WDTE register when window is closed if, the magic word is written into WDTE register when window is closed if a wrong value is written into WDTE if a wrong value is written into WDTE if the WDTE register is accessed by a 1-bit manipulation instruction if the WDTE register is accessed by a 1-bit manipulation instruction
230
Option Byte
(78K0S)
Option byte area
Address 0080H User option byte area 0080H 0080H: Selection of system clock source Enable/Disable internal on-chip low-speed oscillator can be stopped by software Control of RESET pin Oscillation stabilization time on power application or after reset release
231
Option Byte
(78K0)
Option byte area
Address range 0080H to 0084H User option byte area 0080H to 0083H 0080H: Enable/Disable watchdog timer operation Enable/Disable watchdog timer operation in HALT/STOP mode Interval time setting Select window time Enable/Disable internal on-chip low-speed oscillator can be stopped by software 0081H: Enable/Disable LVI operation at start-up 0082H: Reserved area, set to 0x00 0083H: Reserved area, set to 0x00
On-chip debug option byte 0084H 0084H: Enable/Disable on-chip debug function Flash memory handling in case of failure in on-chip debug security ID authentication-
232
Option byte setting

#pragma constseg = OPTBYTE
Switch to segment OPTBYTE
__root const unsigned char option_u08 [] = {0x6E,0x01,0x00,0x00}; #pragma constseg = default

Set the four option byte values
Force the compiler to set this constant even if not used from code
233
Option Byte
(78K0R/Kx3)
Option byte area

Address range 000C0H to 000C3H User option byte area 000C0H to 000C2H 000C0H: Enable/Disable watchdog timer operation Enable/Disable watchdog timer operation in HALT/STOP mode Interval time setting Select window time Use of watchdog timer interval interrupt 000C1H: Enable/Disable LVI operation at start-up 000C2H: Reserved area, set to 0xFF On-chip debug option byte 000C3H 000C3H: Enable/Disable on-chip debug function Flash memory handling in case of failure in on-chip debug security ID authentication
234
Option Byte
(78K0R/Kx3)
#pragma constseg = OPTBYTE __root const char option[4] = { 0x10, // // // // // // // // // // // // // // // // // // // // 00010000 |||||||| |||||||+-- Watchdog timer operation stopped ||||||| in HALT/STOP mode ||||+++--- Watchdog timer overflow time is |||| 2^10 / fIL = 3.88ms @ fIL = 264kHz(Max.) |||+------ Watchdog timer operation disabled |++------- 25% window open period +--------- Interval interrupt is not used 11111111 | +-- LVI off !!!!! ALWAYS SET TO 0xFF !!!!! 10000101 | | | | | +-- Does not erase flash memory | | in case of wrong security ID | | authentication | +---- Must be set to 1 +--------- Enable on-chip debug operation
0xFF,
0xFF, 0x85
}; #pragma constseg = default
235
A/D Converter
Operating Mode
10-bit A/D Conversion Channel selection from 4 to 16 channels Each time an A/D conversion operation ends, an interrupt request (INTAD) is generated The minimum conversion time becomes 4s (78K0S) , 6.6us (78K0, 78K0R) Unused A/D Inputs can be set as I/O ports
Note: Current consumption will increase about 1 mA, when A/D conversion operation is enabled.
236
A/D Converter
Block Diagram
(78K0, 78K0R)
237
A/D Converter
void ADInit(void) { PER0_bit.no5 = 1; ADCE = 1; ADPC = 0x0F; PM15_bit.no7 = 1; ADM &= 0x01; ADM |= 0x10; ADS = 0x0F; } void ADStart(void) { ADPR0 = 1; ADPR1 = 1; ADIF = 0; ADMK = 0; ADCS = 1; } // #pragma bank = 0 (optional) #pragma vector = INTAD_vect __interrupt void IsrAD(void) { ADResult = ADCR;
(78K0R)
// Switch on A/D Converter input clock // Start A/D Converter comparator operation (ADCE-bit of ADM register) // P15_bit.no7 is used as analog input // P15_bit.no7 is set to input // ADCE-bit of ADM register (ADM_bit.no0)is already set and must remain set // A/D Conversion time is 6.6s@AVREF0=4.0...5.5V // P15_bit.no7 is used as analog input = ANI15
// Select A/D Converter interrupt default priority // Clear A/D Converter interrupt request flag // Unmask A/D Converter interrupt // Start A/D Converter operation (ADCS-bit of ADM register)
// Read conversion result // Store conversion result as value ADResult = (ADResult >> 6) & 0x03FF;
} 238
D/A Converter
Operating Mode
(78K0R)
8-bit D/A Conversion 2 channels can be selected R-2R ladder method The minimum conversion time becomes 3 s Unused A/D Inputs can be set as I/O ports
UANO = AVREF1 x ( m / 256 )
Normal Mode Write operation to the DACSn register triggers the D/A Conversion Previous D/A conversion result is held until the next D/A conversion is performed Real-time Output Mode Interrupt request signals (INTTM04 and INTTM05) triggers the D/A Conversion Value set in the DACSn register is output every time the INTTM04 and INTTM05 signals are generated
239
D/A Converter
Block Diagram
(78K0R)
240
Analog Block Diagram

OAENx disables the Op. Amp., not just the output.
(78K0R/Lx3 only)
AVDD0 AVDD1 AVDD0 AVDD0 AVDD1 Analog In ADREFP :Control by register
ANI9-10 AVREFM/ANI15 AVDD0 OPAMP0 AMP0-/ANI0 AMP0O/ANI1 AMP0+/ANI2 AVSS0 AVDD0 OPAMP1 AMP1-/ANI3 AMP1O/ANI4 AMP1+/ANI5 AVSS0 AVDD0 OPAMP2 AMP2-/ANI6 AMP2O/ANI7 AMP2+/ANI8 AVSS0

12bit ADC
AMP0
AVSS AVREFM
+ + +
ADREFM AVSS0 AVDD1
AMP1
AVDD1
12bit DAC
AMP
DAREFP
ANO0
AVDD0

AVSS1 AVDD1
AMP2
(2.0V) or (2.5V)
12bit DAC
AMP
AVDD1
Voltage Reference
AVSS0 AVSS0, AVSS1
DAREFP
ANO1
AVSS1 AVREFP/VREFOUT 241
AVSS
Multiplier
(78K0S)
Operation Mode
Multiplication of 8 bits 8 bits = 16 bits Multiplication result is available after 16 CPU clocks
242
Multiplier
(78K0)
Operating Modes

Available on all 78K0/Kx2, Lx2 with >= 48K and for all 78K0/Fx2 products Multiplication of 16 bits 16 bits = 32 bits Division of 32 bits / 16 bits = 32 bits and 16-bit remainder Multiplication result is available after 16 CPU clocks Division result is available after 32 CPU clocks An interrupt can be generated Remark: 8 x 8 bit Multiplication and 16 / 8 bit Division are part of the instruction set
243
Multiplier/Divider
Block Diagram
(78K0)
244
Multiplier
(78K0R)
Operation Mode
Multiplication of 16 bits 16 bits = 32 bits Multiplication result is available after 1 CPU clock
Remark: 8 x 8 bit = 16 bit Multiplication is part of the instruction set (1 CPU clock)
MOVW MOVW NOP MOVW PUSH MOVW MULA, #1234H MULB, #5678H AX, MULOH AX AX, MULOL ; 1 clock wait. Doesnt have to be NOP ; The result obtained on upper side ; The result obtained on lower side
245
Multiplier
(78K0R)
For use of the Multiplier instead of library software multiplication functions add the following lines to the *.XCL file:
-eNewFktName=LibFktName e.g. eHW_I_MUL_L02=?I_MUL_L02 -eHW_L_MUL_L03=?L_MUL_L03
Add the lines above to the extra options of the linker options:
Select the project folder icon projectname - Debug in the workspace window and choose Project>Options. Select Linker in the Category list to display the XLINK option pages Then select the Extra Options.
246
Multiplier
(78K0R)
Block Diagram
247
Multiplier/Divider
Operation Mode
(78K0R except 78K0R/Kx3)
Multiplication of 16 bits 16 bits = 32 bits Multiplication result is available after 1 CPU clock
Remark: 8 x 8 bit = 16 bit Multiplication is part of the instruction set (1 CPU clock)
Division of 32 bits / 32 bits = 32 bits, 32 bits remainder Division result is available after 16 CPU clocks
248
Multiplier/Divider
Block Diagram
(78K0R except 78K0R/Kx3)
249
Serial Interface CSI

Operating Modes
(78K0)
Operation stop mode This mode is used when serial transfer is not performed Reduces power consumption 3-wire serial I/O mode (MSB/LSB first selectable) 8-bit data transfer mode using three lines: a serial clock line (SCK1n), a serial output line (SO1n), and a serial input line (SI1n) The first bit of the serial transfer 8-bit data can be selected as the MSB or LSB The serial clock and the data phase/polarity can be selected The 3-wire serial I/O mode is useful for connection to devices such as peripheral I/O and display controllers which incorporate a clocked serial interface
250
Serial Interface CSI

Block Diagram
(78K0)
251
Serial Interface UART6

Operating Modes
(78K0S, 78K0)
Operation stop mode This mode is used when serial transfer is not performed to reduce power consumption Asynchronous serial interface (UART) mode Full-duplex operation is possible A UART-dedicated baud rate generator is incorporated, allowing communication over a wide range of baud rates Full buffered UART for continuous transmission / reception Three interrupts provided (Receive, Transmit, Error) Three error flags (Framing, Parity, Overrun) Asynchronous serial interface (UART) mode with LIN bus support Synchronous break field transmission from 13 to 20 bits More than 11 bits can be identified for synchronous break field reception
252

LIN support by UART6
(78K0S, 78K0)
Baud rate calibration 16 bit timer to measure the sync-field Fine tunable baud rate generator to fit master baud rate even with RC or internal oscillator
78K0/Kx
Wake-up with startup-frame External Interrupt
TI000
ISC
16 bit capture Ext. INT
INTP0
ISC
RxD6
UART6
Message Response
Message Header Sleep Bus Wake-Up Signal Frame Synch Break Field Synch Field Ident Field DATA Field
DATA Field
Check SUMField
253

Block Diagram
(78K0S, 78K0)
254
Serial Array Unit
(78K0R)
Two Serial Array Units available Four serial channels per Serial Array Unit available Two or more of various serial interfaces (3-wire serial (CSI), UART, and simplified IIC) can be used in combination
255
Serial Array Unit

Operation Modes
(78K0R)
3-wire serial I/O Data transmission/reception Data length of 7 or 8 bits Phase control of transmit/receive data MSB/LSB first selectable Level setting of transmit/receive data
Clock control Master/slave selection Phase control of I/O clock Setting of transfer period by prescaler and internal counter of each channel Interrupt function Transfer end interrupt/buffer empty interrupt Error detection flag Overrun error
256
Serial Array Unit

Operation Modes
(78K0R)
UART Full-duplex UART communication can be realized by using two channels, one dedicated to transmission (even channel) and the other to reception (odd channel) Data transmission/reception Data length of 5, 7, or 8 bits Select the MSB/LSB first Level setting of transmit/receive data and select of reverse Parity bit appending and parity check functions Stop bit appending
Interrupt function Transfer end interrupt/buffer empty interrupt Error interrupt in case of framing error, parity error, or overrun error
257
Serial Array Unit

Operation Modes
(78K0R)
UART Error detection flag Framing error, parity error, or overrun error
LIN-bus functions UART3 (ch-2 and ch-3 of unit 1 only) Wakeup signal detection Sync break field (SBF) External interrupt (INTP0) or detection timer array unit (TAU) is used Sync field measurement for baud rate calculation
258
Serial Array Unit

Operation Modes
(78K0R)
Simplified I2C Designed for single communication with a device such as EEPROM, flash memory, or A/D converter Master mode only No wait state detection
Data transmission/reception Master transmission, master reception (only master function with a single master) ACK output and ACK detection functions Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the least significant bit is used for R/W control.) Manual generation of start condition and stop condition
259
Serial Array Unit

Operation Modes
(78K0R)
Simplified I2C Interrupt function Transfer end interrupt
Error detection flag Parity error (ACK error)
* Functions not supported by simplified I2C

Slave transmission, slave reception Arbitration loss detection function Wait detection functions
260
Serial Array Unit

Block Diagram
(78K0R)
261
Serial Array Unit

void UART3Init(void) { PER0_bit.no3 = 1; SPS1 = 0x0044; SMR12 = 0x0022; SMR13 = 0x0122; // // // // // // // // // // // // // SDR[15...9] SDR[15...9] SDR[15...9] SDR[15...9] SDR[15...9] SDR[15...9]
(78K0R)
// Switch on serial arry unit 1 input clock // If fCLK = Internal high-speed osc. clock (20MHz (max.) // fCK10 and fCK11 = fCLK/2^4 = 20MHz (max.) / 16 =1.25MHz
SCR12 = 0x8097; SCR13 = 0x4097;
Setting Serial Array Unit 1 channel 2 and 3(UART3): Transmit and Receive Mode only mode, Baud rate: 9600 Bd @ fCLK=20MHz, Data bits: 8, Parity: No, Stop bits: 1, Transmit LSB first = = = = = = INT[1/2 * ( INT[1/2 * ( INT[1/2 * ( INT[1/2 * ( INT[64.6] * 128 = 0x80 fCLK/(2^SPS[3...0] * Baud rate) - 1 )] * 2 20MHz/(2^4 * 9600Bd) - 1)] * 2 20MHz/153600Bd - 1)] * 2 130.2MHz/Bd - 1)] * 2 2 = 64 * 2
SDR12 = 0x8000; SDR13 = 0x8000; . . .
// continue next page
262
Serial Array Unit

SOL1 = 0x0000; SO1 = 0x0004; SOE1 = 0x0004; STIF3 SRIF3 SREIF3 STMK3 SRMK3 SREMK3 STPR03 STPR13 SRPR03 SRPR13 SREPR03 SREPR13 = 0; = 0; = 0; = 0; = 0; = 0; = = = = = = 1; 1; 1; 1; 1; 1;
(78K0R)
// Communication data is output as is. // Serial data output of channel 0 and 2 is 1 // Enables output by serial communication operation. // // // // // // // // // // // // // // // // // // Clear SAU1 ch-2 UART transmit interrupt request flag (Transmit path of UART3) Clear SAU1 ch-3 UART receive interrupt request flag (Receive path of UART3) Clear SAU1 ch-3 UART receive error interrupt request flag (Receive path of UART3 not used) Unmask SAU1 ch-2 UART transmit interrupt (Transmit path of UART3) Unmask SAU1 ch-3 UART receive interrupt (Receive path of UART3) Mask SAU1 ch-3 UART receive error interrupt (Receive path of UART3) Default priority for SAU1 ch-2 UART transmit interrupt (Transmit path of UART3 not used) Default priority for SAU1 ch-3 UART receive interrupt (Receive path of UART3) Default priority for UART receive error interrupt (Receive path of UART3)
PM1_bit.no3 = 0; PM1_bit.no4 = 1; P1_bit.no3 = 1; SS1 = 0x000C; }
// Set port bit direction of TxD3 to output // Set port bit direction of RxD3 to input // Set port latch of TxD3 to 0 // Start Serial Array Unit 1 channel 2 and 3 operation
263
Serial Array Unit
(78K0R)
void SendByte(unsigned char TxByte_u08)// Transmit one byte { STIF3 = 0; // Clear Uart3 transmit interrupt request STMK3 = 0; // Enable Uart3 transmit interrupt request SDR12 = TxByte_u08; } #pragma bank = 0 (optional) #pragma vector = INTST3_vect __interrupt void IsrUart3Tx(void) { STMK3 = 0; Efsm1_Active_u01 = 1; } // Send byte
// UART3 transmission interrupt service // Enable Uart3 transmit interrupt request // Inform state machine Efsm1
#pragma bank = 0 (optional) #pragma vector = INTSR3_vect __interrupt void IsrUart3Rx(void) // UART3 reception interrupt service { RxByte_u08 = (unsigned char)SDR13; // copy (overwrite) received byte into buffer if (!TxBusy_u01) Efsm0_Active_u01 = 1; // Inform state machine Efsm0 }
264
I2C Interface
Operation Modes
Operation stop mode No serial transfers performed Used to reduce power consumption I2C bus mode Supports Multi-master mode Compliant to I2C-bus specification Since the SCL0 and SDA0 pins are used for open drain outputs, IIC0 requires pull-up resistors for the serial clock line and the serial data bus line.
265
I2C Interface
Block Diagram
266
I2C Interface
Since the SCL0 and SDA0 pins are open drain outputs, IIC0 requires pull-up resistors for the serial clock line and the serial data bus line
267
Interrupt Functions
Fast interrupt service handling Interrupt function can be controlled by
Interrupt Mask Flag Registers MKx Interrupt Request Flag Register IFx Can be set / cleared by software polling or vector service routine

Interrupt Priority Register PRx
Each source has its own set of flags Standby release possible by each source
268
Interrupt Functions
Fast interrupt service handling
78K0S:
78K0:
78K0R:
269
Interrupt Functions
(78K0S)
Basic Interrupt Configuration
Internal maskable interrupt
External maskable interrupt
270
Interrupt Functions
(78K0)
Software interrupt
271
Interrupt Functions
(78K0R)
Software interrupt
272
Interrupt Functions
(78K0S)
Interrupt Processing and Multiple Interrupt Processing
Interrupt request INTyy issued during servicing of interrupt INTxx is not acknowledged, because its priority is lower than that of INTxx, and multiple interrupt servicing does not take place. The INTyy interrupt request is held pending, and is acknowledged following execution of one main processing instruction. During servicing of interrupt INTxx, two interrupt requests, INTyy and INTzz, are acknowledged, and multiple interrupt servicing takes place. Before each interrupt request is acknowledged, the EI instruction must always be issued to enable interrupt request acknowledgment.
273
Interrupt Functions
(78K0)
Interrupt Processing and Multiple Interrupt Processing
Interrupt request INTyy issued during servicing of interrupt INTxx is not acknowledged, because its priority is lower than that of INTxx, and multiple interrupt servicing does not take place. The INTyy interrupt request is held pending, and is acknowledged following execution of one main processing instruction. During servicing of interrupt INTxx, two interrupt requests, INTyy and INTzz, are acknowledged, and multiple interrupt servicing takes place. Before each interrupt request is acknowledged, the EI instruction must always be issued to enable interrupt request acknowledgment.
274
Key Interrupt Function

Operation Mode
(78K0, 78K0R)
One port can be used as Key-Return port Falling edge detection Easy keyboard realization Standby release
275
Key return example
PD78F0533
V DD off on
PD78F0533
V DD
P10 P11
V DD
off on
P10 P11
V DD
P12 P13
off on
P12 P13
off on
V DD >1
H
KR0 KR1 KR2 KR3
V DD
L
KR0 KR1 KR2 KR3
INTKR > 1
276

Features

(78K0/78K0R)
Display data is read by DMA operation, segment and common signals are generated automatically. From static up to 8 times division mode. Frame frequencies can be adapted to each glass type. Up to 400 segments (for 78K0R/Lx3) can be driven. LCD controller operates based on subsystem clock, even in HALT mode. Different ways to generate LCD voltages Resistor ladder type (Internal / External) Booster type (only for 78K0/Lx2 & 78K0R/Lx3)
277
(78K0/78K0R)
LCD voltage level drive with external resistors (resistor ladder type)
Static mode bias mode bias mode
278

LCD voltage level drive with charge pump (booster)
(78K0/78K0R)
External capacitors are used to generate LCD voltage Advantage: Stable display contrast quality against supply voltage LCD voltage is independent from Vdd Recommended Capacitors: 4 * 0.47F Small LCD can use smaller capacitors at VLCx
279
Bit Bit Bit Bit 0 1 2 3 0011 0000 xxxx xxxx

1B H 1A H 19 H 18 H 17 H 16 H 15 H 14 H
Data memory address
S S S S 27 26 25 24
0011 1110 xxxx xxxx
S S S S 23 22 21 20 19 18 17 16 15 14 13 12 S S S S S S S S 11 10 9 8 7 6 5 4 S S S S S S S S
0111 0010 xxxx xxxx 0101 1110 xxxx xxxx 1101 1111 xxxx xxxx 0111 0100 xxxx xxxx 1111 1110 xxxx xxxx
13 H 12 H 11 H 10 H 0F H 0E H 0D H 0C H 0B H 0A H 09 H 08 H 07 H 06 H 05 H 04 H
(78K0/78K0R)
Open Open
LCD glass panel
S S S S
3 2 1 0
03 H 02 H 01 H 00 H
COM COM COM COM
0 1 2 3
Timing
280
(78K0/78K0R)
Division by two, LCD drive waveform example ( 1 / 2 bias )

T F Sn+2 Sn+1 Sn+3 COM 1 COM 0 Sn COM 0
V DD 1/2 V DD V ss
COM 1
V DD 1/2 V DD V ss
Sn
V DD 1/2 V DD V ss
COM 0 - S n
segment off
+ V DD + 1/2 V DD 0V - 1/2 V DD - V DD + V DD + 1/2 V DD 0V - 1/2 V DD - V DD
COM 1 - S n
segment on
LCD duplex mode, segment connection and timing
281
Software LCD solution

LCD-C/D SW emulation running on 78K and V850ES Running 100% in background with min. CPU load (less than 2%) Display memory mapped into internal RAM Flexible access from the application point of view No DC offset and excellent display quality
282
Software LCD solution

Example without additional hardware
Glass:
5V, 64 Hz, 1/2 Bias, 4 commons, 64 segments
Segment Lines
out port out port
uPD78xxxx
4 tri-state ports
Common Lines
283
DMA Controller
Data can be automatically transferred between the peripheral hardware supporting DMA, SFRs, and internal RAM without CPU load Functions

Number of DMA channels: 2 Transfer unit: 8 or 16 bits Maximum transfer unit: 1024 times Transfer type: 2-cycle transfer (One transfer is processed in 2 clocks and the CPU stops during that processing) Transfer mode: Single-transfer mode Transfer request: Selectable from the following peripheral hardware interrupts A/D converter Serial interface (CIS00, CSI01, CSI10, UART0, UART1, UART3, or IIC10) Timer (channel 0, 1, 4, or 5)
284
External Bus Interface
(78K0R/Kx3)
The external bus interface function is used to connect an external device to an area other than the internal ROM, RAM, and SFR areas Functions
The number of address bits can be selected from 8, 12, 16, and 20 Data bus supporting 8 bits and 16 bits Multiplexed bus and separate bus are supported
285

Example
(78K0R/Kx3)
Connection of external logic (e.g. ASIC, etc.)
286

Example
(78K0R/Kx3)
Connection of synchronous memory
287

Example
(78K0R/Kx3)
Connection of asynchronous memory
288
11. Flash Technology

Parameters and Security On-board Programming Self-Programming EEPROM Emulation
289
Parameters Process Density Roadmap

Process used by 78K core types Process used by V850 core types
Process 2,0 Density [m] (Gate length)

1,0 0,8 0,6
Density (0.54) equiv. to UC1 (0.54)
Process used by VR core types
Core Voltages
0,4 0,3 0,2

5.0V 5.0V
0.35 (0.35) 3.3V
0.25 (0.24) 2.5V
Density equiv. to UX4 (0.25)
0.15 (0.13) 1.5V
0,1 0,08 0,06 0,04
2.5V
0.13 (0.095) 1.2V
0.095 (0.065) 1.0V
CZ6
CZ6H
UC1
UC2
MF2
UX4
UX5
UX6
290
Parameters Technology Overview

CZ6HSF for 78K0S

Security
Chip erase protection Write protection flag Block erase protection flag Block protection
Single voltage Self-Programming Supply voltage: 2.0V ~ 5.5V Prog. 2.7V ~ 5.5V 0.35m process density Ta(prog): -40C ~ +105C Ta(read): -40C ~ +125C Max. 10 MHz Operation speed 256 bytes block size 1byte write unit
291
Parameters Technology Overview

MF2 Technology for 78K0 / 78K0R
Single voltage Self-Programming Supply voltage: 1.8V ~ 5.5V Prog. 2.7V ~ 5.5V (78K0R/Ix3/Kx3/Fx3) Prog. 1.8V ~ 5.5V (78K0R/Kx3-L)

0.15m process density TA, prog: -40C ~ +85C TA, read: -40C ~ +85C Max. 20MHz Operation speed Block size 1K blocks (78K0R/Ix3/Kx3-L/Fx3) 2K blocks (78K0R/Kx3) 4 byte write unit
292
Parameters Security Features

Chip erase protection flag
Disable the chip erase command
high Security level
Write protection flag
Disables the external write command
Block erase protection flag

Single blocks cannot be erased anymore Chip erase still possible
low
293
Parameters Security Features

All flags set
No on-board programming possible anymore Only Self-Programming possible
Boot cluster protection flag
Boot cluster 0 cannot be erased or written anymore
Protection Flags are stored in the extra area
Not part of the normal CPU address space
Flash shield window function support
Self-Programming mode only
294
Development Tools Flash Programmer

Full support of programming on
dedicated programming adapter or directly in the user system
x.xV
Power supply
is required for programming via UART
UART
Level Shifter MINICUBE2
USB PG-FP5-EE
Flash-Programming Adapter
USB
Stand alone
Target Application Hardware
295
On-board Programming Interface
(78K0S)
Programming with dedicated programmer (on-board programming)
Special single wire UART (78K0S/Kx1+ only) 8 MHz from programmer is used Fixed baud rate (115200baud)
Vdd Vss RESET X2/P122 X1/P121
296
(78K0)
Programming with dedicated programmer (on-board programming)
CSI Communication (78K0) internal 8MHz ring oscillator is used
UART communication (78K0)
External oscillator or programmer clock is used
297

Programming with dedicated programmer
(78K0R)
TOOL0 Communication Interface Internal high speed on-chip oscillator is used
298
Self-Programming General
Ability to reprogram the flash contents without a dedicated external programming tool => Self-Programming is performed by the application All single voltage flash devices will support Self-Programming User defined programming interface
Interface type (I.e. CAN, LIN, CSI, UART, other)
NEC supports Self-Programming by providing appropriate libraries
Free of charge available
Block swapping is supported for secure Self-Programming
Even if the boot loader has to be updated, it is ensured, that always a valid boot loader (two boot blocks) is available during Self-Programming
Programming an erased device must be done with a dedicated external programmer
Contains at least Self-Programming functionality

299
Secure Self-Programming Bootloader
The device is never rendered useless even if a failure occurs during writing the new boot block! If the boot block should not be updated the Boot cluster protection flag can be used to secure the Boot cluster 0 against erasing or writing
300
Self-Programming Hardware Security

Self-Programming requires software control of the FLMD0 pin
FLMD0 = LOW during normal operation FLMD0 = HIGH during Self-Programming
RD = 20 k (typ.)
VDD VSS
Caution: Please be sure to set FLMD0 to low level in reset state.
301
Self-Programming Software Environment

General functionality and data exchange flow
Normal mode

Execution of user application After RESET operation starts in this mode
Self-Programming Mode A1

Used to set up Self-Programming During this mode the firmware can be called
Self-Programming mode A2

Firmware commands are executed Not visible for the user
302
EEPROM Emulation General

EEPROM emulation is the ability to use a part of the Flash as a kind of EEPROM memory The requirements are different, depending on number and type of variables to be stored Main difference to a real EEPROM is the ability to erase only a complete block Special algorithm to handle the data sets is required
NEC supports EEPROM Emulation by providing an EEPROM emulation library free of charge
303
EEPROM Emulation - Calculation

How to calculate the possible write erase cycles We have to distinguish between write and erase cycles Example for 78F9222 from the 78K0S Family

Typ. 1000 erase cycles Min. write unit 1 byte Only one data set of 4 bytes should be written One data set (4 bytes) can be written 64 times until the block is full and must be erased This erase can be done 1000 times To secure the data during erase a second block must be used Finally we reach 64 x 1000 x 2 = 128000 write cycles for a data set of 4 byte
304
12. The 78K Development Tools

Rich Development Environment
305
Overview
(78K0S, 78K0)
AP-78K0SKX1-EE AP78K0KX2-EE AP78K0LX2

Device Driver Configurator
PG-FP5-EE
Flash Programmer for all NEC singlevoltage flash devices
EW78K-FULL-EE
Compiler, Assembler, Linker, C-Spy Debugger
ID78K0-QB
Integrated Debugger
QB-MINI2-EE
On-Chip Debug Emulator for all 78K0S, 78K0 and 78K0R devices Low-Cost Programmer
QB-78K0SKX1-ZZZ-EE
In-Circuit Emulator for all 78K0S/Kx1+ devices
QB-78K0KX2-ZZZ-EE QB-78K0LX2-ZZZ-EE
In-Circuit Emulators for all 78K0 devices
306
Hardware Tools
(78K0)
LPC-DOIT
Low Pin Count 78K0S/Kx1+ Do it! Starter Kit
QB-78K0SKB1-TB QB-78K0KF2-TB QB-78K0KC2L-TB QB-78K0LG2-TB QB-78K0LF3-TB

Target Board
78K0LX3-SEEIT
78K0/Lx3 See it! Starter Kit
78K0SAVEIT
78K0/Kx2-L Save it! Starter Kit
78K0-USB
78K0/USB Starter Kit
307
Overview
(78K0R)
AP-78K0RKX3-EE
Device Driver Configurator
PG-FP5-EE
Flash Programmer for all NEC singlevoltage flash devices
EW78K-FULL-EE
Compiler, Assembler, Linker, C-Spy Debugger
ID78K0R-QB
Integrated Debugger
QB-MINI2-EE
On-Chip Debug Emulator for all 78K0S, 78K0 and 78K0R devices Low-Cost Programmer
QB-78K0RKX3-ZZZ-EE QB-78K0RIX3-ZZZ-EE QB-78K0RLX3-ZZZ-EE

In-Circuit Emulator
308
UNDER DEVELOPMENT
Hardware Tools
(78K0R)
78K0R-COOLIT
78K0R/Kx3 Cool it! Starter Kit
QB-78K0RKG3-TB QB-78K0RKE3L-TB QB-78K0RIE3-TB

Target Board
78K0R-SAYIT
78K0R/Kx3 Say it! Starter Kit for Voice Synthesis
78K0RSAVEIT
78K0R/Kx3-L Save it! Starter Kit
78K0RIX3-SPINIT
78K0R/Ix3 Starter Kit for Motor Control
78K0RLX3SENSEIT
78K0R/Lx3 Sense it! Starter Kit
309
Performance
(78K0R)
QB-78K0RKX3-ZZZ-EE QB-78K0RIX3-ZZZ-EE QB-78K0RLX3-ZZZ-EE In-Circuit Emulator PG-FP5-EE Flash Programmer QB-MINI2-EE On-Chip Debug Mode QB-MINI2-EE Programming Mode
UNDER DEVELOPMENT
Price Performance
78K0R Save it! 78K0R Cool it! 78K0R Cool it! 78K0R/Kx3-L Starter Kit 78K0R/Lx3 Starter Kit 78K0R/Kx3 Starter Kit
78K0R Say it!
78K0R Spin it!
78K0R/Kx3 Starter Kit 78K0R/Ix3 Starter Kit for Motor Control for Voice Synthesis
310
Target Board
Features
Flash programming via On-Chip Debug Connector for MINICUBE2 Universal Patch area Allows simple interface circuitry to be added

All pins of the microcontroller are available Allows use as daughter board for initial product evaluation or development Main clock Full speed resonator (i.e. 78K0) Max. input (resonator) (i.e. V850 with PLL)
Test switch VSS and VDD pins Power LED Universal area Main clock
QB-78K0RKG3-TB
CN2 16-pin connector Test LEDs LED2 LED1 CN1 311
Power supply LED (red) User function LEDs (2 x yellow) User switch
Target Board
Possible Uses
Designed as a MINICUBE diagnostic tool Test PC installation and Driver Test USB interface Test MINICUBE2 functions Simple evaluation board for 78K and V850ES devices Download, Run and Evaluation of sample programs Daughter board Connection to target system through CN1 and CN2 connectors Reference design (Hardware and Schematic) Basic CPU configuration Basic external functions, such as RESET, OCD/Programming interface, Crystal
312
IAR Embedded Workbench

C-SPY Simulator
C-SPY Debugger ICC78K/ICC78K0R

C/EC++ Compiler IE-78K0S-NS-A IE78K0-NS-A
XLINK
Linker
C-SPY Debugger
QB-78K0MINI-EE QB-MINI-EE
A78K/A78K0R
Assembler
QB-78K0Sxxx-ZZZ-EE QB-78K0xxx-ZZZ-EE QB-78K0Rxxx-ZZZ-EE
C-SPY Debugger
Other 3rd Party Debugger
i.e. NEC Debugger...
313

General Features
One version with GUI and DOS Interface DOS interface: useful for various project management tools Win interface: compiler, assembler, linker, simulator and debugger included in the Embedded Workbench Editor and a project management tool is also included Intuitive user interface The Make Utility recompiles, reassembles, and links files only if necessary Full integration between Workbench tools and editor Support of 78K0S, 78K0 and 78K0R microcontrollers Embedded C++ support A #pragma directive to maintain portability while using processor specific extensions Central Device Selection
314

Stack Window Features
Stack contents are displayed as raw data, C/C++ variables and function frames
Current and maximum stack consumption is displayed graphically Warnings can be issued, if the stack exceeds a certain level or if the stack pointer points outside the stack memory
315

Trace Window Features
Function Trace Displays a subset of the trace data corresponding to calls to and returns from functions Find In Trace Shows the same columns and data as full trace but only those rows which matches a certain search criteria Trace Expressions Possibility to enter expressions that appears as extra columns in the Trace window Browse mode Follow the execution history by scrolling the Trace window The source and disassemble windows highlight the corresponding location
316

C-Spy Debugger Features
All C-Spy Drivers are included in one product package: EW78K-FULL-EE: Full version EW78K-KSxx-EE: Kickstart version (limited code size) The C-Spy Debugger supports different targets: IECUBE Emulators (QB-78K0xxx-ZZZ-EE, QB-78K0Rxxx-ZZZ-EE) MINICUBE Emulators (QB-78K0MINI-EE, QB-MINI2-EE) TK-Interface (direct USB Interface to starter kits) Simulator (Instruction set simulator)
317

Basic C-Spy Debugger Windows

Workspace Window Source Window(s) Watch Window Disassembler Message Window
318

License for a single user
Installation of the software directly possible with QuickStart-key Receiving permanent key after registration Different license assignments available Individual PC License transfer by floppy disk License management needed
License for multiple users

Server handles licenses automatically Different license assignment available Individual server License transfer by floppy disk License management needed
DONGLE License transfer by DONGLE
DONGLE License transfer by DONGLE
319

IAR EWB-PACKET
Software, License number, Quick Start-key and License manager Decision for a license to a "DONGLE Install the DONGLE Installation of software with license number and Quick Start-key Time limited installation of the software, after 30 days the license will expire Automatic generation of the individual license information during the installation of the software [registration.txt] Sending license information to IAR [registration.txt] Reception of permanent key from IAR Upgrading to unlimited installation with the license manager, the license is now assigned to an individual PC
320
Decision for a license on an individual PC Installation of software with license number and Quick Start-key Time limited installation of the software, after 30 days the license will expire
Upgrade to unlimited installation with license manager, the license is now assigned to a DONGLE
Applilet
Applilet is a software tool to generate device driver code for initialization and use of on-chip peripherals
Features
Device driver code generation based on the user settings in the Graphical User Interface Initialization Code and API functions are provided
Targets
Easy to use Graphical User Interface Fasten the Development Process Improve Code Quality Common API to all devices
321
Applilet
Applilet API Specification
User Application Layer

User Code
Applilet
Configurator
Absorbs differences of each CPU type Calls library sw of the CPU Device Layer
CPU Application Layer
Library sw generated by the Configurator
CPU Device Layer
CPU
322
Applilet
Project Wizard
The integrated project wizard guides the user step by step through the New Project creation
78K0R/KE3 uPD78F1166
78K0R/KE 3
uPD78F116 6
323
Applilet
Graphical User Interface Peripheral View
324
Applilet
Graphical Device Configuration
User friendly and intuitive Automatical plausibility checks avoid illegal configurations
325
Applilet
Graphical Device Configuration
Source code generation can be started, when configuration is completed Configuartion changes can be merged into a previously generated configuration or previously generated source code
326
MINICUBE2
Features

On-chip Debug Emulator Flash Programming Standard debug function support Go & Go, Start from here, Come here, Restart, Step execution, Forced break Hardware breakpoints: 1 Software breakpoints: 2000 Pseudo Real-Time RAM Monitoring (2-wire mode only) Direct Memory Manipulation during RUN (2wire mode only) USB 2.0 interface Supplied via USB (no power supply necessary) 10 byte security ID code to avoid unauthorized access to device
327
MINICUBE2
Circuit connection example

Target connector can be used for MINICUBE2 and FlashPRO5 TXD and RXD are internally connected in MINICUBE2, but not in FlashPRO5
328
MINICUBE2
Memory Resources
329
MINICUBE2
Hardware Configuration
This cable cannot be used for 78K0R microcontrollers debugging
78K0
78K0S/
330
IECUBE
Features

Professional In-Circuit Emulator 512kB Emulation memory Various Real-time and Nonreal-time program execution functions Event break function Software break function Trace function: 128K frames Real-time RAM monitoring Time measurement USB 2.0 interface
331
IECUBE Trace Setting

Emulator
Trace
332
IECUBE Trace window
333
IECUBE
Self-Test Utility
Checks IECUBE operation when it does not operate normally Takes about 1 minute for testing Logs test results useful when making technical inquiries

Included in the NEC Integrated Debugger
78K0R
Screen during testing
Result output screen
334
IECUBE - Sockets and Probes

Mandatory
Probe Extension Cable QB-144-EP-01S Exchange Adapter QB-<nn><pp>-EA-0<x>T Caution: Pls. refer to the UM for the correct number of <x> ICE Connector QB-<nn><pp>-YQ-01T Target Connector QB-<nn><pp>-NQ-01T
<nn> : pin number, e.g. 80-pins => <nn> = 80 <pp> : package type, e.g. GC-package => <pp> = GC <x> : 1, 4, 6, or 8 according to device type, e.g. <x> = 1
335
IECUBE Sockets and Probes

Selectable
Space Adapter QB-<nn><pp>-YS-01T
Check Pin Adapter QB-144-CA-01
Mount Adapter QB-<nn><pp>-HQ-0<x>T
<nn> : pin number, e.g. 80-pins => <nn> = 80 <pp> : package type, e.g. GC-package => <pp> = GC <x> : 1 or 3 according to device type, e.g. <x> = 1
336
IECUBE Sockets and Probes

Mandatory
Probe Extension Cable (EP) Exchange Adapter (EA) ICE Connector (YQ) Target Socket (NQ)
Selectable
Space Adapter (YS) Chip Cap (HQ) Check pin Adapter (CA)
Mounting the device
337
Flash Programmer
Programming with external programmer
FlashPRO5 PG-FP5-EE MINICUBE2 QB-MINI2-EE In flash programming mode
g nin n Flash Programming Support Package pla er Dedicated third party programmers nd U

Ertec (www.ertec.de) g nin n Data I/O (www.dataio.de) pla r BP Microsystems (www.bpmicrosystems.com) de n

U
Programming Adapter
Self-programming
NEC Self-programming Library
338
Flash Programmer
Full support of programming on
dedicated programming adapter or directly in the user system
x.xV
Power supply
is required for programming via UART
UART
Level Shifter MINICUBE2
USB PG-FP5-EE
Flash-Programming Adapter
USB
Stand alone
Target Application Hardware
339
Flash Programmer
PG-FP5-EE

Supports programming of all single-voltage and the most dual-voltage NEC flash devices On-board programming Stand-alone programming Program files and programming parameters are stored in the internal flash memory Multiple program files and programming parameters can be stored in the internal flash memory Universal host connection, a Windows User interface is provided for terminal connection CSI, CSI + HS, UART, I2C, Port Mode and TOOL interface supported for data transfer to flash devices USB 2.0 interface or RS232 interface selectable
340
Flash Programmer - Programming Modes Host controlled:

Target hardware or programming adapter or
In this mode, the programmer is controlled by a host PC via USB or RS232 cable.
Stand-alone:
Target hardware or programming adapter
Up to 16 MB code can be stored in the internal memory for stand-alone programming.

341
Flash Programmer
Functional Overview PG-FP5-EE
342
Flash Programmer
MINICUBE2 QB-MINI2-EE

Supports programming of all 78K devices Attached to 78K0R IECUBE? Universal host connection, a Windows User interface is provided Uses same PRM files as PG-FP4 Host connection via USB 2.0
343
13. Support
344
Technical Product Support

TPS provides comprehensive Pan-European support for all technical issues related to the NEC microcontroller/computer products:

Device specific support Application specific support Hardware and software development tool support Quality and reliability support Device failure analysis Workshop & Trainings on devices and development tools
345
Organization
Today 26 engineers are involved in the direct general support for microcontrollers
The support team is organized in groups which take care for one specific device family and have a dedicated group - email address

[email protected] [email protected] [email protected] [email protected]
for all 78K support for all V850 support for all flash-related questions for all compiler related issues (IAR/Greenhills)
Additional in-house resources are available for special subjects CAN, LIN other automotive related subjects EMI
346
http://www.eu.necel.com
347
http://www.eu.necel.com
General documentation
Microcontroller related downloads
348
Document Database
Access on all released documents

Product Information, Product Letters Data Sheets, Users Documents Customer Notifications Technical Reports Application Notes ...
349
Tool Update
Tool Update Request is possible via Internet Free of charge Pick-Up Service
350
Development Tool Download

Development Tools Software download possible via Internet
Compiler, Assembler and Linker SW package (License necessary) Debugger SW package
Device Files
SW package Flash Programming Parameter Files ...
Flash Programmer
351
Tool Repair
Tool Repair Request is possible via Internet
Easy by filling our Tool Repair Questionnaire Free of charge Pick-Up Service
352
Published by NEC Electronics (Europe) GmbH March 2009 Document No. EPMC-PU-0114-1.0 353

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78K Primer Kit

78K0S & 78K0 (8-bit) & 78K0R (16-bit)

Architecture, Peripherals and Development Tools

Purpose of the 78K Primer Kit

10. The 78K On-Chip Peripherals

8. Different NEC cores

11. Flash Technology

78K0 & 78K0R Microcontroller Series

Parameters and security On-board programming Self-Programming EEPROM Emulation

9. The 78K Architecture

Memory Organization Processor Registers Mirror Area Pipeline Structure

12. The Development Tools Environment

78K0 & 78K0R Tools Environment

2. General Purpose & Industrial MCU Roadmap

Higher performance & large memory

High performance, low power & High integration

Low power & high integration

Low pin count MCU

LCD drive / control Industrial ASSPs 128 144 pin

3. Industrial Applications Focus

Industrial Markets & Applications

Small Appliances Power Tools

Fire & Security Lighting Metering Biometrics

Therapy Other Healthcare

Industrial Motor Control

4. Industrial Application Examples

Fire Detectors Washing Machines Electricity/Water/Gas Meters

Some Industrial Applications

5. NEC Microcontroller Nick-Naming

CPU core name (78K0, 78K0S

6. 8/16-Bit Microcontroller Nomenclature

8. Different NEC Cores

Different Cores for each Application Requirement

High - End 8-bit

8. Different NEC Cores

High - End 8-bit

8. Different NEC Cores

4 register banks organized as

High - End 8-bit

Free configurable software stack Vectorized interrupts for each source

8. Different NEC Cores

High - End 8-bit

Free configurable software stack Vectorized interrupts for each source

4 interrupt priority level

8-bit Micro Series

8-bit 78K0 K Series

High - End 8-bit

Low Pin Count Microcontrollers 78K0S/Kx1+

High - End 8-bit

78K0S/Kx1+ Product Line-up

78K0S/Kx1+ - Version Line-Up

PD78F950x 10pin (78K0S/KU1+) (1/2)

Window Watchdog Timer

Power-On Reset Low-Voltage Indicator Up to 8 I/O lines

PD78F920x 10pin (78K0S/KU1+) (2/2)

Interrupt Controller 10-Pin Package

8-bit Timer TMHx

Window Watchdog Timer

Cer. / Crystal Oscillator