GAT_EEE_NBA_LD_10ES33_CO_2015-16

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GLOBAL ACADEMY OF TECHNOLOGY, BENGALURU

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Subject Name LOGIC DESIGN No. of Sessions 52


Subject Code 10ES33 Year of Study 2015-16

COURSE OUTCOMES
CO. Program Bloom’s
Course Outcomes No. of Sessions
NO. Outcomes Levels
On completion of this course, students are able to
Understand combinational circuits with Karnaugh map, Quine McClusky and PO1, PO2,
10
CO1 MEV methods PO3, PSO3 Understand

PO1, PO2,PO3
Analyze multiplexers, demultiplexers, decoders and encoders.
CO2 PSO3 Understand 15

PO1,
Interpret the sequential circuit consisting of latches, flip-flops and counters. PO2,PO3,
CO3 Understand 15
PSO3

PO1,
Design mealy and moore models, and construction of state diagram PO2,PO3,PSO
CO4 Understand 12
3

Total Number of Sessions 52


GLOBAL ACADEMY OF TECHNOLOGY, BENGALURU
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

CO-PO Mapping
CO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
CO1 3 2 2 - - - - - - - - - - - 2

CO2 3 2 2 - - - - - - - - - - - 2

CO3 3 2 2 - - - - - - - - - - - 2

CO4 3 2 2 - - - - - - - - - - - 2

10ES33 3 2 2 - - - - - - - - - - - 2

Course Coordinator Module Coordinator Program Coordinator Head of Department

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