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    GAT_EEE_NBA_VLSI_10EE764_CO_2015-16

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    Bharath G K

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    GAT_EEE_NBA_VLSI_10EE764_CO_2015-16

    Uploaded by

    Bharath G K
    1 views2 pages

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    1 views2 pages

    GAT_EEE_NBA_VLSI_10EE764_CO_2015-16

    Uploaded by

    Bharath G K

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
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    GLOBAL ACADEMY OF TECHNOLOGY, BENGALURU

    DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

    Subject Name VLSI CIRCUITS AND DESIGN No. of Sessions 52


    Subject Code 10EE764 Year of Study 2015-16

    COURSE OUTCOMES
    CO. Program Bloom’s
    Course Outcomes No. of Sessions
    NO. Outcomes Levels
    On completion of this course, students are able to
    PO1, PO2, PO3,
    15
    CO1 Understand MOS, CMOS, and BiCMOS fabrication processes. PSO3 Understand

    PO1, PO2, PO3,


    CO2 Describe electrical properties and circuit design processes of MOS PSO3 Understand 15

    PO1, PO2, PO3,


    CO3 Analyze scaling models and scaling factors for VLSI circuits. PSO3 Analyze 10

    PO1, PO2, PO3,


    CO4 Design MOS circuits, subsystems, and layouts. PSO3 Apply 12

    Total Number of Sessions 52


    GLOBAL ACADEMY OF TECHNOLOGY, BENGALURU
    DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
    CO-PO Mapping
    CO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
    CO1 3 2 2 - - - - - - - - - - - 2

    CO2 3 2 2 - - - - - - - - - - -
    2

    CO3 3 2 2 - - - - - - - - - - -
    2

    CO4 3 2 2 - - - - - - - - - - -
    2

    CO5 3 2 2 - - - - - - - - - - -
    2

    2
    10EE764 3 2 2 - - - - - - - - - - -

    Course Coordinator Module Coordinator Program Coordinator Head of Department

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