Attachment(11)

ELECTRONIC DEVICES AND CIRCUITS LAB
VIGNAN’S
INSTITUTE OF INFORMATION TECHNOLOGY
(AUTONOMOUS)
DUVVADA
DEPARTMENT OF ELECTRONICS & COMMUNICATION
ENGINEERING
ELECTRONIC DEVICE AND CIRCUITS

II B.TECH, ECE, I SEMESTER
VR-22 Regulation
VIIT, Department of electronics and Communication Engineering Page 1

The Purpose of the Laboratory

Electronics is an experimental science. The theoretical concepts and relationships
introduced in the lecture part of the course describe the general nature and behavior of
real phenomena. They were, appropriately, discovered by (or inducted from) careful
observation and thoughtful analysis of actual experiments. Genuine understanding
entails being able to relate the abstract ideas to the particular facts to which they
correspond.
The premise of the scientific method is that (observation of) nature is the ultimate judge
of the truth of any physical theory. Indeed, experiments designed to prove certain ideas
have often ended up showing them to be wrong. Consequently, all physical concepts
must be verified experimentally if they are to be accepted as representing laws of
nature.
Accordingly, the introductory physics laboratories have the following purposes and
goals:
1. To provide an experimental foundation for the theoretical concepts introduced in the

lectures. It is important that students have an opportunity to verify some of the ideas for
themselves.
2. To familiarize students with experimental apparatus, the scientific method, and

methods of data analysis so that they will have some idea of the inductive process by
which the ideas were originated. To teach how to make careful experimental
observations and how to think about and draw conclusions from such data.
3. To introduce the methods used for estimating and dealing with experimental
uncertainties, including simple ideas in probability theory and the distinctions between
random (statistical) and systematic "errors." This is essential in understanding what
valid conclusions can be deduced from experimental data and that, properly obtained,
these conclusions are valid, notwithstanding the uncertainty of the data.
4. To learn how to write a technical report which communicates scientific information

in a clear and concise manner.
5. To introduce new concepts and techniques which have a wide application in

experimental science, but have not been introduced in the standard courses. These may
require that the student consult additional textbooks.
The laboratory is not a contest whose object is to get the "right answer." The purpose is
to learn how to gain knowledge by looking at reality, not an attempt to make reality
conform to preconceptions. The important thing is to learn how to be observant, to
really see what happens, and to deal with this information with the strictest integrity.
And to understand, or learn to understand, the meaning of what happens.
VIIT, Department of Electronics and Communication Engineering Page 2

Even if you get results totally at variance with theory (as may happen due to a mistake,
or a systematic uncertainty) you will get a high grade if you report it honestly and
demonstrate that you understand what you did and how your results occurred. (If you
have trouble interpreting your results, contact your TA for help.) On the other hand, if
you get perfect agreement with theory by faking your data you will fail.
Practical ability to do experiments and analyze data is usually acquired through practice
and experience. Practice is very important in learning any new discipline; such as, for
example, a new language. A good lecture may be very helpful but not fully useful
without actual practice. In experimental science, practice involves solving many
problems (i.e. homework) and performing a variety of experiments (i.e. labs). Practice
is essential to being able to make the connection between theory and experience.

Electronics Lab Safety Information

Safety First: Execution of Lab work in a safe manner is even more important than
performing accurate electronic measurements and construction neat circuits. The first
step is always to become familiar with the Lab itself. You should know where the fire
extinguishers and the emergency exits are located. Equally as important is the location
of nearest phone to call for help. You should also know all equipments and substances
that are used in the Lab to take the necessary precautions.
The ever-present hazard in an electronics Lab is the electric shock. Most people equate
the severity of electric shock with the voltage, i.e., a 1,000-V shock is deadlier than a
100-V shock. This is not true. The real measure of a shock is the amount of current that
flows through the body. Table below lists the impact of ac (alternating) current on the
body:
Current Effect
1 - 5 mA Threshold of sensation
5 - 20 mA Involuntary muscle contraction ("can't-let-go")
20 - 100 mA Pain, breathing difficulties
100 - 300 mA Ventricular filbrilation (changes in heart beat), possible death
> 300 mA Respiratory paralysis, burns, unconsciousness
The amount of the current flowing through the body during an electric shock depends
on the voltage and the resistance between the terminals of the voltage source. This
resistance consists of: (1) resistance of the contact point between body and circuit (e.g.,
a ring or a watch), (2) skin resistance at the point the current flows into the body, (3)
internal resistance of body, (4) skin resistance where current flows out of the body (e.g.,
shoes). Obviously, the larger the resistance, the smaller would be the current.
Therefore, in order to minimize the electric shock hazard:
(1) Always power down the electrical equipment, disconnect the power cord, and wait
for a few seconds before touching exposed wires. Remember that circuit breakers are
usually set for much larger currents (e.g., household breakers are at 15 A and higher)
than the current that kill a person (200-300 mA). Do not assume that because your
circuit is powered with 5 V, it is not dangerous. In some circuits, capacitors can be
charged to a much higher voltage and give you a nasty surprise. Death by electrocution
has been reported at a voltage as low as 42 V (DC).
(2) Do not wear rings, watches, necklace, and any any other loose metallic objects.
Rings and watches are specially dangerous as the skin beneath them is wet by sweat,
making the resistance of skin much lower.

(3) Make sure that your hand are dry. Resistance of wet skin can be as low as 1 kOhm
as opposed to dry skin which is about 500 kOhm.
(4) Make sure that your shoes are dry (specially in rainy days). Do not lean on metallic
objects (like legs of the bench tables) as you are providing a very large contact area for
the current to flow out of your body to ground.
In case of electric shock, cut the power and/or remove the victim as quickly as possible
without endangering yourself. If the power switch is not readily available (remember
the Lab Emergency Shut-Off Power switch near the door), use an insulting material
such as dry wood, rope, belt, etc. The resistance of body decreases during a shock so
action should not be delayed. Send someone to call for help immediately.
If the victim is unconscious and has stopped breathing, start artificial respiration at once. Do
not stop until a medical authority has arrived and taken over. Do not stop even if the victim
does not have a pulse.
Additional Lab Safety Rules:

(1) Each group is responsible for the their Lab bench. After the Lab exercise is over, all
equipment should be powered down and all probes, cords, etc. returned to their proper
position. Do not cut and drop wires on the Lab bench. Lose cut wires have caused many
short circuits. Your Lab grade will be affected if your bench is not tidy when you leave
the Lab.
(2) Always get instruction on how to use the tools and instruments. Use only the tool
designed to do the job in hand. One tool that requires special attention is the soldering
iron. Careless use can result in painful burns and fire. Always put the hot iron in its
holder. Turn the iron one only when you need to use it and turn it off when you are
done (even if you may need it in 5 minutes). The short warm-up time is a small price to
pay for the prevention of potential fire and burn hazards.
(3) Do not wear rings, watches, necklace, and any any other loose metallic objects
(electric shock hazard). Do not wear lose clothing. They cause all sort on un-intentional
accidents (from dropping equipments to being set on fire with a soldering iron).
(4) No open drinks and/or food is allowed near the Lab benches. Spilled drinks have
caused many accidents.

How to work effectively in the Lab

SAFETY FIRST: Read the safety information and follow safety guidelines. Better safe
than sorry!
Come to the Lab prepared. Know the circuits for the Lab exercise and think about
how you make the circuit on the breadboard, etc. Make a check list of the data that you
need to take. Do not start any lab work before you are comfortable that you know what
you are doing.
Consider the Lab exercises and how long it would take to do them. Pace yourself in
the lab accordingly. Most of the students waste a lot of time at the beginning of the
session and rush through in the last hour.
Assemble your circuit on the bread board neatly and try to be as close as possible to
the circuit diagram. This helps you debug the circuit easily. Check your circuit
throughly before powering up the circuit. Check that your circuit works before taking
any data! For example, if you are building an amplifier, the output signal should be
proportional to the input signal, vary the input signal amplitude and frequency and see
if the output signal follows the input. Take turn: one student assembling the circuit on
the board and the second checking the circuit after it is finished. It frequently happens
that after taking data for 30 minutes, the students discover that the circuit is not correct.
Remember carpenters idiom: "Measure twice, cut once."
Keep your circuit analysis in front of you when you are doing the Lab exercise.
Compare your measurements with your calculations continuously. Check some of the
voltages and currents that you have calculated (but are not asked in the Lab exercise
handout) to make sure that your circuit behaves correctly. You will soon learn that
certain voltages and currents are critical in each circuit as they can give you an
indication of what is wrong very fast.
Compare your experimental data with your calculation. Do not wait to do that later. It
frequently happens that students come back to the Lab as they discover that their data is
wrong when they start writing their report.
When you take data in the Lab., it is very important that you plot the data
immediately (before moving to the next Lab exercise). In fact, get into the habit of
entering your data both in tabular and graphical form as you go through Lab. exercise.
Immediate plotting of data helps in the following:
You can see if any data point does not follow the general trend of the data
(i.e., a point is sticking out of the curve that fits the data). This is a prompt for
you to re-examine that point and make sure that you have not made a mistake in

getting the data point. Most of the time you cannot find these out-of-place data
points from a table.
You can see if you have enough data to plot a meaningful curve through them.
One has to take more data near location when the data changes rapidly or the
interpolation between the data points lead to in-correct information.
Keep your work bench clean and tidy. Return the cables, wires, etc that you do not
need to their specified location before moving to the next Lab exercise.
Maintain a Lab Notebook. Students are encouraged to maintain a Lab note book (a
Technical Journal) as is required of engineers in the industry.
You can do all of the above in one step! Assemble the frame work of your lab
report in your journal before coming to the Lab. For each exercise include your circuit
analysis, a circuit diagram (including location where you will attach multi-meter, scope,
etc.), experimental set up, and leave space for the data you take in tabular form and
space for comparison of calculation with the experimental data, observations, and
conclusions. Once you get the hang of it, you will find the information in the Lab
Notebook is basically the first draft of your Lab report.

PLOTTING DATA
Graphical representation of data is a powerful tool for understanding trends and
reaching conclusions. The graphical representation (instead of a table) is generally used
for two purpose:
To deduce any general trends, e.g., the shape of the iv curve of a resistor (a line) is
suggestive of Ohm's Law V/I = const = R.
To interpolate (and in some instances extrapolate) the data. For example the iv curve
for an element can be used to find the value of the current in that element for any
voltage.
When you take data in the Lab., it is very important that you plot the data immediately
(before moving to the next Lab exercise). In fact, get into the habit of entering your
data both in tabular and graphical form as you go through Lab. exercise. Immediate
plotting of data helps in the following:
You can see if any data point does not follow the general trend of the data (i.e., a
point is sticking out of the curve that fits the data). This is a prompt for you to re-
examine that point and make sure that you have not made a mistake in getting the data
point. Most of the time you cannot find these out-of-place data points from a table.
You can see if you have enough data to plot a meaningful curve through them. One
has to take more data near location when the data changes rapidly or the interpolation
between the data points lead to in-correct information.
Plotting Data:
You have to consider several important points in plotting any data. I use plotting iv
curves here as an example.
Identify axes. e.g., the vertical axis denotes the current and the horizontal axis
denotes the voltage.
Label axes clearly and provide units. e.g., "current" or "i" is not sufficient as it is
not clear if the current is in A or mA, etc. Also, it is not clear which current you are
referring to unless you have a circuit and identified i on the circuit.
Choose type of graph. e.g., linear, semi-log or log
Choose axes limits based on the range of data. Choose the axis limits to be 10% to
20% larger than the range of data, e.g., if we are considering voltages between -4 to 4
V, the horizontal axis should be long enough to fit data from -5 to +5.
Provide divisions (tick marks) and their labels on each axis. As the location of
each point in the graph (its distance from origin) denotes the value of current and

voltage, tick marks (units of measurement along the axis) are needed so that we can
translate currents and voltages to distances on each axis to find the location of the data
point and vice versa (for any point, we can find its current and voltage). Note that too
few divisions makes reading the data difficult, too many divisions makes a mess.
Locate the position of each data point. Add the measurement uncertainty if you
know that. Use symbols (e.g., solid dots) to distinguish the data points from the curve
that is drawn through data. Make sure that these symbols are not so large that the value
of the data points is lost.
Draw a "best-fit" curve through the data points. In drawing the curve through data
points, there is a large difference between connecting data points by straight lines and
to fit the best curve through the data points. Connecting data with straight lines does not
provide useful information (unless there is a large number of data points and the
uncertainty in each point is very small). Fitting the best curve (or a cubic spline
interpolation between data points) provides a better means to find the trends and
interpolate between the data points.
Make sure you have enough data points. There should be sufficient data point
where the function changes rapidly to find the "best-fit" curve.
Provide a figure caption. In a write-up, figures and plots tend to stand out. Figure
captions help the reader to discern most of the information in the plot without referring
to the text. They are also used to bring to attention certain properties of the plot that is
important. Figure captions should provide useful information. For example, in the iv
curve example above, the caption "current versus voltage" is not useful. A good short
caption would be the "The iv curve of 1N4148 diode."
Use the plotting software wisely. We encourage you to use computer softwares
(such as MATLAB) to plot your data. However, it is essential to remember that most
softwares use their own default values when you do not provide the necessary
information that were out-lined above. For example, a large number of plotting
softwares just join the data points with straight lines or put huge symbols on the data
points.
Plot Types:
Linear (Linear-Linear) Plots: These are the most common plots. The distance along
each axis is directly proportional to the value of parameter. Note that the shape of the
curve in a linear-linear plot is the same as the function, e.g., a linear function, y = ax +
b shows up as a line, etc. Note that the origin does not have to be at (0,0).
Linear-linear plots have two shortcomings: (1) If the data span a large range (e.g., we
have current data that include 0.1 mA and 10 mA), the data at smaller range will be all
located on top of each other. One solution to this problem is to have two different
linear-linear plots (e.g., one to include data in 0 to 1~mA range for small current data

and one to data in 0 to 10~mA range for large current data). (2) It is not easy to find the
functional trend of data if it is not nearly linear, e.g., it is hard to differentiate between y
= x3 and y = exp(x).
Semi-Log (Linear-Log or Log-Linear) Plots: These plots are used to avoid the
shortcomings of linear-linear plots. In these plots, one of the axis (e.g., x axis) is
marked in linear fashion (the distance along each axis is directly proportional to the
value of parameter) while the other axis (e.g., y axis) is marked in logarithmic fashion,
i.e., the distance along each axis is directly proportional to the log of value of
parameter. On the log axis, equal distance between two major tick mark is equally to a
factor of 10 change in the value. You need to instruct your graphics program to use
logarithmic axis (or if you are drawing by hand, use semi-log graph paper).
The shape of a semi-log plot (with log y axis) is exactly the same as plotting log(y)
versus x in a linear plot. The shape of curve in a semi-log plot is not the same as the
function, e.g., a line on log-linear plot does not correspond to y=ax+b, rather to
log(y)=ax or y=exp(ax), an exponential function. (A line in linear-log plot corresponds
to a logarithmic function). As such, this type of graph is ideal for plotting exponential
functions.
Note that zero or negative values are not allowed for the log axis as log of negative
numbers does not exist.
Log (Log-Log) Plots: These plots are also used to avoid the shortcomings of linear-
linear plots. Here, both axis are marked in logarithmic fashion, i.e., the distance along
each axis is directly proportional to the log of value of parameter. You need to instruct
your graphics program to use logarithmic axis (or if you are drawing by hand, use log-
log graph paper).
A log-log plot is exactly the same as plotting log(y) versus log(x) in linear fashion.
Note that the shape of curve in a log plot is not the same as the function, e.g., a line on
log plot does not correspond to y=ax+b, rather to log(y)=a log(x) or y=xa.
The shortcoming of the log-log plots is that zero or negative value of x or y is not
allowed on a log-log plot as log of negative numbers does not exist.

INDEX
Page
Exp.No. LIST OF EXPERINMENTS
No.
PN JUNCTION DIODE V-I CHARACTERISTICS
1. a) Germanium Diode (Forward & Reverse Bias) 12
b) Silicon Diode (Forward Bias) only.
2. ZENER DIODE V-I CHARACTERISTICS 19
RECTIFIERS
3. 25
a) HALF WAVE RECTIFIER WITHOUT AND WITH FILTER
b) FULL WAVE RECTIFIER WITHOUT AND WITH FILTER
BJT CHARACTERISTICS-CE CONFIGURATION (INPUT &

4. 34
OUTPUT).
BJT CHARACTERISTICS-CB CONFIGURATION (INPUT &

5. 38
OUTPUT)
Verify truth tables of AND, OR, NOT, NOR, NAND, Ex-OR, Ex-
6. 42
NOR basic logic gates
To verify and implementation of an S-R flip-flop using

7. 47
NOR/NAND gates, J-K and D Flip- flops

1. P-N JUNCTION DIODE V-I CHARACTERISTICS
AIM: To verify the V-I characteristics of P-N junction diode and to calculate the
Static and dynamic resistances at suitable operating points in forward and reverse bias
conditions.
APPARATUS: 1) Regulated Power supply.

2) Bread board.
3) P-N junction diode 1N 4007)
4) Multimeters-2
5) Resistors-1K Ω
6) Connecting Wires.
THEORY:
Forward Bias of p-n Junction Diode:
If an external d.c. voltage is connected in such a way that the p-region terminal
is connected to the positive of the d.c. voltage and the n-region is connected to the
negative of the d.c. voltage, the biasing condition is called forward biasing. The p-n
junction is said to be forward biased.
While crossing the junction, the electrons give up the amount of energy
equivalent to the barrier potential.
Reverse Bias of p-n Junction Diode:
If an external d.c. voltage is connected in such a way that the p-region terminal
of a p-n junction is connected to the negative of the battery and the n-region terminal of
a p-n junction is connected to the positive of the battery, the biasing condition is called
reverse biasing. The p-n junction is said to be forward biased.
Forward Resistance of a Diode:
The forward resistance is defined in two ways:
1. Static Forward Resistance:
2. Dynamic forward resistance:
The resistance offered by the p-n junction under a.c. conditions is called
Dynamic resistance denoted as rf.

Reverse Resistance of a Diode:
The p-n junction offers large resistance in the reverse biased condition called
reverse resistance. This is also defined in two ways.
1. Reverse static resistance:
This is reverse resistance under d.c. conditions, denoted as R r. It is the ratio of

appplied reverse saturation current I0.
2. Reverse dynamic resistance:
This is the reverse resistance under the a.c. conditions, denoted as rr. It is the
ratio of incremental change in the reverse voltage applied to the corresponding change
in the reverse current.
Cut –in Voltage:
The voltage at which the diode current starts increasing rapidly is called cut-in
voltage, offset voltage, break-point voltage or threshold voltage. It is denoted by .
CIRCUIT DIAGRAMS:
PN DIODE FORWARD BIAS

PN DIODE REVERSE BIAS
GERMANIUM DIODE FORWARD BIAS
GERMANIUM DIODE REVERSE BIAS

PROCEDURE:
a) FORWARD BIAS:
1) The circuit is connected as per the circuit Diagram.
2) The forward voltage is increased in steps of 0.1V to 1V and in steps of 1Vfrom
1V to 15V.
3) The readings of the meters (ammeter and voltmeter) are observed for every value
of forward voltage and are tabulated
4) For germanium diode repeat the same 1,2 &3 points.
.
b) REVERSE BIAS:
1) The circuit is connected as per the circuit diagram.
2) The reverse voltage is increased in steps of 1V from 1V to 15 V.
3) The readings of meters (ammeter and voltmeter) are observed for every value of
Reverse voltage and are tabulated.
4) For germanium diode repeat the same 1,2 &3 points.

Model Graphs:
Forward Bias V-I characteristics

If(mA)
△If
△Vf
cuttin voltage Vf
Reverse Bias V-I characteristics

Vf(V)
△VR
△IR
IR(µA)

TABULAR FORMS:
FORWARD BIAS:
S.NO Applied Voltage(V) Diode Voltage (VD in Diode Current(ID in mA)

V)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10
11
12.
13.
14.
15
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.

REVERSE BIAS:
S.NO Applied Voltage(v) Diode Voltage(VD in V) Diode Current(ID in µA)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
PRECAUTIONS:
1) Continuity of the wires must be checked.

2) The voltage level in the power supply must be kept in minimum position before
switching it ON and OFF.
3) The polarities of the diode (anode and cathode) are to be identified carefully
before connecting the circuit.
RESULT:
The V –I characteristics of P-N junction diode are plotted in forward and reverse
bias conditions and static and dynamic resistances are calculated at particular
operating points.
The cut in voltage (Vγ) of the diode is found to be 0.51v.
Static resistance in forward bias at 0.63v= VD/ID=146Ω.
Dynamic resistance in forward bias between 0.63v and 0.61v =∆VD/∆ID=10.5Ω.
Static resistance in reverse bias at 6.09v =VD/ID =10.15MΩ.
Dynamic resistance in reverse bias between 8.10v and 6.09v=∆VD/∆ID=10.05MΩ.

2.ZENER DIODE CHARACTERISTICS
AIM: To verify the V-I characteristics of Zener diode and to calculate the
Static and dynamic resistances at suitable operating points in forward and
reverse bias conditions.
APPARATUS:
1) Regulated Power supply.
2) Bread board.
3) Zener diode
4) Multimeters-2
5) Resistors-1K Ω
6) Connecting Wires.
THEORY:
The zener diode is a silicon p-n junction semiconductor device, which is
generally operated in its reverse breakdown region. The zener diodes have breakdown
voltage range from 3V to 200V.
In the forward biased condition, the normal rectifier diode and the zener diode
operate in similar fashion. But the zener diode is designed to be operated in the reverse
saturation current till the reverse voltage applied is less than the reverse breakdown
voltage. When the reverse voltage exceeds reverse breakdown voltage, the current
through it changes drastically but the voltage across it remains almost constant. Such a
breakdown region is a normal operating region for a zener diode.
When the reverse voltage applied to a zener diode is increased, initially the
current through it is very small, of the order of few μA or less. This is the reverse
leakage current of the diode, denoted by I0. At a certain reverse voltage, current
through zener diode increases rapidly. The change from a low value to large value of
current is very sharp and well defined. Such a sharp change in the reverse
characteristics is called knee or zener knee of the curve. At this knee, a breakdown is
said to occur in the device. The reverse bias voltage at which the breakdown occurs is
called Zener breakdown voltage.
From the graph the dynamic resistance is defined as,

Breakdown Mechanisms in Zener Diode:
There are two distinct mechanisms due to which breakdown may occur in the
zener diode. One is called zener breakdown and the other avalanche breakdown.
CIRCUIT DIAGRAMS:
ZENER DIODE FORWARD BIAS
ZENER DIODE REVERSE BIAS

PROCEDURE:
a) FORWARD BIAS:
2) The forward voltage is increased in steps of 0.1V to 1V and in steps of 1Vfrom
1V to 15V.
3) The readings of the meters (ammeter and volt meter) are observed for every value
of forward voltage and are tabulated.
b) REVERSE BIAS:
1) The circuit is connected as per the circuit diagram.
2) The reverse voltage is increased in steps of 1V from 1V to 15 V.
3) The readings of meters (ammeter and voltmeter) are observed for every value of
Reverse voltage and are tabulated.

Model Graphs:
Forward Bias V-I characteristics

If(mA)
△If
△Vf
Vf
cuttin voltage
Reverse Bias V-I characteristics

Vf(V)
△VR
△IR
IR(mA)

TABULAR FORMS:
FORWARD BIAS:
S.NO Applied Voltage(V) Diode Voltage(VD) in V Diode Current(ID) in mA

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

REVERSE BIAS:
S.NO Applied Voltage(V) Diode Voltage(VD) in V Diode Current(ID )in mA

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PRECAUTIONS:
1) Continuity of the wires must be checked.

2) The voltage level in the power supply must be kept in minimum position
before switching it ON and OFF.
3) The polarities of the diode (anode and cathode) are to be identified carefully
before connecting the circuit.
RESULT:
The V –I characteristics of Zener diode are plotted in forward and reverse bias
conditions and static and dynamic resistances are calculated at particular
operating points. The cut in voltage (Vγ) of the diode is found to be 0.58v.
Static resistance in forward bias at 0.45v= VD/ID=147.2Ω.

Dynamic resistance in forward bias between 0.798v and 0.784v
=∆VD/∆ID=4.51Ω.
Static resistance in reverse bias at 4.09v =VD/ID =2.838KΩ.
Dynamic resistance in reverse bias between 3.42v and 2.91v=∆V D/∆ ID
=1.020KΩ.

3 . RECTIFIRES
a.) HALFWAVE RECTIFIER WITH AND WITHOUT FILTER
AIM: To study the characteristics and performance of half wave rectifier with and
with out filter.
APPARATUS: 1) P-N junction diode.

2) Bread board.
3) 9-0-9 V Center tapped step down transformer.
4)Multemeters-2
5) Capacitor-100µf.
6) C.R.O.
7) Probes.
THEORY:
A rectifier is a device which converts a.c. voltage to pulsating d.c. voltage,
using one or more p-n junction diodes.
The p-n junction diode conducts only in one direction. It conducts when
forward biased while practically it does not conduct when reverse biased. Thus if an
alternating voltage is applied across a p-n junction diode, during positive half cycle the
diode will be forward biased and will conduct successfully. While during the negative
half cycle it will be reversed biased and will not conduct at all. Thus the conduction
occurs only during positive half cycle.
Rectifier Efficiency: It signifies, how efficiently the rectifier circuit converts a.c.
power into d.c. power.
Ripple factor: The output of the rectifier is of pulsating d.c. type. The amount of a.c.
content in the output can be mathematically expressed by a factor called ripple factor.
Less is the ripple factor, better is the performance of the circuit.

CIRCUIT DIAGRAMS:
HALF WAVE RECTIFIER WITHOUT FILTER
HALFWAVE RECTIFIER WITH FILTER

PROCEDURE:
a) HWR WITHOUT FILTERS:

2) The readings of ammeter and voltmeter are taken with the switch in both ac and dc
modes for IRMS RRMS IRMS and VDC.
3) Ripple factor is calculated by the formula:
γ =Vrm/V dc from the readings obtained. Observed for every value of
4) Step 2 is repeated for various values of load resistors.
b) HWR WITH FILTER

2) The readings of ammeter and voltmeter are taken with the switch in both ac and dc
modes for Irms , vrms, Idc and Vdc..
3)Ripple factor is calculated by the formula:
γ =Vrms /V dc from the readings obtained. Observed for every value of
4) The values of ripple factor obtained practically are verified with the theoretical value
given by:
OBSERVATIONS:-
Half wave Rectifier without filter:-
S. No. RL(Ω) I DC (mA) VDC(volts) I rms (mA) V rms γ=

(volts) Vrms/VDC
1
2
3
4
5

Half wave Rectifier With filter :-
S. RL(Ω) I DC VDC(volts) I rms V rms γ= γ=

No. (mA) (mA) (volts) Vrms/VDC 1/2√3fCRL
1
2
3
4
5
PRECAUTIONS:

1) Loose connections are avoided.

2) Probes are tested for continuity before starting the experiment.
3) The circuit is connected with the transformer being disconnected from the
supply lines.
4) The load should not be short-circuited.
RESULT:
The performance of Half wave rectifier is observed and its input and output
waveforms are observed
Theoretical value:
The ripple factor of HWR (γ) without filter = 1.21
The ripple factor of HWR (γ) with filter = 0.0296
Practical value:

b) . FULL WAVE RECTIFIER WITH AND WITHOUT FILTER
AIM: To study the characteristics and performance of half wave rectifier with and
with out filter.
APPARATUS:
1) P-N junction diodes - 2
2) Bread board.
3) 9-0-9 V Center tapped step down transformer.
4) Multimeters-2
5) Capacitor-100µf.
6) C.R O.
7) Probes.
THEORY:
The full wave rectifier conducts during both positive and negative half cycles of
input a.c. supply. In order to rectify both the half cycles of a.c. input, two diodes are
used in this circuit. The diodes feed a common load R L with the help of a center tap
transformer. The a.c. voltage is applied through a suitable power transformer with
proper turns ratio.
It is noted that the load current flows in both the half cycle of ac voltage and in
the same direction through the load resistance.
Ripple Factor( )
As derived earlier in case of half wave rectifier the ripple factor is given by a
general expression,
For full wave IRMS = Im/ and IDC = 21m/Π so,
Substituting in the above equation,

This indicates that the ripple contents in the output are 48% of the d.c.
component which is much less than that for the half wave circuit.
CIRCUIT DIAGRAM:
FULL WAVE RECTIFIER WITHOUT FILTER
FULLWAVE RECTIFIER WITH FILTER
PROCEDURE:
a) FWR WITHOUT FILTERS:

2) The readings of ammeter and voltmeter are taken with the switch in both ac
and dc modes for Irms, vrms, Idc and Vdc.
γ =Vrm/V dc from the readings obtained. Observed for every value of Step 2 is
repeated for various values of load resistors.

b) FWR WITH FILTER :

2) The readings of ammeter and voltmeter are taken with the switch in both ac
and dc modes For IrmsvrmsIdcand Vdc.
γ =Vrms/V dc from the readings obtained. Observed for every value of the values
of ripple factor obtained practically are verified with the theoretical value given
by the formula
OBSERVATIONS:-
Full wave Rectifier Without filter:-
S. No. RL(Ω) I DC (mA) VDC(volts) I rms (mA) V rms(volts) γ=

Vrms/VDC
1.
2.
3.
4.
5.
Full wave Rectifier With filter :-
S. RL(Ω) I DC VDC(volts) I rms V rms γ= γ=

No. (mA) (mA) (volts) Vrms/VDC 1/2√3fCRL
1.
2.
3.
4.
5.

PRECAUTIONS:
a. Loose connections are avoided.
b. Probes are tested for continuity before starting the experiment.
c. The circuit is connected with the transformer being disconnected from
the supply lines.
d. The load should not be short circuited.
RESULT:
The performance of Half wave rectifier is observed and its input and output
waveforms are observed
Theoretical value:
Practical value:

3.BJT CHARACTERSTICS - CB CONFIGURATION (INPUT & OUTPUT)
AIM: - To obtain the input and output characteristics of a given transistor in CB

configuration.
APPARATUS:-
1. Regulated power supply.
2. Transistor – BC -107
3. Digital Millimeters – 3
4. Resistor – 1KΩ - 2
5. Bread board.
6. Connecting wires.
THEORY: The static characteristics curves of a transistor describe the static operation
of a given transistor. The Input characteristics is the curve of input current versus input
voltage for a given output voltage. The output characteristic is the curve of output
current versus output voltage for a given input current. The input voltage V EB can be
varied in order to keep the emitter current IE within the permissible limits. The output
voltage can be varied with the help of power supply equipment VCC .
Ri = ∆VEB /∆IE at VCB constant.

The value of dynamic input resistance, r i is between 20 to 100Ω. The input voltage V EB
increases the value of ri decreases. This is because the slope of the input characteristics
increases with the increase in VEB.
Output characteristics:
It is the graph between the collector current I C and collector –base VCB for a fixed value
of IE
Dynamic output resistance at a given operating point ro =∆VCB/∆IC at IE constant.
Thus the value of dynamic output resistance, r o remains almost constant throughout the
active region.
DC current gain ά DC = IC/IE (it is slightly less than unity throughout the active region)
AC current gain ά AC = ∆IC/∆IE at VCB constant.

CIRCUIT DIAGRAM:
CB CHARACTERISTICS
TABULAR FORMS:
INPUT CHARACTERISTICS:
VCB = 0 volt VCB = 2 volt VCB =4 volt

S. No. VEE (v)
VEB(v) IE (mA) VEB (v) IE (mA) VEB(v) IE (mA)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.

OUTPUT CHARACTERISTICS:
IE = 1 mA IE= 5 mA IE = 10 mA
S. No. VCC(v)
VCB(v) IC (mA) VCB (v) IC (mA) VCB(v) IC (mA)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
PROCEDURE:-
1. The circuit is connected as per the circuit diagram.
2. For the input characteristics Output Voltage V CB kept constant and by varying
VEB in steps the I/P Current IE is noted.
3. For Output characteristics I/P Current I E is kept constant at particular value

and for different values of VCB , O/P Current IC is noted.
4. Graphs are plotted for both I/P and O/P values.

PRECAUTIONS:-
1. The continuity of wires must be checked.
2. The voltages levels in the RPS must be kept in minimum position before
switching it “ON” or “OFF”.
3. The terminals of the transistor should be identified properly.
4. Readings should be taken without errors.
5. Interconnections should not be made on the bread board with power

switched on.
RESULT:-

The I/P and O/P Characteristics of transistor CB mode is obtained.
4. BJT CHARACTERISTICS – CE CONFIGURATION
AIM:- To obtain the input and output characteristics of a given transistor in CE

configuration.
APPARATUS:-
1. Regulated power supply.
2 Transistors – BC -107
3. Digital MultiMate’s – 3
4. Resistor – 1KΩ, 100KΩ
5. Bread board.
6. Connecting wires.
THEORY: if transistor is connected so that the emitter of the transistor is common to

input as well as the output, the configuration termed as common emitter configuration.
In this configuration the input is given between the base and emitter whereas output is
obtained between collector and emitter. Operation of a transistor in the active region is
ensured by forward biasing of the emitter-base junction and reverse biasing of the
collector-base junction
Input Characteristics:
It is the curve of input current versus input voltage for a given output voltage.
The input characteristic for a CE configuration should be a curve of VBE versus IB for
a given value of VCE . For different values of VCE we can get different input
characteristics
Ri = ∆VBE/IB at VCE constant.
Output characteristics:
It is the curve of output voltage versus output current for a given input current.
The output characteristics for a CE configuration should be a curve of VCE versus IC for
a given value of IB .For different values of IB we can get different output
characteristics.
Ro = ∆VCE/IC at IB constant
βDC = IC/IB at constant VCE

β AC = ∆IC/∆IB at constant VCE
CIRCUIT DIAGRAM:
CE CHARACTERISTCS
TABULAR FORMS:
INPUT CHARACTERISTICS:
VCE = 0 volt VCE = 2 volt VCE =4 volt

S. No. VBB(v)
VBE(v) IB (µA) VBE (v) IB (µA) VBE(v) IB (µA)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.

25.
OUTPUT CHARACTERISTICS:
IB = 10 µA IE= 20µA IE = 30 µA
S. No. VCC(v)
VCE(v) IC (mA) VCE (v) IC (mA) VCE(v) IC (mA)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
PROCEDURE:-
1. The circuit is connected as per the circuit diagram.
2. For the input characteristics Output Voltage VCE kept constant and by varying
VBE in steps the I/P Current IB is noted.
3. For Output characteristics I/P Current IB is kept constant at particular value

and for different values of VCE , O/P Current IC is noted.
4.Graphs are plotted for both I/P and O/P values.

PRECAUTIONS:-
1. The continuity of wires must be checked.
2. The voltages levels in the RPS must be kept in minimum position before
switching it “ON” or “OFF”.
3. The terminals of the transistor should be identified properly.
4. Readings should be taken without errors.
5. Interconnections should not be made on the bread board with power

switched on.
RESULT:-
The I/P and O/P Characteristics of transistor CE mode is obtained.

5. Verify truth tables of AND, OR, NOT, NOR, NAND and XOR
basic logic gates
Aim: - To Verify truth tables of AND, OR, NOT, NOR, NAND and XOR
basic logic gates.
Apparatus Required: -
 All the basic gates mentioned above

 Breadboard
The Breadboard
The breadboard consists of two terminal strips and two bus strips (often broken in the
center). Each bus strip has two rows of contacts. Each of the two rows of contacts are a
node. That is, each contact along a row on a bus strip is connected together (inside the
breadboard). Bus strips are used primarily for power supply connections, but are also
used for any node requiring a large number of connections. Each terminal strip has 60
rows and 5 columns of contacts on each side of the centre gap. Each row of 5 contacts
is a node.
You will build your circuits on the terminal strips by inserting the leads of circuit
components into the contact receptacles and making connections with 22-26 gauge
wire. There are wire cutter/strippers and a spool of wire in the lab. It is a good practice
to wire +5V and 0V power supply connections to separate bus strips.
+5V supply MUST NOT BE EXCEEDED since this will damage the ICs (Integrated
circuits) used during the experiments. Incorrect connection of power to the ICs could
result in them exploding or becoming very hot - with the possible serious injury
occurring to the people working on the experiment! Ensure that the power supply
polarity and all components and connections are correct before switching on power.
Building the Circuit:
1. Throughout these experiments we will use TTL chips to build circuits. The steps for
wiring a circuit should be completed in the order described below:
2. Turn the power (Trainer Kit) off before you build anything!

3. Make sure the power is off before you build anything!

4. Connect the +5V and ground (GND) leads of the power supply to the power and
ground bus strips on your breadboard.
5. Plug the chips you will be using into the breadboard. Point all the chips in the
same direction with pin 1 at the upper-left corner. (Pin 1 is often identified by a
dot or a notch next to it on the chip package)
6. Connect +5V and GND pins of each chip to the power and ground bus strips on
the breadboard.
7. Select a connection on your schematic and place a piece of hook-up wire

between corresponding pins of the chips on your breadboard. It is better to
make the short connections before the longer ones. Mark each connection on
your schematic as you go, so as not to try to make the same connection again at
a later stage.
8. Get one of your group members to check the connections, before you turn the
9. power on.
10. If an error is made and is not spotted before you turn the power on. Turn the
11. power off immediately before you begin to rewire the circuit.
12. At the end of the laboratory session, collect you hook-up wires, chips and all
equipment and return them to the demonstrator.
13. Tidy the area that you were working in and leave it in the same condition as it
was before you started.

Digital logic devices are the circuits that electronically perform logic
operations on binary variables. The binary information is represented by high and
low voltage levels, which the device processes electronically. The devices that
perform the simplest of the logic operations (such as AND, OR, NAND, etc.) are
called gates. For example, an AND gate electronically computes the AND of the
voltage encoded binary signals appearing at its inputs and presents the voltage
encoded result at its output.
The digital logic circuits used in this laboratory are contained in integrated
circuit (IC) packages, with generally 14 or 16 pins for electrical connections. Each
IC is labeled (usually with an 74LSxx number) to identify the logic it performs.
The logic diagrams and pin connections for these IC’s are described in the TTL
Data Book by Texas Instruments1.
The transistor-transistor logic(TTL) IC’s used in this laboratory require a

5.0 volt power supply for operation. TTL inputs require a voltage greater than 2
volts to represent a binary 1 and a voltage less than 0.8 volts to represent a binary
0.
Procedure: -
1. Place the IC on the BreadBorad.
2. Connect VCC +5V and ground to respective pins of IC.
3. Connect the inputs to the input pins.
4. Connect the outputs to the switches of O/P LEDs,
5. Apply various combinations of inputs according to the truth
table and observe condition of LEDs.
6. Disconnect output from the LEDs and note down the corresponding multimeter
voltage readings for various combinations of inputs.


Conclusion: -
Truth table of logic gates are verified.

7. Verify and Implementation of an S-R flip-flop using NOR/NAND gates, J-

K and D Flip- flops
AIM: - To verify and implementation of an S-R flip-flop using NOR/NAND gates, J-K
and D Flip- flops..
APPARATUS: -
Breadboard, NAND gates ICs- 7400, NOR gates ICs-7402, J-K IC-7473, SR IC-7474
and wires.
Flip- Flops-Theory Digital electronic circuit is classified into combinational logic and
sequential logic. Combinational logic output depends on the inputs levels, whereas
sequential logic output depends on stored levels and also the input levels.
Figure 1: Sequential logic representation The storage elements (Flip -flops) are devices
capable of storing 1-bit binary info. The binary info stored in the memory elements at any
given time defines the state of the Sequential circuit. The input and the present state of the
memory element determines the output. Storage elements next state is also a function of
external inputs and present state. Flip-Flops and their properties Flip-flops are
synchronous bistable devices. The term synchronous means the output changes state only
when the clock input is triggered. That is, changes in the output occur in synchronization
with the clock. A flip-flop circuit has two outputs, one for the normal value and one for
the complement value of the stored bit. Since memory elements in sequential circuits are
usually flip-flops, it is worth summarizing the behavior of various flip-flop types before
proceeding further. All flip -flops can be divided into four basic types: SR, JK, D and T.
They differ in the number of inputs and in the response invoked by different value of input
signals.
THEORY: The SR flip-flop is one of the fundamental parts of the sequential circuit logic.
SR flip flop is a memory device and a binary data of 1 – bit can be stored in it. SR flip-
flop has two stable states in which it can store data in the form of either binary zero or
binary one. Like all flip-flops, an SR flip-flop is also an edge sensitive device. SR flip–

flop is one of the most vital components in digital logic and it is also the most basic
sequential circuit that is possible. The S and R in SR flip-flop means ‘SET’ and ‘RESET’
respectively. Hence it is also called Set–Reset flip- flop. The symbolic representation of
the SR Flip Flop is shown below.
WORKING PRINCIPLE:
SR flip-flop works during the transition of clock pulse either from low to high or from
high to low (depending on the design) i.e. it can be either positive edge triggered or
negative edge triggered.
For a positive edge triggered SR flip-flop, suppose, if S input is at high level (logic 1)
and R input is at low level (logic 0) during a low to high transition on clock pulse, then
the SR flip-flop is said to be in SET state and the output of the SR flip-flop is SET to 1.
For the same clock situation, if the R input is at high level (logic 1) and S input is at
low level (logic 0), then the SR flip-flop is said to be in RESET state and the output of
the SR flip-flop is RESET to 0.
The SR flip-flops can be designed by using logic gates like NOR gates and NAND
gates. S-R Flip-Flop Using NAND Gate
SR flip flop can be designed by cross coupling of two NAND gates. It is an active low
input SR flip-flop. The circuit of SR flip-flop using NAND gates is shown in below
figure.

Figure 2: SR Flip-flop connection using IC 7400 and IC 7402 (NAND/NOR)

gates diagram
J-K Flip-Flop:
The SR Flip Flop or Set-Reset flip flop has lots of advantages. But, it has the following
switching problems:
o When Set 'S' and Reset 'R' inputs are set to 0, this condition is always avoided.
o When the Set or Reset input changes their state while the enable input is 1, the
incorrect latching action occurs.
The figure below shows pin configuration of 74LS73, which is a dual edge-triggered J-K
flip flop, and its function table. A low level at the preset (PRE) or clear (CLR) inputs sets
or resets the output regardless of the levels of the other inputs. When preset and clear both
are inactive (high) data at the data D input is transferred to the output on the next positive
edge of the clock CLK input.
JK Flip Flop Full Form
The “JK flip flop,” also known as the Jack Kilby flip flop, is a sequential logic circuit
designed by Jack Kilby during his tenure at Texas Instruments in the 1950s. This flip flop
serves the purpose of storing and manipulating binary information within digital systems.
Basic Functionality of JK Flip Flop
JK flip flop operates on sequential logic principle, where the output is dependent not only
on the current inputs but also on the previous state. There are two inputs in JK Flip Flop
Set and Reset denoted by J and K. It also has two outputs Output and complement of

Output denoted by Q and Q̅ . The internal circuitry of a JK Flip Flop consists of a

combination of logic gates, usually NAND gates.
JK flip flop comprises four possible combinations of inputs: J=0, K=0; J=0, K=1; J=1,
K=0; and J=1, K=1. These input combinations determine the behavior of flip flop and its
output.
 J=0, K=0: In this state, flip flop retains its preceding state. It neither sets nor resets
itself, making it stable.
 J=0, K=1: This input combination forces flip flop to reset, resulting in Q=0 and Q̅ =1. It
is often referred to as the “reset” state.
 J=1, K=0: Here, flip flop resides in the set mode, causing Q=1 and Q̅ =0. It is known as
the “set” state.
 J=1, K=1: This combination toggles flip flop. If the previous state is Q=0, it switches
to Q=1 and vice versa. This makes it valuable for frequency division and data storage
applications.
Figure 2: IC7473 J-K Flip-

flop
D Flip-Flop:
The figure below shows pin configuration of 74LS74, which is a dual edge-triggered D
flipflop, and its function table. A low level at the preset (PRE) or clear (CLR) inputs sets
or resets the output regardless of the levels of the other inputs. When preset and clear both
are inactive (high) data at the data D input is transferred to the output on the next positive
edge of the clock CL input.

Figure 3: IC7474 D Flip-flop connection diagram
PROCEDURE:
a)
 Connections are given as per circuit diagram.
 Logical inputs are given as per circuit diagram.
 Observe the output and verify the truth table.
b)
 Identify the two JK flip-flops in the 7473 IC.
 • Set PRE' and CLR' to +5V and apply clock signal to one flip-flop.
 • Apply all possible input combinations of J and K.
 • Record the results in table.
c)
 Connect one half of the 7474 chip as show in figure.
 Use Function Generator or 555 timer as the clock source.
 Observe the results on oscilloscope.
 Verify that the D input is transferred to output on positive edge of clock.
 Fill in the truth table by applying the given inputs.
 Write down the conclusion based on the outputs.
PRECAUTIONS:
1. All connections should be made neat and tight.
2. Digital lab kits and ICs should be handled with utmost care.

3. While making connections main voltage should be kept switched off.

4. Never touch live and naked wires.
RESULT:
Design of S-R Flip flop using NAND & NOR, J-K and D Flip- flops
gates were verified successfully.

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ELECTRONIC DEVICES AND CIRCUITS LAB

ELECTRONIC DEVICE AND CIRCUITS

VIIT, Department of electronics and Communication Engineering Page 1

The Purpose of the Laboratory

1. To provide an experimental foundation for the theoretical concepts introduced in the

2. To familiarize students with experimental apparatus, the scientific method, and

4. To learn how to write a technical report which communicates scientific information

5. To introduce new concepts and techniques which have a wide application in

VIIT, Department of Electronics and Communication Engineering Page 2

VIIT, Department of Electronics and Communication Engineering Page 3

Electronics Lab Safety Information

5 - 20 mA Involuntary muscle contraction ("can't-let-go")

20 - 100 mA Pain, breathing difficulties

100 - 300 mA Ventricular filbrilation (changes in heart beat), possible death

> 300 mA Respiratory paralysis, burns, unconsciousness

VIIT, Department of Electronics and Communication Engineering Page 4

Additional Lab Safety Rules:

VIIT, Department of Electronics and Communication Engineering Page 5

How to work effectively in the Lab

VIIT, Department of Electronics and Communication Engineering Page 6

VIIT, Department of Electronics and Communication Engineering Page 7

Choose type of graph. e.g., linear, semi-log or log

VIIT, Department of Electronics and Communication Engineering Page 8

VIIT, Department of Electronics and Communication Engineering Page 9

VIIT, Department of Electronics and Communication Engineering Page 10

PN JUNCTION DIODE V-I CHARACTERISTICS

1. a) Germanium Diode (Forward & Reverse Bias) 12

b) Silicon Diode (Forward Bias) only.

2. ZENER DIODE V-I CHARACTERISTICS 19

b) FULL WAVE RECTIFIER WITHOUT AND WITH FILTER

BJT CHARACTERISTICS-CE CONFIGURATION (INPUT &

BJT CHARACTERISTICS-CB CONFIGURATION (INPUT &

To verify and implementation of an S-R flip-flop using

VIIT, Department of Electronics and Communication Engineering Page 11

1. P-N JUNCTION DIODE V-I CHARACTERISTICS

APPARATUS: 1) Regulated Power supply.

Reverse Bias of p-n Junction Diode:

Forward Resistance of a Diode:

The forward resistance is defined in two ways:

1. Static Forward Resistance:

2. Dynamic forward resistance:

VIIT, Department of Electronics and Communication Engineering Page 12

Reverse Resistance of a Diode:

1. Reverse static resistance:

This is reverse resistance under d.c. conditions, denoted as R r. It is the ratio of

2. Reverse dynamic resistance:

Cut –in Voltage:

PN DIODE FORWARD BIAS

VIIT, Department of Electronics and Communication Engineering Page 13

PN DIODE REVERSE BIAS

GERMANIUM DIODE FORWARD BIAS

GERMANIUM DIODE REVERSE BIAS

VIIT, Department of Electronics and Communication Engineering Page 14

VIIT, Department of Electronics and Communication Engineering Page 15

Forward Bias V-I characteristics

Reverse Bias V-I characteristics

VIIT, Department of Electronics and Communication Engineering Page 16

S.NO Applied Voltage(V) Diode Voltage (VD in Diode Current(ID in mA)

VIIT, Department of Electronics and Communication Engineering Page 17

S.NO Applied Voltage(v) Diode Voltage(VD in V) Diode Current(ID in µA)