STF7N80K5,

STFI7N80K5
N-channel 800 V, 0.95 Ω typ., 6 A MDmesh™ K5
Power MOSFETs in TO-220FP and I²PAKFP packages
Datasheet - production data

Features
Order code VDS RDS(on) max. ID PTOT
STF7N80K5
800 V 1.2 Ω 6A 25 W
STFI7N80K5

TO-220FP I2PAKFP (TO-281)

 Industry’s lowest RDS(on) x area
 Industry’s best FoM (figure of merit)
 Ultra-low gate charge
Figure 1: Internal schematic diagram
 100% avalanche tested
 Zener-protected
D(2)

Applications
 Switching applications

G(1) Description
These very high voltage N-channel Power
MOSFETs are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
S(3) charge for applications requiring superior power
AM01476v1_No_tab density and high efficiency.
Table 1: Device summary
Order code Marking Package Packing
STF7N80K5 TO-220FP
7N80K5 Tube
STFI7N80K5 I²PAKFP (TO-281)

July 2017 DocID025377 Rev 2 1/16

This is information on a product in full production. www.st.com
Contents STF7N80K5, STFI7N80K5

Contents
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1 Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 9
4 Package information ..................................................................... 10
4.1 TO-220FP package information ...................................................... 11
4.2 I²PAKFP (TO-281) package information ......................................... 13
5 Revision history ............................................................................ 15

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STF7N80K5, STFI7N80K5 Electrical ratings

1 Electrical ratings
Table 2: Absolute maximum ratings
Symbol Parameter Value Unit
VGS Gate-source voltage ±30 V
ID(1) Drain current (continuous) at TC = 25 °C 6 A
ID(1) Drain current (continuous) at TC = 100 °C 3.8 A
IDM(2) Drain current (pulsed) 24 A
PTOT Total dissipation at TC = 25 °C 25 W
(3)
dv/dt Peak diode recovery voltage slope 4.5
V/ns
(4) MOSFET dv/dt ruggedness
dv/dt 50
Insulation withstand voltage (RMS) from all three leads to external
VISO 2500 V
heat sink (t=1 s; TC= 25 °C)
Tj Operating junction temperature range
- 55 to 150 °C
Tstg Storage temperature range

Notes:
(1)Limited by package.
(2)Pulse width limited by safe operating area
(3)I
SD ≤6 A, di/dt ≤100 A/μs, VDS(peak) ≤V(BR)DSS
(4)V
DS ≤ 640 V

Table 3: Thermal data

Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case 5 °C/W
Rthj-amb Thermal resistance junction-ambient 62.5 °C/W

Table 4: Avalanche characteristics

Symbol Parameter Value Unit
Avalanche current, repetitive or not repetitive
IAR 2 A
(pulse width limited by Tjmax)
Single pulse avalanche energy
EAS 88 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

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Electrical characteristics STF7N80K5, STFI7N80K5

2 Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol Parameter Test conditions Min. Typ. Max. Unit
Drain-source breakdown
V(BR)DSS VGS = 0 V, ID = 1 mA 800 V
voltage
VGS = 0 V, VDS = 800 V 1 µA
Zero gate voltage drain
IDSS VGS = 0 V, VDS = 800 V
current 50 µA
TC = 125 °C (1)
IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA
VGS(th) Gate threshold voltage VDD = VGS, ID = 100 µA 3 4 5 V
Static drain-source
RDS(on) VGS = 10 V, ID = 3 A 0.95 1.2 Ω
on-resistance

Notes:
(1)Defined by design, not subject to production test.

Table 6: Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance - 360 - pF
Coss Output capacitance VDS = 100 V, f = 1 MHz, - 30 - pF
VGS = 0 V
Reverse transfer
Crss - 1 - pF
capacitance
Equivalent capacitance time
Co(tr)(1) - 47 - pf
related
VDS = 0 to 640 V, VGS = 0 V
Equivalent capacitance
Co(er)(2) - 20 - pf
energy related
Rg Intrinsic gate resistance f = 1 MHz, ID=0 A - 6 - Ω
Qg Total gate charge VDD = 640 V, ID = 6 A - 13.4 - nC
Qgs Gate-source charge VGS= 0 to 10 V - 3.7 - nC
(see Figure 16: "Test circuit
Qgd Gate-drain charge for gate charge behavior") - 7.5 - nC

Notes:
(1)C is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to
o(tr)
80% VDSS.
(2)C is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to
o(er)
80% VDSS.

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STF7N80K5, STFI7N80K5 Electrical characteristics
Table 7: Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD= 400 V, ID = 3 A, - 11.3 - ns
tr Rise time RG = 4.7 Ω - 8.3 - ns
VGS = 10 V
td(off) Turn-off delay time - 23.7 - ns
(see Figure 15: "Test circuit
for resistive load switching
tf Fall time times" and Figure 20: - 20.2 - ns
"Switching time waveform")

Table 8: Source-drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
ISD Source-drain current - 6 A
Source-drain current
ISDM(1) - 24 A
(pulsed)
VSD(2) Forward on voltage ISD = 6 A, VGS = 0 V - 1.5 V
trr Reverse recovery time ISD = 6 A, di/dt = 100 - 315 ns
A/µs,VDD = 60 V
Qrr Reverrse recovery charge - 2.8 µC
(see Figure 17: "Test circuit
for inductive load switching
IRRM Reverse recovery current - 17.5 A
and diode recovery times")
trr Reverse recovery time ISD = 6 A, di/dt = 100 A/µs, - 480 ns
VDD = 60 V, Tj = 150 °C
Qrr Reverse recovery charge (see Figure 17: "Test circuit - 3.8 µC
for inductive load switching
IRRM Reverse recovery current and diode recovery times") - 16 A

Notes:
(1)Pulse width limited by safe operating area
(2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%

Table 9: Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
Gate-source breakdown
V(BR)GSO IGS= ±1 mA, ID= 0 A ±30 - - V
voltage

The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.

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Electrical characteristics STF7N80K5, STFI7N80K5
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area Figure 3: Thermal impedance

Figure 4: Output characteristics Figure 5: Transfer characteristics

Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance

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STF7N80K5, STFI7N80K5 Electrical characteristics
Figure 8: Capacitance variations Figure 9: Output capacitance stored energy

Figure 10: Normalized gate threshold voltage vs Figure 11: Normalized on-resistance vs temperature
temperature

Figure 12: Normalized V(BR)DSS vs temperature Figure 13: Maximum avalanche energy vs starting TJ

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Electrical characteristics STF7N80K5, STFI7N80K5
Figure 14: Source-drain diode forward characteristics

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STF7N80K5, STFI7N80K5 Test circuits

3 Test circuits
Figure 15: Test circuit for resistive load Figure 16: Test circuit for gate charge
switching times behavior

Figure 17: Test circuit for inductive load Figure 18: Unclamped inductive load test
switching and diode recovery times circuit

Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform

DocID025377 Rev 2 9/16

Package information STF7N80K5, STFI7N80K5

4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

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STF7N80K5, STFI7N80K5 Package information
4.1 TO-220FP package information
Figure 21: TO-220FP package outline

7012510_Rev_12_B

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Package information STF7N80K5, STFI7N80K5
Table 10: TO-220FP package mechanical data
mm
Dim.
Min. Typ. Max.
A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2

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STF7N80K5, STFI7N80K5 Package information
4.2 I²PAKFP (TO-281) package information
Figure 22: I²PAKFP (TO-281) package outline

8291506 Re v. C

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Package information STF7N80K5, STFI7N80K5
Table 11: I²PAKFP (TO-281) mechanical data
mm
Dim.
Min. Typ. Max.
A 4.40 4.60
B 2.50 2.70
D 2.50 2.75
D1 0.65 0.85
E 0.45 0.70
F 0.75 1.00
F1 1.20
G 4.95 5.20
H 10.00 10.40
L1 21.00 23.00
L2 13.20 14.10
L3 10.55 10.85
L4 2.70 3.20
L5 0.85 1.25
L6 7.50 7.60 7.70

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STF7N80K5, STFI7N80K5 Revision history

5 Revision history
Table 12: Document revision history
Date Revision Changes
First release. Part numbers previously included in datasheet
11-Oct-2013 1
DocID023448
Modified features on cover page.
Modified Table 2: "Absolute maximum ratings", Table 7: "Switching
05-Jul-2017 2
times" and Table 9: "Gate-source Zener diode".
Minor text changes.

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 STF7N80K5, STFI7N80K5

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