74F00 Quad 2-Input NAND Gate: General Description

Download as pdf or txt
Download as pdf or txt
You are on page 1of 5

74F00 Quad 2-Input NAND Gate

December 1994
Revised September 2000

74F00
Quad 2-Input NAND Gate
General Description
This device contains four independent gates, each of which
performs the logic NAND function.

Ordering Code:
Order Number Package Number Package Description
74F00SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F00PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol Connection Diagram


IEEE/IEC

Unit Loading/Fan Out


U.L. Input IIH/IIL
Pin Names Description
HIGH/LOW Output IOH/IOL

An , Bn Inputs 1.0/1.0 20 µA/−0.6 mA


On Outputs 50/33.3 −1 mA/20 mA

© 2000 Fairchild Semiconductor Corporation DS009454 www.fairchildsemi.com


74F00
Absolute Maximum Ratings(Note 1) Recommended Operating
Storage Temperature −65°C to +150°C Conditions
Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature 0°C to +70°C
Junction Temperature under Bias −55°C to +150°C Supply Voltage +4.5V to +5.5V
VCC Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output −0.5V to VCC
3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
Current Applied to Output
under these conditions is not implied.
in LOW State (Max) twice the rated IOL (mA) Note 2: Either voltage limit or current limit is sufficient to protect inputs.
ESD Last Passing Voltage (Min) 4000V

DC Electrical Characteristics
Symbol Parameter Min Typ Max Units VCC Conditions
VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal
VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA
VOH Output HIGH 10% VCC 2.5 V Min IOH = −1 mA
Voltage 5% VCC 2.7 IOH = −1 mA
VOL Output LOW 10% VCC 0.5 V Min IOL = 20 mA
Voltage
IIH Input HIGH 5.0 µA Max VIN = 2.7V
Current
IBVI Input HIGH Current 7.0 µA Max VIN = 7.0V
Breakdown Test
ICEX Output HIGH 50 µA Max VOUT = VCC
Leakage Current
VID Input Leakage IID = 1.9 µA
4.75 V 0.0
Test All other pins grounded
IOD Output Leakage VIOD = 150 mV
3.75 µA 0.0
Circuit Current All other pins grounded
IIL Input LOW Current −0.6 mA Max VIN = 0.5V
IOS Output Short-Circuit Current −60 −150 mA Max VOUT = 0V
ICCH Power Supply Current 1.9 2.8 mA Max VO = HIGH
ICCL Power Supply Current 6.8 10.2 mA Max VO = LOW

AC Electrical Characteristics
TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C
VCC = +5.0V VCC = +5.0V VCC = +5.0V
Symbol Parameter Units
CL = 50 pF CL = 50 pF CL = 50 pF
Min Typ Max Min Max Min Max
tPLH Propagation Delay 2.4 3.7 5.0 2.0 7.0 2.4 6.0
ns
tPHL An, Bn to On 1.5 3.2 4.3 1.5 6.5 1.5 5.3

www.fairchildsemi.com 2
74F00
Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A

3 www.fairchildsemi.com
74F00
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D

www.fairchildsemi.com 4
74F00 Quad 2-Input NAND Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide


Package Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.

5 www.fairchildsemi.com

You might also like