Prelab

EE 340: Prelab Reading Material for Experiment 8
Autumn 2024
Part 1: Carrier Phase Frequency Synchronization

In many of the modern digital communication modulation techniques, the message signal modulates
the phase of the carrier wave (in addition modulation of the amplitude, if any). Such signals are
commonly demodulated using coherent techniques, which require the receiver to know or derive the
phase and frequency of the carrier wave precisely. However, the local oscillator at the receiver uses a
separate reference oscillator for generating the carrier frequency, which has a non-zero frequency (and
hence phase) offset. When the RF signal is down-converted using this carrier frequency, the baseband
signal will contain the undesired carrier frequency (and phase) offset.
There are a few techniques that can be used for removing these phase and frequency offsets from
the signal. In this document, the Costas loop based carrier phase/frequency recovery and compen-
sation technique for QPSK signals and the Viterbi-Viterbi algorithm for carrier phase estimation has
been described.
1 Costas Loop
The Costas loop is basically a phase locked loop (PLL) with a phase detector that can be used for
obtaining the carrier phase error for digital modulation schemes, such as BPSK, QPSK, 8-PSK and
16-QAM. The phase detector structure depends on the modulation format. The phase detector used
for QPSK signals is shown in Figure 1. It is assumed that the phase error liespwithin ±π/4.The com-
parator shown in the figure h as a t hreshold a t z ero a nd c lips t he o utput t o ± 1/2
How the phase detector for QPSK signals works: Note that the message phase in QPSK signals
ϕm ∈ {±π/4, ±3π/4}. Therefore, when the phase error ϕe rr is within ±π/4, the comparator outputs
in figure 1 d o n ot d epend o n t he a mount o f e rror ( and o nly d epend o n t he s ign o f t he i nput signal).
The p upper comparator decides if ϕm lies in the right half of the complexp plane (for which the output
is + 1/2 ), or in the left half plane (for which the output is − 1/2 ). Therefore, in both cases,
the comparator output value is equal to cos(ϕm ), where ϕm ∈ {±π/4, ±3π/4}. Similarly, the lower
comparator output value is sin(ϕm ). Thus, the output of the phase detector is
sin(ϕm + ϕerr )cos(ϕm ) − cos(ϕm + ϕerr )sin(ϕm ) = sin(ϕerr ) ≈ ϕerr (when ϕerr << 1) (1)
If the phase error exceeds ±π/4 the phase detector still assumes that error is within ±π/4 and an
ambiguity of ±nπ/2 gets added to ϕm . However, this doesn’t change the constellation diagram for the
QPSK symbols. Once the symbols are demodulated to bits after synchronization etc., mapping can
be done between the transmitted symbol constellation and received symbol constellation using some
known bit sequences (that are sent at the beginning of the transmission). This operation is called
demapping and is used for removing the ±nπ/2 phase ambiguity.
1
Figure 1: Phase Detector for QPSK signals used in a Costas Loop.
Figure 2: Costas Loop for removing phase and frequency offsets from the incoming signal. In steady
state(i.e. when the phase and frequency offsets are fixed), the phase error in the loop becomes zero
because of the integrator in the loop filter.
Operation of the Costas Loop:

The figure of the Costas loop is shown in Figure 2. The Costas loop generates the phase error, which
tries to adjust the VCO (Voltage Controlled Oscillator) frequency and phase to match it with the
offset frequency and phase in the incoming message signal. The resultant frequency and phase are
subtracted from that of the incoming signal frequency and phase using a complex multiplier to obtain
the desired signal. Please note that in the steady state (i.e. when phase and frequency offsets are not
changing), the phase error (ϕerr ) becomes zero because of the integrator in the feedback loop.
Loop dynamics of the Costas Loop: In a conventional feedback loop, the loop gain is H(s)G(s), where
H(s) is the feed-forward gain and G(s) is the feedback gain. In the case of Costas Loop shown in Figure
2, if the VCO output is considered as the system output, H(s) = KP D (KP + KsI ) KVsCO and G(s) = 1
(please revisit Lab 7 document on PLLs and your analog circuits lectures). The loop filter shown in
KI
the figure implements a zero at angular frequency K P
and a pole at = 0 . It has to be ensured that
this loop gain has sufficient gain and phase margins for stability.
H(s)
Based on this loop gain, the closed loop transfer function is: HCL (s) = 1+H(s)G(s) . This closed
loop transfer function has two poles as the denominator can be expressed as s2 + 2ηωn To ensure good
stability, the damping factor ¿ 0.5. The time constant for settling of the loop is given by = 1 where
n is called the natural frequency of the closed loop transfer function.
2 Implementation of the Costas Loop in discrete time

The Costas loop (including the loop filter) can be implemented in discrete time, in which the signals
are represented by discrete samples, as in the case of GNU Radio. In discrete time, one sample delay
(for sampling period = T ) is represented as z −1 = e−jωt (explain why the transfer function e−jωt
represents a delay = T ?). For frequencies 1/T , we can approximate z1 1 jT z −1 = 1 − jωt (using
the Taylor series expansion of the exponential function). In your lab assignment, you will be using
2
this approximation to implement the loop filter as an IIR filter with the following transfer function:
1.0001 − z −1
HLF (z) = (2)
1 − z −1
For the above mentioned Costas loop and transfer function, calculate the following:
• The KP and KI values corresponding to the loop filter transfer function HLF (z) if sampling rate
= 32 kHz (using the approximation mentioned above for the z-transform).
• The approximate value of KP D if the phase detector output, after some scaling factor inside the
phase detector block, changes from −1V to +1V as phase error varies from −π/4 to +π/4 .
• The value of KV CO if the sensitivity of the VCO is 4 Hz/V.

• The gain and phase margins calculated for the above loop parameters.
• The values of ζ, ωn and settling time constant τ for the above loop parameters.
3 The Viterbi-Viterbi Algorithm

The Viterbi-Viterbi Algorithm is a non-data aided mechanism for estimating the carrier phase of
2πn
M-PSK signals. Consider a M-PSK signal ej( M +ϕerr )M with phase error given by ϕerr . The Viterbi-
Viterbi algorithm estimates the phase error ϕ̂err as
1 2πn
ϕ̂err = arctan(ej( M +ϕerr )M ) (3)
M
Figure 3 shows the block diagram describing the algorithm. The M-PSK signal is taken to its Mth
power, which removes its the M-ary modulation. This leads to a M-fold multiplication in the phase
Img
error. The phase detector takes the argument of the signal i.e. the arctan Real , giving the estimated
phase error ϕ̂err . Appropriate scaling is performed and the output is given to a phase modulator
followed by a complex multiplier to obtain the original signal back. You can observe that the phase
detector described earlier can also be implemented using this approach.
Figure 3: : Block Diagram of Viterbi-Viterbi Algorithm.
The maximum allowable phase error is within ±π/M . When the phase error exceeds ±π/M , the
constellation point drifts to the neighbouring decision region. This drift leads to an error when the
symbols are demodulated. To resolve this issue, the differential of the phase may be demodulated.
Recall that in FM demodulation, you multiply the received signal with its delayed and phase conju-
gated copy before before demodulating the phase. The argument of this output is the differential of
phase,magnitude of which is π (if the noise power is not too high and the sample rate is sufficiently
high).
3
Part 2: End-to-End Communication
3.1 Differential coding
There are several factors that can unintentionally cause inversion of bits in the binary waveform.
Differential coding is a technique that can assist in unambiguous signal reception for certain modulation
schemes. Upon employing differential encoding, the data to be transmitted depends on both the current
signal state/symbol as well as the previous one.
Figure 4: Differential Encoder and decoder

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EE 340: Prelab Reading Material for Experiment 8

Part 1: Carrier Phase Frequency Synchronization

Operation of the Costas Loop:

2 Implementation of the Costas Loop in discrete time

• The value of KV CO if the sensitivity of the VCO is 4 Hz/V.

3 The Viterbi-Viterbi Algorithm

Figure 3: : Block Diagram of Viterbi-Viterbi Algorithm.

Figure 4: Differential Encoder and decoder

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