Scribd Logo
Upload

Welcome to Scribd!

  • 2 views

    Garis Beban DC

    Uploaded by

    shidqiniye

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Garis Beban DC

    Uploaded by

    shidqiniye
    2 views2 pages

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    2 views2 pages

    Garis Beban DC

    Uploaded by

    shidqiniye

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    4.

    6: DC Load Lines
    So how do we determine the range of possible values of collector current and collector-emitter voltage in any given DC BJT
    circuit? One answer is to employ the concept of the DC load line. In general, a load line is a plot of all possible coordinate pairs of
    IC and V for a transistor in a given circuit. Referring back to Figure 4.5.3, we pick up with Equation 4.5.2 and solve it for I :
    CE C

    VC E = VC C − IC RC (4.6.1)

    1
    IC = (VC C − VC E )
    RC

    1 VC C
    IC = − VC E +
    RC RC

    Equation 4.6.1 is a linear equation of the form y = mx + b . The y intercept (the value of I when V = 0 ) is V /R . This is
    C CE CC C

    the maximum collector current that can be achieved. At this point the transistor is saturated and this maximum is referred to as
    I . The x intercept (the value of V
    C (sat) CE
    when I = 0 ) is V . This represents the largest possible voltage across the transistor's
    C CC

    collector-emitter. At this point the current is cut off, and therefore this voltage is called V . Lastly, the slope of the line is
    C E(cutof f )

    −1/R . A plot is shown in Figure 4.6.1.


    C

    Figure 4.6.1: Generic DC load line.


    To complete the graph, we also include the operating point for some specific transistor. This is called the quiescent point, or Q
    point, and the associated device current and voltage are called I and V
    CQ . All possible Q points lay on this line.
    C EQ

    Referring back to Example 4.5.1 and using Equation 4.6.1, we can summarize the circuit as follows:
    IC (sat) = 15mA

    VC E(cutof f ) = 15V

    Q Point for β = 100 :

    IC = 4.65mA

    VC E = 10.35V

    Q Point for β = 200 :

    IC = 9.3mA

    VC E = 5.7V

    This is plotted in Figure 4.6.2.

    4.6.1 https://eng.libretexts.org/@go/page/25409
    Figure 4.6.2: Load line for the variations on Example 4.5.1.
    If we calculate a collector current that is greater than the saturation current, then we know that the actual current will be the
    saturation current maximum. For this circuit, any calculated value greater than 15 mA indicates that the transistor would produce
    only 15 mA (our earlier example using β = 400, for instance). In reality, the true value will be very slightly less. This is because the
    collector-emitter voltage does not go all the way down to zero volts when the device is saturated. Typically, V will be a tenth
    C E(sat)

    of a volt or so for small signal devices. Precise values can be determined from device graphs such as the middle graph of Figure
    4.4.1c, labeled “Collector Saturation Region”. As an example, if I = 10 mA and I = 0.3 mA, then V
    C B is approximately
    C E(SAT )

    0.15 V. It turns out that we can use saturation to our advantage in switching circuits, as we are about see.

    This page titled 4.6: DC Load Lines is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore
    via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.

    4.6.2 https://eng.libretexts.org/@go/page/25409

    You might also like