FD6288T FD6288Q Datasheet English
FD6288T FD6288Q Datasheet English
FD6288T FD6288Q Datasheet English
Description Features
half-bridge gate driver IC designed for high Gate driver supply range from 5V to 20V
voltage, high speed drive MOSFETs that operate Independent Three half-bridge drivers
up to +250V. The special HVIC technology can 3.3V/5V logic input compatible
realize stable monolithic structure. Logic inputs
Undervoltage lockout for all channels
are compatible with CMOS or LSTTL outputs,
Cross-conduction prevention logic
and the logic voltage can be down to 3.3V. The
Internal set dead-time
output driver has a high pulse current buffer stage,
Matched propagation delay for both channels
which aims to achieve a minimum driver
impedance. Propagation delays are matched to Outputs in phase with inputs
Packages Applications
Motor drives
TSSOP-20 QFN-24
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FD6288T&Q
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air condition.
Definition Symbol Min~Max Units
High side floating supply voltage VB1,2,3 -0.3~275 V
High side floating supply offset voltage VS1,2,3 VB1,2,3-25~VB1,2,3+0.3 V
High side floating output voltage VHO1,2,3 VS1,2,3-0.3~VB1,2,3+0.3 V
Low side and logic fixed supply voltage VCC -0.3~25 V
Low side output voltage VLO1,2,3 -0.5~VCC+0.3 V
Logic input voltage(HIN,LIN) VIN -0.5~VCC+0.3 V
Allowable offset supply voltage transient dVS/dt ≤50 V/ns
20 lead TSSOP ≤1.25
Package power dissipation @TA≤25C PD W
24 lead QFN ≤3.0
20 lead TSSOP ≤100
Thermal resistance, junction to ambient RthJA C/W
24 lead QFN ≤42
Junction temperature Tj ≤150 C
Storage temperature Tstg -55~150 C
Note1: In any case, power dissipation should not exceed PD.
Note2: Voltages above the absolute maximum ratings may damage the chip.
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FD6288T&Q
Static Electrical Characteristics
VBIAS (VCC, VBS1,2,3) =15V and TA =25C unless otherwise specified. All the parameters are referenced to COM.
Definition Symbol Test conditions Min. Typ. Max. Units
Logic “1” input voltage VIH 2.7 - -
Logic “0” input voltage VIL - - 0.8
V
High level output voltage, VBIAS - VO VOH - 0.6 0.9
IO=100mA
low level output voltage, VO VOL - 0.3 0.45
Offset supply leakage current ILK VB1,2,3=VS1,2,3=250V - 0.1 5.0
Quiescent VBS supply current IQBS - 180 270
VIN =0V or 5V
Quiescent VCC supply current IQCC - 330 500 uA
Logic “1” input bias current IIN+ VIN=5V - 25 40
Logic “0” input bias current IIN- VIN=0V - - 1
VCC and VBS supply undervoltage positive VCCUV+
4.2 4.6 5.0
going threshold VBSUV+
V
VCC and VBS supply undervoltage VCCUV-
3.9 4.3 4.7
negative going threshold VBSUV-
Output high short circuit pulsed current IO+ VO=0V,PW≤10us 1.1 1.5 1.9
A
Output low short circuit pulsed current IO- VO=15V,PW≤10us 1.3 1.8 2.3
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FD6288T&Q
Typical Connection
DBS
HV
R
LIN1,LIN2,LIN3 LIN1,LIN2,LIN3 HO1,2,3
FD6288T&Q CBS
LOAD
VCC VCC VS1,2,3
C1
R
COM LO1,2,3
C1: Power filter capacitor, according to the circuit can choose 1μF ~ 10μF, as close to the chip pin as possible.
R: Gate drive resistor, and the resistance depends on the device being driven.
DBS:Bootstrap diodes. It should be selected for high reverse breakdown voltage Schottky diodes.
CBS:Bootstrap capacitors. Ceramic capacitors or tantalum capacitors should be selected, according to the circuit
can choose0. 22μF ~ 10μF. The capacitor should be as close as possible to the chip pin.
Note:
The above circuits and parameters are for reference only. The actual application circuit should be designed with the
measured results in setting the parameters.
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FD6288T&Q
Functional Block Diagram
VB3
UVLO
R
R HO3
FILTER Q DRIVER
S
HIN3 LEVEL PULSE
SHIFT GEN
DEAD TIME VS3
&
SHOOT- VCC
THROUGH
PREVENTION
LIN3 LEVEL LO3
DELAY DRIVER
SHIFT
VB2
UVLO
R
R HO2
FILTER Q DRIVER
S
HIN2 LEVEL PULSE
SHIFT GEN
DEAD TIME VS2
&
SHOOT- VCC
THROUGH
PREVENTION
LIN2 LEVEL LO2
DELAY DRIVER
SHIFT
VB1
UVLO
R
R HO1
FILTER Q DRIVER
S
HIN1 LEVEL PULSE
SHIFT GEN
DEAD TIME VS1
&
SHOOT- VCC
THROUGH
PREVENTION
LIN1 LEVEL LO1
DELAY DRIVER
SHIFT
COM
VCC
UVLO
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FD6288T&Q
Lead Assignments
HIN1 1 20 VB1
Lead definitions
Symbol Description
VCC Low side and logic fixed supply
HIN1,2,3 Logic input for high side gate driver output(HO),in phase
LIN1,2,3 Logic input for low side gate driver output(LO),in phase
COM Low side return
LO1,2,3 Low side gate drive output
VS1,2,3 High side floating supply return
HO1,2,3 High side gate drive output
VB1,2,3 High side floating supply
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FD6288T&Q
Input/Output Timing Diagram
HIN
LIN
HO
DT DT DT
LO
50% 50%
HIN
LIN
ton tr toff tf
90% 90%
HO
LO 10% 10%
HIN
50% 50%
HIN 50% 50%
LIN LIN
MT HO
50% 50%
LO HO 90%
DT DT
10%
50% 50%
MT LO
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FD6288T&Q
Figure 1A VCC Supply Current vs Supply Voltage Figure 1B VCC Supply Current vs Temperature
200 150
100
100
50
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 2A VBS Supply Current vs Supply Voltage Figure 2B VBS Supply Current vs Temperature
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FD6288T&Q
Figure 3A Logic “1” Input Current vs Supply Voltage Figure 3B Logic “1” Input Current vs Temperature
Max. Max.
5 5
4.5
4 4
3.5
3 3
2.5
2 2
1.5
1 1
0.5
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 4A Logic “0” Input Current vs Supply Voltage Figure 4B Logic “0” Input Current vs Temperature
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FD6288T&Q
Min. Min.
5 5
4.5 4.5
4 4
3.5 3.5
3 3
2.5 2.5
2 2
1.5 1.5
1 1
0.5 0.5
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 7A Logic “1” Input Voltage vs Supply Voltage Figure 7B Logic “1” Input Voltage vs Temperature
Max. Max.
4 4
3.2 3.2
2.4 2.4
1.6 1.6
0.8 0.8
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 8A Logic “0” Input Voltage vs Supply Voltage Figure 8B Logic “0” Input Voltage vs Temperature
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FD6288T&Q
Figure 9A High Level Output Voltage vs Supply Voltage Figure 9B High Level Output Voltage vs Temperature
Figure 10A Low Level Output Voltage vs Supply Voltage Figure 10B Low Level Output Voltage vs Temperature
Max. Max.
25 100
90
20 80
70
15 60
50
10 40
30
5 20
10
0 0
0 50 100 130 160 190 220 250 -40 -25 0 25 50 75 100 125
Figure 11A Offset Supply Current vs Voltage Figure 11B Offset Supply Current vs Temperature
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FD6288T&Q
2 2
1.5 1.5
1 1
0.5 0.5
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 12A Output Source Current vs Supply Voltage Figure 12B Output Source Current vs Temperature
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 13A Output Sink Current vs Supply Voltage Figure 13B Output Sink Current vs Temperature
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 14A Turn On Time vs Supply Voltage Figure 14B Turn On Time vs Temperature
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FD6288T&Q
100 100
50 50
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 15A Turn Off Time vs Supply Voltage Figure 15B Turn Off Time vs Temperature
20 20
10 10
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure16A Turn On Rise Time vs Supply Voltage Figure 16B Turn On Rise Time vs Temperature
20 20
10 10
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 17A Turn Off Fall Time vs Supply Voltage Figure 17B Turn Off Fall Time vs Temperature
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FD6288T&Q
400 400
300 300
200 200
100 100
0 0
10 12 15 18 20 -40 -25 0 25 50 75 100 125
Figure 18A Dead Time vs Supply Voltage Figure 18B Deadtime Time vs Temperature
Typ. Typ.
0 0
-3
-2
-6
-4
-9
-6
-12
-15 -8
7 10 15 18 20 -40 -25 0 25 50 75 100 125
Figure 19A VS Negative offset vs Supply Voltage Figure 19B VS Negative offset vs Temperature
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FD6288T&Q
Case outlines
20 Lead TSSOP
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FD6288T&Q
24 Lead QFN
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FD6288T&Q
Copyright Notice
Copyright by Fortior Technology (Shenzhen) Co., Ltd. All Rights Reserved.
Right to make changes —Fortior Technology (Shenzhen) Co., Ltd reserves the right to make changes in the
products - including circuits, standard cells, and/or software - described or contained herein in order to improve
design and/or performance. The information contained in this manual is provided for the general use by our
customers. Our customers should be aware that the personal computer field is the subject of many patents. Our
customers should ensure that they take appropriate action so that their use of our products does not infringe upon
any patents. It is the policy of Fortior Technology (Shenzhen) Co., Ltd. to respect the valid patent rights of third
parties and not to infringe upon or assist others to infringe upon such rights.
This manual is copyrighted by Fortior Technology (Shenzhen) Co., Ltd. You may not reproduce, transmit,
transcribe, store in a retrieval system, or translate into any language, in any form or by any means, electronic,
mechanical, magnetic, optical, chemical, manual, or otherwise, any part of this publication without the expressly
written permission from Fortior Technology (Shenzhen) Co., Ltd.
Contained herein
Copyright by Fortior Technology (Shenzhen) Co., Ltd all rights reserved.
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