Snlu 231 S
Snlu 231 S
Snlu 231 S
This User’s Guide discusses how to properly operate and configure the DP83TC811EVM. For best layout
practices, schematic files, and Bill of Materials, see the associated support documents.
Contents
1 Definitions .................................................................................................................... 3
2 Introduction ................................................................................................................... 4
3 Board Setup Details ........................................................................................................ 10
4 Firmware Configuration ................................................................................................... 13
5 Schematics .................................................................................................................. 16
6 Layout ........................................................................................................................ 24
7 Bill of Materials ............................................................................................................. 35
List of Figures
1 DP83TC811EVM – Top Side............................................................................................... 5
2 DP83TC811EVM – Bottom Side .......................................................................................... 6
3 Onboard Supply Connection and Jumpers .............................................................................. 7
4 Enable and Wake Control ................................................................................................. 9
5 DP83TC811EVM Block Diagram......................................................................................... 10
6 MSP430 Launchpad Spy-Bi-Wire Connection Points ................................................................ 13
7 Jumper Positions .......................................................................................................... 13
8 DP83TC811EVM Spy-Bi-Wire Connection Points .................................................................... 14
9 LED on Both Top and Bottom of DP83TC811EVM ................................................................... 15
10 LED D14 Both Green and Red .......................................................................................... 15
11 DP83TC811 Main Block ................................................................................................... 16
12 DP83TC811 Main Power .................................................................................................. 17
13 DP83TC811 AFE ........................................................................................................... 18
14 DP83TC811 Interface...................................................................................................... 19
15 DP83TC811 COMs ........................................................................................................ 20
16 DP83TC811 COMs #1..................................................................................................... 21
17 DP83TC811 COMs #2..................................................................................................... 22
18 DP83TC811 Hardware .................................................................................................... 23
19 Top Overlay ................................................................................................................. 24
20 Top Layer Mask ............................................................................................................ 25
21 Top Layer ................................................................................................................... 26
22 Signal Layer 2 .............................................................................................................. 27
23 Signal Layer 3 .............................................................................................................. 28
24 Signal Layer 4 .............................................................................................................. 29
25 Bottom Layer................................................................................................................ 30
26 Bottom Layer Mask ........................................................................................................ 31
27 Bottom Overlay ............................................................................................................. 32
28 Top Assembly............................................................................................................... 33
29 Bottom Assembly ........................................................................................................... 33
30 Drill Drawing ................................................................................................................ 34
31 Board Dimensions .......................................................................................................... 34
List of Tables
1 Terminology .................................................................................................................. 3
2 DP83822 Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values .......................... 11
3 DP83TC811 Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values ....................... 11
4 Bill of Materials ............................................................................................................. 35
Trademarks
All trademarks are the property of their respective owners.
1 Definitions
Table 1. Terminology
ACRONYM DEFINITION
PHY Physical Layer Transceiver
MAC Media Access Controller
SMI Serial Management Interface
MDIO Management Data I/O
MDC Management Data Clock
RGMII Reduced Gigabit Media Independent Interface
SFD Start-of-Frame Detection
VDDA Analog Core Supply Rail
VDDIO Digital Supply Rail
PD Pulldown
PU Pullup
2 Introduction
The DP83TC811EVM supports 100-Mbps speed and is EEE 802.3bw compliant. This evaluation board is
a media converter to enable bit-error rate testing, interoperability testing and PMA compliance. There is an
onboard MSP430F5529 for use with the USB-2-MDIO graphical user interface tool. A DP83822HF is
provided for copper (100BASE-TX) support.
RJ45 DP83TC811EVM
External Media Converter
Supply
VDDA 3.3 V
LDO 1.8 V AVD
VDDIO 3.3 V
DP83822
LDO 2.5 V
VDDIO
1.8 V
External
Supply
TX_CTRL / RX_CTRL
TX_CLK / RX_CLK
TX_D0 / RX_D0
TX_D1 / RX_D1
TX_D2 / RX_D2
TX_D3 / RX_D3
MDC
MSP430F5529 USB
MDIO (USB-2-MDIO)
External
Supply
VDDA 3.3 V
VDDA
LDO
LED_LINK
3.3 V LED_ACT
VDDIO DP83TC811
LDO 2.5 V DUT
CLKOUT
VDDIO
1.8 V (SMB)
MatENET
Table 2. DP83822 Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values
PU RESISTOR PU RESISTOR PD RESISTOR PD RESISTOR
PIN NAME PIN NUMBER STRAP MODE
(KΩ) DESIGNATION (KΩ) DESIGNATION
1 OPEN 1.96
2 13 1.96
RX_ER 28 R24 R26
3 6.20 1.96
4 OPEN OPEN
1 OPEN 1.96
2 13 1.96
CRS 27 R25 R28
3 6.20 1.96
4 OPEN OPEN
Table 3. DP83TC811 Bootstrap Resistor Designation and Suggested Bootstrap Resistor Values
PU RESISTOR PU RESISTOR PD RESISTOR PD RESISTOR
PIN NAME PIN NUMBER STRAP MODE
(KΩ) DESIGNATION (KΩ) DESIGNATION
1 OPEN OPEN
2 10.20 2.49
RX_D0 26 R36 R43
3 5.76 2.49
4 2.49 OPEN
1 OPEN OPEN
2 10.20 2.49
RX_D1 25 R37 R44
3 5.76 2.49
4 2.49 OPEN
1 OPEN OPEN
2 10.20 2.49
RX_D2 24 R38 R45
3 5.76 2.49
4 2.49 OPEN
1 OPEN OPEN
2 10.20 2.49
RX_ER 14 R35 R42
3 5.76 2.49
4 2.49 OPEN
1 OPEN OPEN
2 10.20 2.49
RX_DV 15 R34 R41
3 5.76 2.49
4 2.49 OPEN
1 OPEN 2.49
LED_0 35 R30 R39
4 2.49 OPEN
1 OPEN 2.49
LED_1 6 R31 R40
4 2.49 OPEN
3.3.3 JTAG
• Use J3 for JTAG access to the DP83TC811
4 Firmware Configuration
• DP83TC811EVM Configuration
– Jumper Positions
• Place shunt across pins 1 and 2 on J23
• Remove shunt from J26
• Place shunt on J25
5 Schematics
6 Layout
7 Bill of Materials
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DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL,
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modules, and samples (http://www.ti.com/sc/docs/sampterms.htm).
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Copyright © 2017, Texas Instruments Incorporated
Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to,
reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are
developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you
(individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of
this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources.
You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing your
applications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications
(and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. You
represent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that (1)
anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that
might cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, you
will thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted any
testing other than that specifically described in the published documentation for a particular TI Resource.
You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include
the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO
ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING TI RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS.
TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOT
LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF
DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL,
COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR
ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your non-
compliance with the terms and provisions of this Notice.
This Notice applies to TI Resources. Additional terms apply to the use and purchase of certain types of materials, TI products and services.
These include; without limitation, TI’s standard terms for semiconductor products http://www.ti.com/sc/docs/stdterms.htm), evaluation
modules, and samples (http://www.ti.com/sc/docs/sampterms.htm).
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated