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DRV5013-Q1
SLIS162H – DECEMBER 2014 – REVISED AUGUST 2018

DRV5013-Q1 Automotive Digital-Latch Hall Effect Sensor

1 Features 2 Applications
1• AEC-Q100 Qualified for Automotive Applications: • Power Tools
– Device HBM ESD Classification Level 2 • Flow Meters
– Device CDM ESD Classification Level C4B • Valve and Solenoid Status
– Grade 1: TA = –40°C to 125°C (Q, See Device • Brushless DC Motors
Nomenclature) • Proximity Sensing
– Grade 0: TA = –40°C to 150°C (E, See Device • Tachometers
Nomenclature)
• Digital Bipolar-Latch Hall Sensor 3 Description
• Superior Temperature Stability The DRV5013-Q1 device is a chopper-stabilized Hall
Effect Sensor that offers a magnetic sensing solution
– BOP ±10% Over Temperature
with superior sensitivity stability over temperature and
• Multiple Sensitivity Options (BOP / BRP) integrated protection features.
– 1.3 / –1.3 mT (FA, see Device Nomenclature) The magnetic field is indicated via a digital bipolar
– 2.7 / –2.7 mT (AD, see Device Nomenclature) latch output. The IC has an open-drain output stage
– 6 / –6 mT (AG, see Device Nomenclature) with 30-mA current sink capability. A wide operating
voltage range from 2.7 to 38 V with reverse polarity
– 12 / –12 mT (BC, see Device Nomenclature)
protection up to –22 V makes the device suitable for
• Supports a Wide Voltage Range a wide range of automotive applications.
– 2.7 to 38 V
Internal protection functions are provided for reverse
– No External Regulator Required supply conditions, load dump, and output short circuit
• Open-Drain Output (30-mA Sink) or over current.
• Fast 35-µs Power-On Time
Device Information(1)
• Small Package and Footprint
PART NUMBER PACKAGE BODY SIZE (NOM)
– Surface Mount 3-Pin SOT-23 (DBZ) SOT-23 (3) 2.92 mm × 1.30 mm
– 2.92 mm × 2.37 mm DRV5013-Q1
TO-92 (3) 4.00 mm × 3.15 mm
– Through-Hole 3-Pin TO-92 (LPG) (1) For all available packages, see the package option addendum
– 4.00 mm × 3.15 mm at the end of the data sheet.
• Protection Features
– Reverse Supply Protection (up to –22 V)
– Supports up to 40-V Load Dump
– Output Short-Circuit Protection
– Output Current Limitation
– OUT Short to Battery Protection

Output State Device Packages

OUT

Bhys

B (mT)
BRP BOP
BOF
(North) (South)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features .................................................................. 1 7.3 Feature Description................................................. 11
2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 16
3 Description ............................................................. 1 8 Application and Implementation ........................ 17
4 Revision History..................................................... 2 8.1 Application Information............................................ 17
8.2 Typical Applications ................................................ 17
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 5 9 Power Supply Recommendations...................... 19
6.1 Absolute Maximum Ratings ...................................... 5 10 Layout................................................................... 20
6.2 ESD Ratings.............................................................. 5 10.1 Layout Guidelines ................................................. 20
6.3 Recommended Operating Conditions....................... 5 10.2 Layout Example .................................................... 20
6.4 Thermal Information .................................................. 5 11 Device and Documentation Support ................. 21
6.5 Electrical Characteristics........................................... 6 11.1 Device Support...................................................... 21
6.6 Switching Characteristics .......................................... 6 11.2 Receiving Notification of Documentation Updates 21
6.7 Magnetic Characteristics........................................... 7 11.3 Community Resources.......................................... 22
6.8 Typical Characteristics .............................................. 8 11.4 Trademarks ........................................................... 22
7 Detailed Description ............................................ 10 11.5 Electrostatic Discharge Caution ............................ 22
7.1 Overview ................................................................. 10 11.6 Glossary ................................................................ 22
7.2 Functional Block Diagram ....................................... 10 12 Mechanical, Packaging, and Orderable
Information ........................................................... 22

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (October 2017) to Revision H Page

• Changed Power Supply Recommendations section ........................................................................................................... 19

Changes from Revision F (September 2016) to Revision G Page

• Changed location of automotive-specific Features bullets to top of Features section .......................................................... 1

• Added device HBM and CDM classification sub-bullets to automotive-specific Features bullet ........................................... 1
• Added last sentence to Device Functional Modes section .................................................................................................. 16

Changes from Revision E (August 2016) to Revision F Page

• Made changes to the Power-on time in the Electrical Characteristics table .......................................................................... 6

Changes from Revision D (June 2016) to Revision E Page

• Revised preliminary limits for FA version in the Magnetic Characteristics table .................................................................... 7
• Added the Layout section ..................................................................................................................................................... 20

Changes from Revision C (May 2016) to Revision D Page

• Revised preliminary limits for the FA version ......................................................................................................................... 7

Changes from Revision B (February 2016) to Revision C Page

• Revised preliminary limits for the FA version ........................................................................................................................ 7

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Changes from Revision A (December 2015) to Revision B Page

• Added the FA device option ................................................................................................................................................... 1

• Added the typical bandwidth value to the Magnetic Characteristics table ............................................................................. 7

Changes from Original (December 2014) to Revision A Page

• Corrected body size of SOT-23 package and SIP package name to TO-92 ........................................................................ 1
• Added BMAX to Absolute Maximum Ratings ........................................................................................................................... 5
• Removed table notes regarding testing for the operating junction temperature in Absolute Maximum Ratings .................. 5
• Updated package tape and reel options for M and blank ................................................................................................... 21
• Added Community Resources.............................................................................................................................................. 22

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5 Pin Configuration and Functions

For additional configuration information, see Device Markings and Mechanical, Packaging, and Orderable
Information.

DBZ Package LPG Package

3-Pin SOT-23 3-Pin TO-92
Top View Top View

2 OUT

GND 3 1 2 3

1 VCC

VCC OUT
GND

Pin Functions
PIN
TYPE DESCRIPTION
NAME DBZ LPG
GND 3 2 GND Ground pin
OUT 2 3 Output Hall sensor open-drain output. The open drain requires a resistor pullup.
2.7 to 38 V power supply. Bypass this pin to the GND pin with a 0.01-µF (minimum)
VCC 1 1 PWR
ceramic capacitor rated for VCC.

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6 Specifications
6.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC –22 (2) 40 V
Power supply voltage Voltage ramp rate (VCC), VCC < 5 V Unlimited
V/µs
Voltage ramp rate (VCC), VCC > 5 V 0 2
Output pin voltage –0.5 40 V
Output pin reverse current during reverse supply condition 0 100 mA
Magnetic flux density, BMAX Unlimited
Q, see Figure 24 –40 150
Operating junction temperature, TJ °C
E, see Figure 24 –40 175
Storage temperature, Tstg –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Ensured by design. Only tested to –20 V.

6.2 ESD Ratings

VALUE UNIT
Human-body model (HBM), per AEC Q100-002 (1) ±2500
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per AEC Q100-011 ±500

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Power supply voltage 2.7 38 V
VO Output pin voltage (OUT) 0 38 V
ISINK Output pin current sink (OUT) (1) 0 30 mA
Operating ambient Q, see Figure 24 –40 125
TA °C
temperature E, see Figure 24 –40 150

(1) Power dissipation and thermal limits must be observed

6.4 Thermal Information

DRV5013-Q1
THERMAL METRIC (1) DBZ (SOT-23) LPG (TO-92) UNIT
3 PINS 3 PINS
RθJA Junction-to-ambient thermal resistance 333.2 180 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 99.9 98.6 °C/W
RθJB Junction-to-board thermal resistance 66.9 154.9 °C/W
ψJT Junction-to-top characterization parameter 4.9 40 °C/W
ψJB Junction-to-board characterization parameter 65.2 154.9 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

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6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES (VCC)
VCC VCC operating voltage 2.7 38 V
VCC = 2.7 to 38 V, TA = 25°C 2.7
ICC Operating supply current mA
VCC = 2.7 to 38 V, TA = TA, MAX (1) 3 3.5
AD, AG, BC versions 35 50
ton Power-on time µs
FA version 35 70
OPEN DRAIN OUTPUT (OUT)
VCC = 3.3 V, IO = 10 mA, TA = 25°C 22
rDS(on) FET on-resistance Ω
VCC = 3.3 V, IO = 10 mA, TA = 125°C 36 50
Ilkg(off) Off-state leakage current Output Hi-Z 1 µA
PROTECTION CIRCUITS
VCCR Reverse supply voltage –22 V
IOCP Overcurrent protection level OUT shorted VCC 15 30 45 mA

(1) TA, MAX is 125°C for Q Grade 1 devices and 150°C for E Grade 0 devices (see Figure 24)

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OPEN DRAIN OUTPUT (OUT)
td Output delay time B = BRP – 10 mT to BOP + 10 mT in 1 µs 13 25 µs
tr Output rise time (10% to 90%) R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V 200 ns
tf Output fall time (90% to 10%) R1 = 1 kΩ, CO = 50 pF, VCC = 3.3 V 31 ns

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6.7 Magnetic Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (1)
ƒBW Bandwidth (2) 20 30 kHz
DRV5013FA: 1.3 / –1.3 mT
BOP Operate point; see Figure 12 –0.6 1.3 3.4 mT
BRP Release point; see Figure 12 –3.4 –1.3 0.6 mT
Bhys Hysteresis; Bhys = (BOP – BRP) 1.2 2.6 mT
BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT
DRV5013AD: 2.7 / –2.7 mT
BOP Operate point; see Figure 12 1 2.7 5 mT
BRP Release point; see Figure 12 –5 –2.7 –1 mT
Bhys Hysteresis; Bhys = (BOP – BRP) 5.4 mT
BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT
DRV5013AG: 6 / –6 mT
BOP Operate point; see Figure 12 3 6 9 mT
BRP Release point; see Figure 12 –9 –6 –3 mT
Bhys Hysteresis; Bhys = (BOP – BRP) 12 mT
BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT
DRV5013BC: 12 / –12 mT
BOP Operate point; see Figure 12 6 12 18 mT
BRP Release point; see Figure 12 –18 –12 –6 mT
Bhys Hysteresis; Bhys = (BOP – BRP) 24 mT
BO Magnetic offset; BO = (BOP + BRP) / 2 –1.5 0 1.5 mT

(1) 1 mT = 10 Gauss
(2) Bandwidth describes the fastest changing magnetic field that can be detected and translated to the output.

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6.8 Typical Characteristics

TA > 125°C data is valid for Grade 0 devices only (E, see Figure 24)

3.5 3.5
TA ± ƒ& TA = 125°C VCC = 3.3 V
TA = 25°C TA = 150°C VCC = 13.2 V
TA = 75°C VCC = 38 V
Supply Current (mA)

Supply Current (mA)

3 3

2.5 2.5

2 2
0 10 20 30 40 -50 -25 0 25 50 75 100 125 150
Supply Voltage (V) D009
Ambient Temperature (°C) D010

Figure 1. ICC vs VCC Figure 2. ICC vs Temperature

14 14
Magnetic Field Operate Point BOP (mT)

Magnetic Field Operate Point BOP (mT)

12 12

10 DRV5013AD 10
DRV5013AG DRV5013AD
8 DRV5013BC DRV5013AG
8
DRV5013BC

6 6

4 4

2 2

0 0
0 10 20 30 40 -50 -25 0 25 50 75 100 125 150
Supply Voltage (V) D001
Ambient Temperature (°C) D002
TA = 25°C VCC = 3.3 V

Figure 3. BOP vs VCC Figure 4. BOP vs Temperature

0 0
Magnetic Field Release Point BRP (mT)

Magnetic Field Operate Point BRP (mT)

-2 -2

-4 -4

-6 -6

DRV5013AD
-8 DRV5013AD -8
DRV5013AG
DRV5013AG DRV5013BC
-10 DRV5013BC -10

-12 -12

-14 -14
0 10 20 30 40 -50 -25 0 25 50 75 100 125 150
Supply Voltage (V) D003
Ambient Temperature (°C) D004
TA = 25°C VCC = 3.3 V

Figure 5. BRP vs VCC Figure 6. BRP vs Temperature

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Typical Characteristics (continued)

TA > 125°C data is valid for Grade 0 devices only (E, see Figure 24)
30 30

25 25

20 20
Hysteresis (mT)

Hysteresis (mT)
DRV5013AD
DRV5013AG DRV5013AD
DRV5013BC DRV5013AG
15 15 DRV5013BC

10 10

5 5

0 0
0 10 20 30 40 -50 -25 0 25 50 75 100 125 150
Supply Voltage (V) D007
Ambient Temperature (°C) D008
TA = 25°C VCC = 3.3 V

Figure 7. Hysteresis vs VCC Figure 8. Hysteresis vs Temperature

0.25 0.25
DRV5013AD DRV5013AD
DRV5013AG DRV5013AG
DRV5013BC DRV5013BC
0.125 0.125
Offset (mT)

Offset (mT)

0 0

-0.125 -0.125

-0.25 -0.25
0 10 20 30 40 -50 -25 0 25 50 75 100 125 150
Supply Voltage (V) D005
Ambient Temperature (°C) D006
TA = 25°C VCC = 3.3 V

Figure 9. Offset vs VCC Figure 10. Offset vs Temperature

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7 Detailed Description

7.1 Overview
The DRV5013-Q1 device is a chopper-stabilized Hall sensor with a digital latched output for magnetic sensing
applications. The DRV5013-Q1 device can be powered with a supply voltage between 2.7 and 38 V, and
continuously survives continuous –22-V reverse-battery conditions. The DRV5013-Q1 device does not operate
when –22 to 2.4 V is applied to the VCC pin (with respect to the GND pin). In addition, the device can withstand
voltages up to 40 V for transient durations.
The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic
field. A north pole near the marked side of the package is a negative magnetic field.
The output state is dependent on the magnetic field perpendicular to the package. A south pole near the marked
side of the package causes the output to pull low (operate point, BOP), and a north pole near the marked side of
the package causes the output to release (release point, BRP). Hysteresis is included in between the operate
point and the release point therefore magnetic-field noise does not accidentally trip the output.
An external pullup resistor is required on the OUT pin. The OUT pin can be pulled up to VCC, or to a different
voltage supply. This allows for easier interfacing with controller circuits.

7.2 Functional Block Diagram

2.7 V to 38 V

C1

VCC

Regulated Supply

Temperature R1
Bias
Compensation
OUT

C2
OCP (Optional)
Offset Cancel

+
Hall Element Gate
± Drive

Reference

GND

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7.3 Feature Description

7.3.1 Field Direction Definition
A positive magnetic field is defined as a south pole near the marked side of the package as shown in Figure 11.
SOT-23 (DBZ) TO-92 (LPG)
B > 0 mT B < 0 mT B > 0 mT B < 0 mT

N S N S

S N S N

1 2 3 1 2 3
(Bottom view)
N = North pole, S = South pole

Figure 11. Field Direction Definition

7.3.2 Device Output

If the device is powered on with a magnetic field strength between BRP and BOP, then the device output is
indeterminate and can either be Hi-Z or Low. If the field strength is greater than BOP, then the output is pulled
low. If the field strength is less than BRP, then the output is released.
OUT

Bhys

BRP (North) BOF BOP (South) B (mT)

Figure 12. DRV5013-Q1—BOP > 0

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Feature Description (continued)

7.3.3 Power-On Time
After applying VCC to the DRV5013-Q1 device, ton must elapse before the OUT pin is valid. During the power-up
sequence, the output is Hi-Z. A pulse as shown in Figure 13 and Figure 14 occurs at the end of ton. This pulse
can allow the host processor to determine when the DRV5013-Q1 output is valid after startup. In Case 1
(Figure 13) and Case 2 (Figure 14), the output is defined assuming a constant magnetic field B > BOP and B <
BRP.
VCC

t (s)

B (mT)

BOP

BRP
t (s)

OUT

Valid Output

t (s)
ton
Figure 13. Case 1: Power On When B > BOP

VCC

t (s)

B (mT)

BOP

BRP
t (s)

OUT

Valid Output

t (s)
ton
Figure 14. Case 2: Power On When B < BRP

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Feature Description (continued)

If the device is powered on with the magnetic field strength BRP < B < BOP, then the device output is
indeterminate and can either be Hi-Z or pulled low. During the power-up sequence, the output is held Hi-Z until
ton has elapsed. At the end of ton, a pulse is given on the OUT pin to indicate that ton has elapsed. After ton, if the
magnetic field changes such that BOP < B, the output is released. Case 3 (Figure 15) and Case 4 (Figure 16)
show examples of this behavior.
VCC

t (s)

B (mT)

BOP

BRP
t (s)

OUT

Valid Output

t (s)
ton td
Figure 15. Case 3: Power On When BRP < B < BOP, Followed by B > BOP

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Feature Description (continued)

VCC

t (s)

B (mT)

BOP

BRP
t (s)

OUT

Valid Output

t (s)
ton td
Figure 16. Case 4: Power On When BRP < B < BOP, Followed by B < BRP

7.3.4 Output Stage

The DRV5013-Q1 output stage uses an open-drain NMOS, and it is rated to sink up to 30 mA of current. For
proper operation, calculate the value of the pullup resistor R1 using Equation 1.
Vref max V min
d R1 d ref
30 mA 100 µA (1)
The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current
is generally better, however faster transitions and bandwidth require a smaller resistor for faster switching.
In addition, ensure that the value of R1 > 500 Ω to ensure the output driver can pull the OUT pin close to GND.

NOTE
Vref is not restricted to VCC. The allowable voltage range of this pin is specified in the
Absolute Maximum Ratings.

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Feature Description (continued)

Vref

R1

OUT

ISINK C2
OCP

Gate
Drive

GND

Figure 17.

Select a value for C2 based on the system bandwidth specifications as shown in Equation 2.
1
u ¦BW +]
2S u R1 u C2 (2)
Most applications do not require this C2 filtering capacitor.

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Feature Description (continued)

7.3.5 Protection Circuits
The DRV5013-Q1 device is fully protected against overcurrent and reverse-supply conditions.

7.3.6 Overcurrent Protection (OCP)

An analog current-limit circuit limits the current through the FET. The driver current is clamped to IOCP. During
this clamping, the rDS(on) of the output FET is increased from the nominal value.

7.3.7 Load Dump Protection

The DRV5013-Q1 device operates at DC VCC conditions up to 38 V nominally, and can additionally withstand
VCC = 40 V. No current-limiting series resistor is required for this protection.

7.3.8 Reverse Supply Protection

The DRV5013-Q1 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V).

NOTE
In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings
specified in the Absolute Maximum Ratings.

Table 1.
FAULT CONDITION DEVICE DESCRIPTION RECOVERY
FET overload (OCP) ISINK ≥ IOCP Operating Output current is clamped to IOCP IO < IOCP
Load dump 38 V < VCC < 40 V Operating Device will operate for a transient duration VCC ≤ 38 V
Reverse supply –22 V < VCC < 0 V Disabled Device will survive this condition VCC ≥ 2.7 V

7.4 Device Functional Modes

The DRV5013-Q1 device is active only when VCC is between 2.7 and 38 V.
When a reverse supply condition exists, the device is inactive. With regard to some industry standards that
require analyzing every possible output from a device, an internal clock is unlikely to couple to the output.

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8 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

8.1 Application Information

The DRV5013-Q1 device is used in magnetic-field sensing applications.

8.2 Typical Applications

8.2.1 Standard Circuit
C2
680 pF
(Optional)

OUT
2
R1
3 10 kŸ VCC
VCC
1

C1
0.01 µF
(minimum)
Figure 18. Typical Application Circuit

8.2.1.1 Design Requirements

For this design example, use the parameters listed in Table 2 as the input parameters.

Table 2. Design Parameters

DESIGN PARAMETER REFERENCE EXAMPLE VALUE
Supply voltage VCC 3.2 to 3.4 V
System bandwidth ƒBW 10 kHz

8.2.1.2 Detailed Design Procedure

Table 3. External Components

COMPONENT PIN 1 PIN 2 RECOMMENDED
C1 VCC GND A 0.01-µF (minimum) ceramic capacitor rated for VCC
C2 OUT GND Optional: Place a ceramic capacitor to GND
R1 OUT REF (1) Requires a resistor pullup

(1) REF is not a pin on the DRV5013-Q1 device, but a REF supply-voltage pullup is required for the OUT pin; the OUT pin may be pulled
up to VCC.

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8.2.1.2.1 Configuration Example

In a 3.3-V system, 3.2 V ≤ Vref ≤ 3.4 V. Use Equation 3 to calculate the allowable range for R1.
Vref max V min
d R1 d ref
30 mA 100 µA (3)
For this design example, use Equation 4 to calculate the allowable range of R1.
3.4 V 3.2 V
d R1 d
30 mA 100 µA (4)
Therefore:
113 Ω ≤ R1 ≤ 32 kΩ (5)
After finding the allowable range of R1 (Equation 5), select a value between 500 Ω and 32 kΩ for R1.
Assuming a system bandwidth of 10 kHz, use Equation 6 to calculate the value of C2.
1
u ¦BW +]
2S u R1 u C2 (6)
For this design example, use Equation 7 to calculate the value of C2.
1
2 u 10 kHz
2S u R1 u C2 (7)
An R1 value of 10 kΩ and a C2 value less than 820 pF satisfy the requirement for a 10-kHz system bandwidth.
A selection of R1 = 10 kΩ and C2 = 680 pF would cause a low-pass filter with a corner frequency of 23.4 kHz.

8.2.1.3 Application Curves

OUT OUT

R1 = 10 kΩ pull-up No C2 R1 = 10-kΩ pull-up C2 = 680 pF

Figure 19. 10-kHz Switching Magnetic Field Figure 20. 10-kHz Switching Magnetic Field

-2

-4
Magnitude (dB)

-6

-8

-10

-12

-14
100 1000 10000 100000
Frequency (Hz) D011
R1 = 10-kΩ pull-up C2 = 680 pF

Figure 21. Low-Pass Filtering

18 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated

Product Folder Links: DRV5013-Q1

 DRV5013-Q1
www.ti.com SLIS162H – DECEMBER 2014 – REVISED AUGUST 2018

8.2.2 Alternative Two-Wire Application

For systems that require minimal wire count, the device output can be connected to VCC through a resistor, and
the total supplied current can be sensed near the controller.
R1

+
OUT 2 VCC 1 ±

C1

3
GND
Controller
Current
sense

Figure 22. 2-Wire Application

Current can be sensed using a shunt resistor or other circuitry.

8.2.2.1 Design Requirements

Table 4 lists the related design parameters.

Table 4. Design Parameters

DESIGN PARAMETER REFERENCE EXAMPLE VALUE
Supply voltage VCC 12 V
OUT resistor R1 1 kΩ
Bypass capacitor C1 0.1 µF
Current when B < BRP IRELEASE About 3 mA
Current when B > BOP IOPERATE About 15 mA

8.2.2.2 Detailed Design Procedure

When the open-drain output of the device is high-impedance, current through the path equals the ICC of the
device (approximately 3 mA).
When the output pulls low, a parallel current path is added, equal to VCC / (R1 + rDS(on)). Using 12 V and 1 kΩ,
the parallel current is approximately 12 mA, making the total current approximately 15 mA.
The local bypass capacitor C1 should be at least 0.1 µF, and a larger value if there is high inductance in the
power line interconnect.

9 Power Supply Recommendations

The DRV5013-Q1 device is designed to operate from an input voltage supply (VM) range between 2.7 V and
38 V. A 0.01-µF (minimum) ceramic capacitor rated for VCC must be placed as close to the DRV5013-Q1 device
as possible. Larger values of the bypass capacitor may be needed to attenuate any significant high-frequency
ripple and noise components generated by the power source. TI recommends limiting the supply voltage
variation to less than 50 mVPP.

Copyright © 2014–2018, Texas Instruments Incorporated Submit Documentation Feedback 19

Product Folder Links: DRV5013-Q1
DRV5013-Q1
SLIS162H – DECEMBER 2014 – REVISED AUGUST 2018 www.ti.com

10 Layout

10.1 Layout Guidelines

The bypass capacitor should be placed near the DRV5013-Q1 device for efficient power delivery with minimal
inductance. The external pullup resistor should be placed near the microcontroller input to provide the most
stable voltage at the input; alternatively, an integrated pullup resistor within the GPIO of the microcontroller can
be used.
Generally, using PCB copper planes underneath the DRV5013-Q1 device has no effect on magnetic flux, and
does not interfere with device performance. This is because copper is not a ferromagnetic material. However, If
nearby system components contain iron or nickel, they may redirect magnetic flux in unpredictable ways.

10.2 Layout Example

OUT VCC

GND

Figure 23. DRV5013-Q1 Layout Example

20 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated

Product Folder Links: DRV5013-Q1

 DRV5013-Q1
www.ti.com SLIS162H – DECEMBER 2014 – REVISED AUGUST 2018

11 Device and Documentation Support

11.1 Device Support

11.1.1 Device Nomenclature
Figure 24 shows a legend for reading the complete device name for and DRV5013-Q1 device.
DRV5013 (AD) (Q) (DBZ) (R) (Q1)

Prefix AEC-Q100
DRV5013: Digital latch Hall sensor Q1: Automotive qualification
Blank: Non-auto
BOP/BRP
FA: 1.3/±1.3 mT
Tape and Reel
AD: 2.7/±2.7 mT
R: 3000 pcs/reel
AG: 6/±6 mT
T: 250 pcs/reel
BC: 12/±12 mT
M: 3000 pcs/box (ammo)
Blank: 1000 pcs/bag (bulk)

Package
DBZ: 3-pin SOT-23
LPG: 3-pin TO-92

Temperature Range
Q: ±40 to 125°C
E: ±40 to 150°C

Figure 24. Device Nomenclature

11.1.2 Device Markings

Marked Side Marked Side Front
3

1 2 3
1 2
Marked Side

1 2 3
(Bottom view)
Figure 25. SOT-23 (DBZ) Package Figure 26. TO-92 (LPG) Package
indicates the Hall effect sensor (not to scale). The Hall element is located in the center of the package with a
tolerance of ±100 µm. The height of the Hall element from the bottom of the package is 0.7 mm ±50 µm in the DBZ
package and 0.987 mm ±50 µm in the LPG package.

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates — go to the product folder for your device on ti.com. In the
upper right-hand corner, click the Alert me button to register and receive a weekly digest of product information
that has changed (if any). For change details, check the revision history of any revised document.
Copyright © 2014–2018, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: DRV5013-Q1
DRV5013-Q1
SLIS162H – DECEMBER 2014 – REVISED AUGUST 2018 www.ti.com

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

22 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated

Product Folder Links: DRV5013-Q1

 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

DRV5013ADEDBZJQ1 ACTIVE SOT-23 DBZ 3 10000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAD

DRV5013ADEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAD

DRV5013ADEDBZTQ1 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAD

DRV5013ADELPGMQ1 ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 150 +NJAD

DRV5013ADELPGQ1 ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 150 +NJAD

DRV5013ADQDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAD

DRV5013ADQDBZTQ1 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAD

DRV5013ADQLPGMQ1 ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 +NKAD

DRV5013ADQLPGQ1 ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 +NKAD

DRV5013AGEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAG

DRV5013AGEDBZTQ1 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJAG

DRV5013AGELPGMQ1 ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 150 +NJAG

DRV5013AGELPGQ1 ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 150 +NJAG

DRV5013AGQDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAG

DRV5013AGQDBZTQ1 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKAG

DRV5013AGQLPGMQ1 ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 +NKAG

DRV5013AGQLPGQ1 ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 +NKAG

DRV5013BCEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJBC

DRV5013BCEDBZTQ1 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 150 +NJBC

DRV5013BCELPGMQ1 ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 150 +NJBC

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

DRV5013BCELPGQ1 ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 150 +NJBC

DRV5013BCQDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKBC

DRV5013BCQDBZTQ1 ACTIVE SOT-23 DBZ 3 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 +NKBC

DRV5013BCQLPGMQ1 ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 +NKBC

DRV5013BCQLPGQ1 ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 +NKBC

DRV5013FAEDBZRQ1 ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 150 +NJFA

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF DRV5013-Q1 :

• Catalog: DRV5013

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product

Addendum-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 27-Aug-2020

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV5013ADEDBZJQ1 SOT-23 DBZ 3 10000 330.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013ADEDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013ADEDBZTQ1 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013ADQDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013ADQDBZTQ1 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013AGEDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013AGEDBZTQ1 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013AGQDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013AGQDBZTQ1 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013BCEDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013BCEDBZTQ1 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013BCQDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013BCQDBZTQ1 SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5013FAEDBZRQ1 SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 27-Aug-2020

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DRV5013ADEDBZJQ1 SOT-23 DBZ 3 10000 346.0 346.0 29.0
DRV5013ADEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0
DRV5013ADEDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0
DRV5013ADQDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0
DRV5013ADQDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0
DRV5013AGEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0
DRV5013AGEDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0
DRV5013AGQDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0
DRV5013AGQDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0
DRV5013BCEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0
DRV5013BCEDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0
DRV5013BCQDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0
DRV5013BCQDBZTQ1 SOT-23 DBZ 3 250 202.0 201.0 28.0
DRV5013FAEDBZRQ1 SOT-23 DBZ 3 3000 202.0 201.0 28.0

Pack Materials-Page 2
4203227/C
 PACKAGE OUTLINE
DBZ0003A SCALE 4.000
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR

2.64 C
2.10
1.12 MAX
1.4
B A
1.2 0.1 C
PIN 1
INDEX AREA

0.95
3.04
1.9 2.80
3

2
0.5
3X
0.3
0.10
0.2 C A B (0.95) TYP
0.01

0.25
GAGE PLANE 0.20
TYP
0.08

0.6
TYP SEATING PLANE
0 -8 TYP 0.2

4214838/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.

www.ti.com
 EXAMPLE BOARD LAYOUT
DBZ0003A SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR

PKG
3X (1.3)
1

3X (0.6)

SYMM

3
2X (0.95)

(R0.05) TYP
(2.1)

LAND PATTERN EXAMPLE

SCALE:15X

SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK

0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)

SOLDER MASK DETAILS

4214838/C 04/2017

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
DBZ0003A SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR

PKG

3X (1.3)
1

3X (0.6)

SYMM
3
2X(0.95)

(R0.05) TYP
(2.1)

SOLDER PASTE EXAMPLE

BASED ON 0.125 THICK STENCIL
SCALE:15X

4214838/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.

www.ti.com
 PACKAGE OUTLINE
LPG0003A SCALE 1.300
TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE

4.1
3.9

3.25
3.05 0.55
3X
0.40 5.05
MAX
1 3

3X (0.8)

3X
15.5
15.1

0.48 0.51
3X 3X
0.35 0.36
2X 1.27 0.05
2.64
2.44

2.68
2.28
1.62
2X (45 ) 1.42

1 2 3
(0.5425) 0.86
0.66
4221343/C 01/2018

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.

www.ti.com
 EXAMPLE BOARD LAYOUT
LPG0003A TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE

FULL R
0.05 MAX (1.07) TYP
METAL
ALL AROUND TYP 3X ( 0.75) VIA
TYP

2X
METAL

(1.7) 2X (1.7)

2X
SOLDER MASK
OPENING
1 2 3
(R0.05) TYP 2X (1.07)
(1.27)
SOLDER MASK
OPENING (2.54)

LAND PATTERN EXAMPLE

NON-SOLDER MASK DEFINED
SCALE:20X

4221343/C 01/2018

www.ti.com
 TAPE SPECIFICATIONS
LPG0003A TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE

0 1
13.0 0 1
12.4

1 MAX
21
18

2.5 MIN
6.5
5.5
9.5
8.5 0.25
0.15

19.0
17.5

3.8-4.2 TYP 0.45

6.55 12.9 0.35
6.15 12.5

4221343/C 01/2018

www.ti.com
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