Unit - 2 Semiconductor Physics

UNIT – II - SEMICONDUCTOR PHYSICS

• Intrinsic Semiconductor
• Extrinsic Semiconductor – N type & P- type
• Hall effect & Hall devices
• Ohmic contacts , Schottky diode ,Tunnel diode
• MOS Capacitor , Voltage Regulator

1.Intrinsic Semiconductor

Let us assume the mass of free electron in

the conduction band is m e and mass of hole in the
valence band is m h . Let the minimum energy
corresponding to the lowest level of conduction
band be Ec and the maximum energy
corresponding to the highest level of valence band
be Ev.
At 0K intrinsic semiconductor behaves as
insulator. But when the temperature increases
some electrons move from valence band to conduction band. Therefore both electrons in the
conduction band and holes in the valence band will contribute to electrical conductivity.
Therefore the carrier concentration or density of electrons (ne) and holes (nh) has to be
calculated.
Let us assume the mass of free electron in the conduction band is m e and mass of hole
in the valence band is m h . Let the minimum energy corresponding to the lowest level of
conduction band be Ec and the maximum energy corresponding to the highest level of
valence band be Ev.
Density of electrons in conduction band

Density of electrons  n = Z (E ). F (E ) dE
in conduction band  e


Ec
(1)
From Fermi-dirac statistics we can write
(2)
Considering minimum energy of conduction band as Ec and the maximum energy can go
upto ∞, we can write,

Fermi function, the probability of finding an electron in a given energy level is

1
F (E ) =
1 + e (E − E F )/ K B T
Substituting F(E) in equation (1), we have density of electrons in conduction band is

(3)

We know E is an energy level lying in the conduction band, therefore for all possible
(E − E F )/ K B T
temperatures E-EF >>KBT (or) E-EF / KBT >> 1 (or) e  1

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 Unit - 2 Semiconductor Physics

1 + e (E − E F )/ K B T  e (E − E F )/ K B T
Therefore equation (3) becomes

(4)

Let us substitute E-Ec = x or E = Ec + x and dE = dx

limits: when E = Ec; x = 0
when E = ∞; x = ∞
therefore the limits are 0 to ∞
now equation (4) becomes

3/ 2
 2 m e* K B T 
n e = 2  e (E F − E c ) / K B T
 h2 
(5)
The above equation represents the equation for density of electrons.

Density of holes in valence band

F(E) represents the probability of filled state or probability of finding an electron in
the given state. As the maximum probability is 1, the probability of unfilled state or the
probability of finding a hole will be [1-F(E)].
We know, the maximum energy in the valence band is Ev and the minimum energy is
-∞. Therefore the density of holes in valence band nh is given by
E
Density of holes  n = v Z (E ). [1 - F (E ) ] dE
in valence band 
h 
− (6)
Considering maximum energy of valence band as Ev and the minimum energy can go upto -
∞, we can write,
(7)
The probability of finding a hole in a given energy level is
1
1 − F (E ) = 1 -
1 + e (E − E F )/ K B T
e (E − E F )/ K B T
=
1 + e (E − E F )/ K B T
We know E is an energy level lying in the valence band, therefore for all possible
(E − E F )/ K B T
temperatures E-EF << KBT (or) E-EF / KBT << 1 (or) e  1
1 + e (E − E F )/ K B T  1
1 − F (E ) = e (E − E F )/ K B T
Therefore equation (7) becomes
(8)
Let us substitute Ev - E = x or E = Ev - x and dE = - dx
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 Unit - 2 Semiconductor Physics

limits: when E = -∞; Ev – (-∞) = x; x = ∞

when E = Ev ; x = 0
therefore the limits are ∞ to 0
now equation (8) becomes

To exclude the negative sign, we can interchange the limits.

3/ 2
 2 m h* K B T 
n h = 2  e (Ev − E F )/ K B T
 h2 
The above equation represents the equation for density of holes.

Variation of Fermi level with temperature in an intrinsic semiconductor

For an intrinsic semiconductor, the number of electrons (ne) is equal to the number of holes
(nh).
Equating eqns (5) and (7),

Taking log on both sides,

m *  2 E F − (E v + E c )
3 / 2 log  h =
m *  KBT
 e 
m h*
2 E F = E c + E v + 3 / 2 K B T log
m e*
Ec + Ev 3 m * 
EF = + K B T log  h 
2 4 m * 
 e  (10)

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 Unit - 2 Semiconductor Physics

If , then =0
Equation (10) becomes
(E c + E v )
EF =
2 (11)

From equation (11), the Fermi energy level lies in the midway
between Ec and Ev in an intrinsic semiconductor at absolute zero. But
m h* > m e* and the Fermi energy level slightly increases with the increase in temperature.

2. Carrier concentration in n-type semiconductor

The energy band structure of n-type semiconductor is as shown in
figure.At 0 K, EF will lie exactly between Ec and Ed, but even at low
temperature some electrons may go from Ed to Ec. Let us assume
that Then the density of electrons in conduction
band can be written as

…(1)
Let be the number of donor energy levels per (i.e) density of
state Z (Ed) dE, which has energy Ed below the conduction band.
If some electrons are donated from the donor energy level to conduction band say for
example if two electrons go to conduction band then two vacant sites (holes) will be created
in Ed levels as shown in figure
Thus, in general we can write the density of holes in donor energy level as

i.e
….(2)
we know

……..(3)
Since
(or)
(or)

(or)

….. (4)
Substituting equation (4) in (2)
(5)
At equilibrium condition

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 Unit - 2 Semiconductor Physics

Equating equation (1) and (5) we get

Equating equation (1) and (5) we get

(or)

Taking log on both sides

 
 

2 E F = ( E c + E d ) + K B T log 
Nd 
3/ 2 
 2 2m e K BT  
*

  h2  
 
 
 
( Ec + Ed ) K BT  Nd 
EF = + log  3/ 2 
………..(6)
 2 2m e K BT  
2 2 *

  h2  
 
Substitute eqn (6) in eqn (1)

……..(7)

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 Unit - 2 Semiconductor Physics

………..(8)

………..(9)

where Ed – Ec = ( Ionisation energy)

The above expression is the charge carrier concentration for n-type semiconductor.

Variation of Fermi level with temperature and donor impurity concentration

Fermi level for n-type semiconducting material is as
follows

At 0K i.e when T=0, we can write the above equation

as

The Fermi level decreases with increase in temperature

as all the impurity atoms get ionized as temperature
increases. At high temperature the material behave as an intrinsic semiconductor. For an
intrinsic semiconductor the Fermi level lies near the middle of the band gap so the Fermi
level decreases with temperature. As the impurity concentration increases the Fermi level
increases as the level for an n-type material exist near the middle of impurity energy level and
conduction band.

3. Carrier concentration in ‘p’ type semiconductor

For p-type at absolute zero EF will be exactly between . At low temperatures some
electrons from valence band fills the holes in the acceptor energy
levels as shown in figure.
We know the density of holes in the valence band,
3/ 2
 2 m h* K B T 
n h = 2  e (Ev − E F )/ K B T
 h2 
(1)
Let Na be the number of acceptor energy levels per cm3 which has
energy Ea above valence band. If some electrons are accepted by the
acceptor energy levels from the valence band, say for example, if two
electrons are accepted to fill the hole sites in the acceptor levels, then
two holes will be created in the valence band as shown in figure.
Therefore, in general, the electron density in the acceptor energy level can be written as

i.e

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 Unit - 2 Semiconductor Physics

here

Since

or
or

Substituting equation (3) in (2) we get

At equilibrium condition,
Number of holes per unit Number of electrons per unit
Volume in valence band = volume in acceptor energy level
(i.e hole density) (i.e electron density)

Equating equation (1) and (4) we have

Taking log on both sides

……………..(5)
Substitute eqn (5) in eqn (1)
 Unit - 2 Semiconductor Physics

where Ev – Ea = ( Ionisation energy)

The above expression is the charge carrier concentration for p-type semiconductor.

Variation of Fermi level with temperature and acceptor impurity concentration

At 0K i.e when T = 0K, we can write equation (5) as

The Fermi level increases with increase in temperature as

all the impurity atoms get ionized as temperature increases. At high temperature the material
behave as an intrinsic semiconductor. For an intrinsic semiconductor the Fermi level lies near
the middle of the band gap so the Fermi level increases with temperature.

As the impurity concentration increases the Fermi level decreases as the level for an p-type
material exist near the middle of impurity energy level and valence band.

4. Hall Effect
When a conductor (metal or semiconductor )
carrying a current is placed in a transverse magnetic field,
an electric field is produced inside the conductor in a
direction normal to both the current and the magnetic field.
This phenomenon is known as” Hall Effect” and the
generated voltage is called the “Hall voltage”.
Hall Effect in n-type Semiconductor
Let us consider an n-type material to which the current is
allowed to pass along x-direction from left to right and the
magnetic field is applied in z-direction. As a result Hall
voltage is produced in y direction as shown in figure
Since the direction of current is from left to right the electrons move from right to left
in x-direction as shown in figure.
Now due to the magnetic field applied the electrons move
towards downward direction with the velocity ‘v’ and cause the negative
charge to accumulate at face (1) of the material as shown in figure .
Therefore a potential difference is established between face (2) and face

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 Unit - 2 Semiconductor Physics

(1) of the specimen which gives rise to field EH in the negative y direction.
Here, the Force due to potential difference = -eEH (1)
Force due to magnetic field = -Bev (2)

(or) (3)
We know the current density Jx in the x direction is

Substituting equation (4) in equation (3) we get

(or) (5)
Where is known as the Hall coefficient, given by

The negative sign indicates that the field is developed in the negative y direction.
Hall Coefficient in terms of Hall voltage
If the thickness of the sample is t and the voltage developed is VH then
Hall voltage (6)
Substituting equation (5) in equation (6) we have
(7)
If b is the width of the sample then
Area of the sample, A = bt

Substituting equation (8) in equation (7) we get

Note: The sign for will be opposite for n and p type semiconductors.

Experimental setup for the measurement of Hall voltage

A semiconductor slab of thickness‘t’ and breadth ‘b’ is taken and current is passed
using the battery as shown in figure. The slab is placed between the
pole pieces of an electromagnet so that current direction coincides
with X-axis and magnetic field coincides with Z-axis. The Hall
voltage (VH) is measured by placing two probes at the centre of the
top and bottom faces of the slab (y-axis).If B is the magnetic field
applied and VH is the Hall voltage produced, then the Hall coefficient
can be calculated from the formula

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 Unit - 2 Semiconductor Physics

5. HALL DEVICES
The device which uses the Hall Effect for its application is known as Hall
device. There are three types of Hall devices. They are
(a) Gauss Meter
(b) Electronic Multiplier
(c) Electronic Wattmeter
(a) Gauss Meter
The Hall voltage VH = (RHBzIx) / t. In this, VH α BZ for a given hall element; RH and t are
constant. The current I through Hall element is also kept constant. This principle is used in
Gauss meter. It is used for measuring magnetic field. (Fig.) The variation of Hall voltage with
magnetic field is shown in fig. The voltmeter which is used to measure VH can be directly
calibrated in terms of Gauss. The graph can be also used to measure any unknown magnetic
fields.

(b) Electronic Multipliers

From Hall effect, we have VH = (RHBzIx) / t, since RH and t are constant for an
element
VH BZ I1
But, the magnetic field B is proportional to current through the
coil.
VH I1 I 2
i.e., VH is a measure of the product of two currents. This is
the basic principle used in analog electronic multipliers.
The fig. shows the circuit diagram for electronic multiplier.
( c ) Electronic Wattmeter
Hall effect is used to measure electrical power dissipated in a load. The
instrument used to measure the power in a circuit using Hall effect principle is
known as Hall effect - watt meter. S is Hall Effect sample. It is placed in a magnetic
field BZ produced by the load current IL passing through the coils CC as shown in
figure.
 Unit - 2 Semiconductor Physics

VL- Load voltage IL - Load Current C, C - Coils to set magnetic field B

The voltage across the load V drives the current through the sample. R is a series resistance
which is greater than the resistance of the sample and that of the load. If 't' thickness of the
sample, then the measured Hall voltage

R H BZ I y
VH =
t
VH α ILVL
This is the electric power dissipated by the load.
The voltmeter that measures VH can calibrated to read power directly.

6. Ohmic Contacts
Definition
An ohmic contact is a type of metal semiconductor junction. It is formed by a contact of
a metal with a heavily doped semiconductor. When the semiconductor has a higher work
function than that of metal, then the junction formed is called the ohmic junction.
Working
Before contact, Fermi levels of the metal and semiconductor are at different positions.
At equilibrium, the electrons move from the metal to the empty states in the conduction band
of semiconductor. Thus, there is an accumulation region near the interface. The accumulation
region has a higher conductivity than the bulk semiconductor due to this higher concentration
of electrons. Thus, a ohmic contact behaves as a resistor conducting in both forward and
reverse bias. The resistivity is determined by the bulk resistivity of the semiconductor.
 Unit - 2 Semiconductor Physics

V-I Characteristics
The current is directly proportional to the potential across the junction and
it is symmetric about the origin. Thus, Ohmic contacts are non-rectifying and show negligible
voltage drop and resistance irrespective of the direction and magnitude of current.
Application
The use of ohmic contacts is to connect one semiconductor device to
another, an IC, or to connect and IC to its external terminals.

7. Schottky Diode
Definition
When the metal has a higher work function than that of n-type semiconductor then
the junction is called schottky diode.
The electrons in the conduction level of the semiconductor move to the empty
energy states above the Fermi level of the metal. This leaves a positive charge on the
semiconductor side and a negative charge on the metal side. This leads to a contact potential.
There is a built in potential Vo in the Schottky junction. This is given by the
difference in work functions.
eVo =
Forward-Biased State
Connecting the positive terminal of a battery to the metal and negative terminal to the n-type
semiconductor will create a forward-biased state. In this state, electrons can cross the junction
from n-type to metal if the applied voltage is greater
than 0.2 volts. This results in a flow of current that’s
typical for most diodes.

Reverse-Biased State
Connecting the negative terminal of a diode to the metal and
positive terminal to the n-type semiconductor will create a
reverse-biased state. This state expands the Schottky diode
and prevents the flow of electric current. However, if the
reverse bias voltage continues to increase this can eventually
break down the diode. Doing so will allow current to flow in
the reverse direction and may damage the component.
Advantages of Schottky Diode
Low turn on voltage: The turn on voltage for the diode is
between 0.2 and 0.3 volts. For a silicon diode it is against 0.6
to 0.7 volts from a standard silicon diode.
Fast recovery time: A fast recovery time means a small amount of stored charge that can be
used for high speed switching applications.
 Unit - 2 Semiconductor Physics

Low junction capacitance: It occupies a very small area, after the result obtained from wire
point contact of the silicon. Since the capacitance levels are very small.

8. Tunnel Diode
The phenomenon of penetration of charge carriers directly through the
potential barrier, instead of climbing over it, is called tunneling.
A tunnel diode is a simple p-n junction in which both p and n sides are
very heavily doped with impurities. It is a pn junction which exhibits negative resistance
between two values of forward voltage. It is basically a pn junction with heavy doping of p-
type and n-type semiconductor. This heavy doping gives a large number of majority carriers.
As a result, the depletion layer becomes very narrow.

Working:
Without forward bias, there is a large mismatch between the energy levels of the
electrons and the holes. As the forward voltage is increased, the energy level of the electrons
shifts. At particular voltage Vp, the energy levels of the electrons and the holes coincide.
Now the electrons tunnel through barrier and falls into the holes. The effect of electrons
directly falling into the holes without climbing the potential hill is known as tunneling.
V-I Characteristics
It immediately conducts the diode when forward
biased voltage is applied. The current is increases to its
peak point value (Ip). The diode currents starts
decreasing till it reaches its minimum value called valley
point current (Iv) corresponding to valley voltage (Vv),
when the forward voltage is increases. Current starts
increasing again as in ordinary junction diode, for more
voltage than valley voltage (Vv). The region between
point A and B is called negative resistance region.
Current decreases with increase in applied voltage in
negative resistance region that is tunnel diode possessing
negative resistance region (Rn) in this region. Negative
resistance of negative resistance region produces power instead of absorbing power. The
negative resistance permits oscillations. So tunnel diode used as a very high frequency
oscillator.
Advantages
1) High speed of operation due to the fact that the tunnelling takes place at the speed of light.
2) Low cost Low noise.
3) Environmental immunity.
4)Low power dissipation
Disadvantages
Low output voltage swing. Because it is a two terminal device, there is no isolation between
input and output.
 Unit - 2 Semiconductor Physics

9. Metal Oxide Semiconductor (MOS) – Capacitors.

Structure and principle of operation
The MOS capacitor consists of a substrate with a thin oxide layer and a top metal
contact, referred to as the gate. A second metal layer forms an Ohmic contact to the back of
the semiconductor and is called the bulk contact. The structure shown has a p-type substrate.
We will refer to this as an n-type MOS or nMOS capacitor since the inversion layer
To understand the different bias modes of an MOS capacitor . we now consider three
different bias voltages. One below the flatband voltage, VFB, a second between the flatband
voltage and the threshold voltage, VT, and finally one larger than the threshold voltage.
These bias regimes are called the accumulation, depletion and inversion mode of operation.
These three modes as well as the charge distributions associated with each of them are shown
in figure.

Accumulation occurs typically for

negative voltages where the negative charge on the gate attracts holes from the substrate to
the oxide-semiconductor interface. Depletion occurs for positive voltages. The positive
charge on the gate pushes the mobile holes into the substrate. Therefore, the semiconductor
is depleted of mobile carriers at the interface and a negative charge, due to the ionized
acceptor ions, is left in the space charge region. Inversion occurs at voltages beyond the
threshold voltage. In inversion, there exists a negatively charged inversion layer at the
oxide-semiconductor interface in addition to the depletion-layer.
The energy band diagram of an n-MOS capacitor biased in inversion is shown in
Figure. The oxide is modeled as a semiconductor with a very large bandgap and blocks any
flow of carriers between the semiconductor and the gate metal. The band bending in the
semiconductor is consistent with the presence of a depletion layer. At the semiconductor-
oxide interface, the Fermi energy is close to the conduction band edge as expected when a
high density of electrons is present
Advantages
It is smaller in size and it is inbuilt in IC’s
 Unit - 2 Semiconductor Physics

10. Voltage Regulator?

A voltage regulator is a device that regulates the voltage level. It essentially steps down the
input voltage to the desired level and keeps it at that same level during the supply. This
ensures that even when a load is applied the voltage doesn’t drop. The voltage regulator is
used for two main reasons, and they are:

 To vary or regulate the output voltage

 To keep the output voltage constant at the desired value in spite of variations in the
supply voltage.
Voltage regulators are used in computers, power generators, alternators to control the output
of the plant.

Zener Diode as a Voltage Regulator

There is a series resistor connected to the circuit in order to limit the current into the diode. It
is connected to the positive terminal of the d.c. It works in such a way the reverse-biased can
also work in breakdown conditions. We do not use ordinary junction diode because the low
power rating diode can get damaged when we apply reverse bias above its breakdown
voltage. When the minimum input voltage and the maximum load current is applied, the
Zener diode current should always be minimum.
Since the input voltage and the required output voltage is known, it is easier to choose a
Zener diode with a voltage approximately equal to the load voltage, i.e. VZ = VL.
Following is the link explaining the difference between Zener breakdown and Avalanche
breakdown:
The circuit diagram of a voltage regulator using a Zener diode is shown:

The value of the series resistor is written as RS = (VL − VZ)IL

Current through the diode increases when the voltage across the diode tends to increase
which results in the voltage drop across the resistor. Similarly, the current through the diode
decreases when the voltage across the diode tends to decrease. Here, the voltage drop across
the resistor is very less, and the output voltage results normally.