PROFET® BTS612N1

Smart Two Channel Highside Power Switch

Features
• Overload protection Product Summary
• Current limitation
Overvoltage protection Vbb(AZ) 43 V
• Short circuit protection
• Thermal shutdown Operating voltage Vbb(on) 5.0 ... 34 V
• Overvoltage protection (including load dump) channels: each parallel
both
• Fast demagnetization of inductive loads
• Reverse battery protection1) On-state resistance RON 200 100 mΩ
• Undervoltage and overvoltage shutdown with Load current (ISO) IL(ISO) 2.3 4.4 A
auto-restart and hysteresis Current limitation IL(SCr) 4 4 A
• Open drain diagnostic output
• Open load detection in OFF-state
• CMOS compatible input TO-220AB/7
• Loss of ground and loss of Vbb protection
• Electrostatic discharge (ESD) protection
7 7
7
1 1
Application Straight leads 1

• µC compatible power switch with diagnostic Standard SMD

feedback for 12 V and 24 V DC grounded loads

• All types of resistive, inductive and capacitve loads
• Replaces electromechanical relays, fuses and discrete circuits

General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic

feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions.

+ V bb
4
Voltage Overvoltage Current Gate 1
source protection limit 1 protection
V Logic
OUT1
Voltage Level shifter Limit for
unclamped 1
sensor Rectifier 1 Temperature
ind. loads 1
sensor 1
3 IN1
Charge Open load
6 IN2 pump 1 Short to Vbb
ESD Logic
detection 1
5 Charge Gate 2
ST Current
pump 2 limit 2 protection

Level shifter OUT2

Limit for
Rectifier 2 unclamped 7
ind. loads 2 Temperature Load
sensor 2
Open load
Short to Vbb
 GND
detection 2
PROFET
2 Signal GND
Load GND

1) With external current limit (e.g. resistor RGND=150 Ω) in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.
Semiconductor Group 1 of 15 2003-Oct-01
 BTS612N1

Pin Symbol Function

1 OUT1 (Load, L) Output 1, protected high-side power output of channel 1
2 GND Logic ground
3 IN1 Input 1, activates channel 1 in case of logical high signal
4 Vbb Positive power supply voltage,
the tab is shorted to this pin
5 ST Diagnostic feedback: open drain, low on failure
6 IN2 Input 2, activates channel 2 in case of logical high signal
7 OUT2 (Load, L) Output 2, protected high-side power output of channel 2

Maximum Ratings at Tj = 25 °C unless otherwise specified

Parameter Symbol Values Unit
Supply voltage (overvoltage protection see page 4) Vbb 43 V
Supply voltage for full short circuit protection Vbb 34 V
Tj Start=-40 ...+150°C
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V VLoad dump4) 60 V
RI3)= 2 Ω, RL= 5.3 Ω, td= 200 ms, IN= low or high
Load current (Short circuit current, see page 5) IL self-limited A
Operating temperature range Tj -40 ...+150 °C
Storage temperature range Tstg -55 ...+150
Power dissipation (DC), TC ≤ 25 °C Ptot 36 W
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.
one channel, IL = 2.3 A, ZL = 89 mH, 0 Ω: EAS 290 mJ
both channels parallel, IL = 4.4 A, ZL = 47 mH, 0 Ω: 580
see diagrams on page 9
Electrostatic discharge capability (ESD) IN: VESD 1.0 kV
(Human Body Model) all other pins: 2.0
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
Input voltage (DC) VIN -10 ... +16 V
Current through input pin (DC) IIN ±2.0 mA
Current through status pin (DC) IST ±5.0
see internal circuit diagrams page 7

2) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the
protection of the input is integrated.
3) RI = internal resistance of the load dump test pulse generator
4) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Semiconductor Group 2 2003-Oct-01
 BTS612N1

Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ max
Thermal resistance chip - case, both channels: RthJC -- -- 3.5 K/W
each channel: -- -- 7.0
junction - ambient (free air): RthJA -- -- 75
SMD version, device on PCB5): 37

Electrical Characteristics
Parameter and Conditions, each channel Symbol Values Unit
at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max

Load Switching Capabilities and Characteristics

On-state resistance (pin 4 to 1 or 7)
IL = 1.8 A Tj=25 °C: RON -- 160 200 mΩ
each channel Tj=150 °C: 320 400
Nominal load current, ISO Norm (pin 4 to 1 or 7) 1.8 2.3
VON = 0.5 V, TC = 85 °C each channel: IL(ISO) 3.5 4.4 -- A
both channels parallel: --
Output current (pin 1 or 7) while GND disconnected IL(GNDhigh) -- -- 10 mA
or GND pulled up, Vbb=30 V, VIN= 0, see diagram
page 8
Turn-on time IN to 90% VOUT: ton 80 200 400 µs
Turn-off time IN to 10% VOUT: toff 80 200 400
RL = 12 Ω, Tj =-40...+150°C
Slew rate on dV /dton 0.1 -- 1 V/µs
10 to 30% VOUT, RL = 12 Ω, Tj =-40...+150°C
Slew rate off -dV/dtoff 0.1 -- 1 V/µs
70 to 40% VOUT, RL = 12 Ω, Tj =-40...+150°C

5) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.

Semiconductor Group 3 2003-Oct-01

 BTS612N1
Parameter and Conditions, each channel Symbol Values Unit
at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max

Operating Parameters
Operating voltage6) Tj =-40...+150°C: Vbb(on) 5.0 -- 34 V
Undervoltage shutdown Tj =-40...+150°C: Vbb(under) 3.5 -- 5.0 V
Undervoltage restart Tj =-40...+25°C: Vbb(u rst) -- -- 5.0 V
Tj =+150°C: 7.0
Undervoltage restart of charge pump Vbb(ucp) -- 5.6 7.0 V
see diagram page 12
Undervoltage hysteresis ∆Vbb(under) -- 0.2 -- V
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Overvoltage shutdown Tj =-40...+150°C: Vbb(over) 34 -- 43 V
Overvoltage restart Tj =-40...+150°C: Vbb(o rst) 33 -- -- V
Overvoltage hysteresis Tj =-40...+150°C: ∆Vbb(over) -- 0.5 -- V
Overvoltage protection7) Tj =-40...+150°C: Vbb(AZ) 42 47 -- V
Ibb=40 mA
Standby current (pin 4), Ibb(off) µA
VIN=0 Tj=-40...+150°C: -- 90 150
8)
Operating current (Pin 2) , VIN=5 V IGND -- 0.6 1.2 mA
both channels on, Tj =-40...+150°C,
Operating current (Pin 2)8) IGND -- 0.4 0.7 mA
one channel on, Tj =-40...+150°C:,

6) At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V
7) See also VON(CL) in table of protection functions and circuit diagram page 8.
8) Add IST, if IST > 0, add IIN, if VIN>5.5 V

Semiconductor Group 4 2003-Oct-01

 BTS612N1
Parameter and Conditions, each channel Symbol Values Unit
at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max
Protection Functions9)
Initial peak short circuit current limit (pin 4 to 1 IL(SCp)
or 7)
Tj =-40°C: 5.5 9.5 13 A
Tj =25°C: 4.5 7.5 11
Tj =+150°C: 2.5 4.5 7
Repetitive short circuit shutdown current limit IL(SCr)
Tj = Tjt (see timing diagrams, page 11) -- 4 -- A
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL) IL= 40 mA: VON(CL) 41 47 53 V
Thermal overload trip temperature Tjt 150 -- -- °C
Thermal hysteresis ∆Tjt -- 10 -- K
Reverse battery (pin 4 to 2) 10) -Vbb -- -- 32 V
Reverse battery voltage drop (Vout > Vbb)
IL = -1.9 A, each channel Tj=150 °C: -VON(rev) -- 610 -- mV

Diagnostic Characteristics
Open load detection current IL(off) -- 30 -- µA
(included in standby current Ibb(off))
Open load detection voltage Tj=-40..150°C: VOUT(OL) 2 3 4 V

9) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
10) Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 8).

Semiconductor Group 5 2003-Oct-01

 BTS612N1
Parameter and Conditions, each channel Symbol Values Unit
at Tj = 25 °C, Vbb = 12 V unless otherwise specified min typ max

Input and Status Feedback11)

Input resistance RI 2.5 3.5 6 kΩ
Tj=-40..150°C, see circuit page 7
Input turn-on threshold voltage Tj =-40..+150 VIN(T+) 1.7 -- 3.5 V
Input turn-off threshold voltage Tj =-40..+150° VIN(T-) 1.5 -- -- V
Input threshold hysteresis ∆ VIN(T) -- 0.5 -- V
Off state input current (pin 3 or 6), VIN = 0.4 V, IIN(off) 1 -- 50 µA
Tj =-40..+150°C
On state input current (pin 3 or 6), VIN = 3.5 V, IIN(on) 20 50 90 µA
Tj =-40..+150°C
Delay time for status with open load td(ST OL3) -- 220 -- µs
after Input neg. slope (see diagram page 12)
Status output (open drain)
Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: VST(high) 5.4 6.1 -- V
ST low voltage Tj =-40...+25°C, IST = +1.6 mA: VST(low) -- -- 0.4
Tj = +150°C, IST = +1.6 mA: -- -- 0.6

11) If a ground resistor RGND is used, add the voltage drop across this resistor.

Semiconductor Group 6 2003-Oct-01

 BTS612N1

Truth Table
IN1 IN2 OUT1 OUT2 ST ST
BTS611L1 BTS612N1
Normal operation L L L L H H
L H L H H H
H L H L H H
H H H H H H
Open load Channel 1 L L Z L H(L12)) L
L H Z H H H
H X H X L H
Channel 2 L L L Z H(L12)) L
H L H Z H H
X H X H L H
Short circuit to Vbb Channel 1 L L H L L13) L
L H H H H H
H X H X H
H(L14))
Channel 2 L L L H L13) L
H L H H H H
X H X H H(L14)) H
Overtemperature both channel L L L L H H
X H L L L L
H X L L L L
Channel 1 L X L X H H
H X L X L L
Channel 2 X L X L H H
X H X L L L
Undervoltage/ Overvoltage X X L L H H
L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit
H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 12)

Terms Input circuit (ESD protection)

Ibb VON1 R
V 4 I
bb I IN1
V
ON2 IN
3 Vbb
IN1 I L1
1
I IN2 OUT1
PROFET ESD-ZD I
6
IN2 I L2 I
I
I ST OUT2
7
V V ST GND
IN1 IN2 V 5 V GND
ST OUT1
2
I V OUT2
R GND
GND
ESD zener diodes are not to be used as voltage clamp
at DC conditions. Operation in this mode may result in
a drift of the zener voltage (increase of up to 1 V).

12) With additional external pull up resistor

13) An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
14) Low resistance to V may be detected in the ON-state by the no-load-detection
bb

Semiconductor Group 7 2003-Oct-01

 BTS612N1
Status output
Open-load detection
+5V
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low

R ST(ON)
ST

ESD-
ZD OFF
GND
I
L(OL)
ESD-Zener diode: 6.1 V typ., max 5 mA;
RST(ON) < 380 Ω at 1.6 mA, ESD zener diodes are not
Logic Open load
to be used as voltage clamp at DC conditions. detection V
unit OUT
Operation in this mode may result in a drift of the zener
voltage (increase of up to 1 V).
Signal GND

Inductive and overvoltage output clamp

GND disconnect
+ V bb

V Ibb
Z
V 4
bb
3 Vbb
VON IN1
1
OUT1
IN2 PROFET
6
OUT OUT2
7
ST GND
GND PROFET 5
2
V V V V
IN1 IN2 ST GND
VON clamped to 47 V typ.
Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+) .
Due to VGND >0, no VST = low signal available.
Overvolt. and reverse batt. protection
+ V bb GND disconnect with GND pull up
V 4
RI Z2
IN1
3 Vbb
IN2 IN1
1
Logic V OUT1
IN1
ST IN2 PROFET
R ST 6
V OUT2
IN2 7
V ST GND
Z1 5
2
GND

R GND
V V
V ST GND
Signal GND bb

VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI= 3.5 kΩ typ, Any kind of load. If VGND > VIN - VIN(T+) device stays off
RGND= 150 Ω Due to VGND >0, no VST = low signal available.

Semiconductor Group 8 2003-Oct-01

 BTS612N1
with an approximate solution for RL > 0 Ω:
Vbb disconnect with energized inductive IL· L IL·RL
load EAS= ·(V + |VOUT(CL)|)· ln (1+ )
2·RL bb |VOUT(CL)|

4
Maximum allowable load inductance for
Vbb
a single switch off (both channels parallel)
3
IN1 1 L = f (IL ); Tj,start = 150°C,TC = 150°C const.,
OUT1
high Vbb = 12 V, RL = 0 Ω
IN2 PROFET
6
OUT2 L [mH]
7
ST GND 1000
5
2

V
bb

Normal load current can be handled by the PROFET

itself. 100

Vbb disconnect with charged external

inductive load

3 Vbb
IN1
1 10
OUT1
high
IN2 PROFET
6 D
OUT2
7
ST GND
5
2

V 1
bb
2 3 4 5 6 7 8
If other external inductive loads L are connected to the PROFET, IL [A]
additional elements like D are necessary.

Inductive Load switch-off energy

dissipation
E bb

E AS

ELoad
Vbb
IN

PROFET OUT
= ST EL
GND L

ZL { RL ER

Energy stored in load inductance:

2
EL = 1/2·L·I L
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)·iL(t) dt,

Semiconductor Group 9 2003-Oct-01

 BTS612N1

Typ. transient thermal impedance chip case

ZthJC = f(tp), one Channel active
ZthJC [K/W]
10

D=
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0

0.01
1E-5 1E-4 1E-3 1E-2 1E-1 1E0 1E1

tp [s]

Transient thermal impedance chip case

ZthJC = f(tp), both Channel active
ZthJC [K/W]
10

D=
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0

0.01
1E-5 1E-4 1E-3 1E-2 1E-1 1E0 1E1

tp [s]

Semiconductor Group 10 2003-Oct-01

 BTS612N1

Timing diagrams Both channels are symmetric and consequently the diagrams
are valid for each channel as well as for permuted channels

Figure 1a: Vbb turn on: Figure 2b: Switching an inductive load

IN1

IN2 IN

V bb
ST

V
OUT1
V
OUT

V
OUT2

I
L
ST open drain
t
t

Figure 2a: Switching a lamp:

Figure 3a: Short circuit
shut down by overtempertature, reset by cooling
IN

IN other channel: normal operation

ST

IL
V
OUT
I L(SCp)
I L(SCr)

I
L

t
ST
t

Semiconductor Group 11 2003-Oct-01

 BTS612N1
Heating up may require several milliseconds, depending on td(ST,OL3) depends on external circuitry because of high
external conditions impedance
*) IL = 30 µA typ

Figure 4a: Overtemperature:

Reset if Tj <Tjt Figure 6a: Undervoltage:

IN
IN

V bb
ST
V Vbb(u cp)
bb(under)
V
bb(u rst)

V
OUT

V OUT

T
J
ST open drain

t t

Figure 6b: Undervoltage restart of charge pump

Figure 5a: Open load: detection in OFF-state, turn
on/off to open load VON(CL)
V on

IN1

IN2 channel 2: normal operation

off-state

on-state

off-state

VOUT1 V
bb(over)

V V
bb(u rst) bb(o rst)
IL1
V
channel 1: open load bb(u cp)
V
bb(under)
t V bb
d(ST OL3) t d(ST OL3)
ST
charge pump starts at Vbb(ucp) =5.6 V typ.
t

Semiconductor Group 12 2003-Oct-01

 BTS612N1

Figure 7a: Overvoltage:

IN

Vbb V ON(CL) Vbb(over) V bb(o rst)

V
OUT

ST

Semiconductor Group 13 2003-Oct-01

 BTS612N1
Package and Ordering Code SMD TO 220AB/7, Opt. E3128 Ordering code
All dimensions in mm BTS612N1 E3128A T&R: Q67060-S6303-A4

Standard TO-220AB/7 Ordering code

BTS612N1 Q67060-S6303-A2

Changed since 04.96

Date Change
Dec td(ST OL4) max reduced from 1500
1996 to 800µs, typical from 400 to
TO 220AB/7, Opt. E3230 Ordering code 320µs, min limit unchanged
BTS612N1 E3230 Q67060-S6303-A3 EAS maximum rating and diagram
and ZthJC diagram added
ESD capability increased
Typ. reverse battery voltage drop -
VON(rev) added

Semiconductor Group 14 2003-Oct-01

 BTS612N1
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.

Attention please!
The information herein is given to describe certain
components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not
limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.

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For further information on technology, delivery terms and
conditions and prices please contact your nearest Infineon
Technologies Office in Germany or our Infineon
Technologies Representatives worldwide (see address list).

Warnings
Due to technical requirements components may contain
dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies
Office.
Infineon Technologies Components may only be used in life-
support devices or systems with the express written
approval of Infineon Technologies, if a failure of such
components can reasonably be expected to cause the
failure of that life-support device or system, or to affect the
safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to
assume that the health of the user or other persons may be
endangered.

Semiconductor Group 15 2003-Oct-01