Lms 1585 A
Lms 1585 A
Lms 1585 A
1FEATURES DESCRIPTION
• Fast Transient Response
234
The LMS1585A and LMS1587 are low dropout
positive regulators with output load current of 5A and
• Available in Adjustable, 1.5V, and 3.3V 3A respectively. Their low dropout voltage (1.2V) and
versions fast transient response make them an excellent
• Current Limiting and Thermal Protection solution for low voltage microprocessor applications.
• Commercial Temp. Tange: 0°C to 125°C The LMS1585A/87 are available in adjustable
• Industrial Temp. Range: −40°C to 125°C versions, which can set the output voltage with only
• Line Regulation 0.005% (typical) two external resistors. In addition, they are also
available in 1.5V and 3.3V fixed voltage versions (1).
• Load Regulation 0.05% (typical)
• Direct Replacement for LT® 1585A/87 The LMS1585A/87 circuits include a zener trimmed
bandgap reference, current limiting and thermal
shutdown. The LMS1585A/87 series are available in
APPLICATIONS KTT (TO-263) and NDE (TO-220) packages.
• Pentium® processor supplies
• PowerPC® supplies
• Other microprocessor supplies
• Low voltage logic supplies (1) Consult factory for other fixed voltage options.
Typical Application
3.3V
VIN 4.75V LMS1585A/87-3.3
3A, 5A
+ C1 + C2*
10 µF 10 µF
INPUT INPUT
VOUT
Tab is
OUTPUT OUTPUT
VOUT
ADJ/GND
ADJ/GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 PowerPC is a registered trademark of IBM.
3 Pentium is a registered trademark of Intel Corporation.
4 LT is a registered trademark of Linear Technology.
PRODUCTION DATA information is current as of publication date. Copyright © 2003–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LMS1585A , LMS1587
SNVS061G – MONTH 2003 – REVISED JULY 2013 www.ti.com
VIN
Thermal
Limit
VOUT
Substrate
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) The maximum power dissipation is a function of TJ(max) , θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max)–T A)/θJA. All numbers apply for packages soldered directly into a PC board.
(4) For testing purposes, ESD was applied using human body model, 1.5 kΩ in series with 100 pF.
ELECTRICAL CHARACTERISTICS
Typicals and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in Boldface type apply over the entire
junction temperature range for operation, 0˚C to 125˚C for commercial grade and −40˚C to 125˚C for industrial grade.
Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units
VREF Reference Voltage LMS1585A-ADJ
VIN−VOUT = 3V, IOUT = 10mA 1.238 1.250 1.262 V
10mA ≤ IOUT ≤ 5A, 1.5V ≤ VIN− VOUT ≤ 5.75V 1.225 1.250 1.275 V
LMS1587-ADJ
10mA ≤ IOUT ≤ 3A, 1.5V ≤ VIN−VOUT ≤ 5.75V 1.225 1.250 1.275 V
VOUT Output Voltage LMS1585A-1.5
IOUT = 0mA, VIN = 5V 1.485 1.500 1.515 V
0 ≤ IOUT ≤ 5A, 3V ≤ VIN ≤ 7V 1.470 1.530 V
LMS1585A-3.3
I OUT = 0mA, V IN = 5V 3.267 3.300 3.333 V
0 ≤ I OUT ≤ 5A, 4.75V ≤ V IN ≤ 7V 3.235 3.300 3.365 V
LMS1587-1.5
V IN = 5V, I OUT = 0mA, TJ = 25˚C 1.485 1.500 1.515 V
0≤ I OUT ≤ 3A, 3V ≤ VIN ≤ 7V 1.470 1.500 1.530 V
LMS1587-3.3
0 ≤ I OUT ≤ 3A, 4.75V ≤ VIN ≤ 7V 3.235 3.300 3.365 V
(3)
∆VOUT Line Regulation LMS1585A/87-ADJ
IOUT = 10mA, 2.75V ≤ V IN ≤ 7V 0.005 0.2 %
LMS1585A/87-3.3
I OUT = 0mA, 4.75V ≤ VIN ≤ 7V 0.005 0.2 %
LMS1585A/87-1.5
I OUT = 0mA, 3V ≤ VIN ≤ 7V 0.005 0.2 %
∆VOUT Load Regulation (3) LMS1585A-ADJ 0.3 %
VIN−VOUT = 3V, 10mA ≤ IOUT ≤ 5A 0.05 0.5
LMS1585A-1.5/LMS1585A-3.3 0.05 0.3 %
VIN = 5V, 0 ≤ IOUT ≤ 5A 0.05 0.5
LMS1587-ADJ 0.05 0.3
VIN−VOUT = 3V, 10mA ≤ IOUT ≤ 3A 0.05 0.5 %
LMS1587-1.5/LMS1587-3.3 0.05 0.3 %
VIN = 5V, 0 ≤ IOUT ≤ 3A 0.05 0.5 %
VIN−VOUT Dropout Voltage LMS1585A-ADJ/LMS1587-ADJ
∆VREF = 1%, IOUT = 3A 1.15 1.3 V
LMS1585A-3.3/LMS1587-3.3/
LMS1585A-1.5/LMS1587-1.5
∆VOUT = 1%, IOUT = 3A 1.15 1.3 V
LMS1585A-ADJ
∆VREF = 1%, IOUT = 5A 1.2 1.4 V
LMS1585A-1.5/LMS1585A-3.3
∆VOUT = 1%, IOUT = 5A 1.2 1.4 V
APPLICATION NOTE
OUTPUT VOLTAGE
The adjustable version develops at 1.25V reference voltage, (VREF), between the output and the adjust terminal.
As shown in Figure 3, this voltage is applied across resistor R1 to generate a constant current I1. This constant
current then flows through R2. The resulting voltage drop across R2 adds to the reference voltage to sets the
desired output voltage.
The current IADJ from the adjustment terminal introduces an output error. But since it is small (120μA max), it
becomes negligible when R1 is in the 100Ω range.
For fixed voltage devices, R1 and R2 are integrated inside the devices.
VOUT = VREF (1 + R2
R2) + IADJR2
R1
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PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 21-Sep-2023
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
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B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Sprocket Holes
Q1 Q2 Q1 Q2
Pocket Quadrants
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
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Width (mm)
H
W
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
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TUBE
T - Tube
height L - Tube length
W - Tube
width
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
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Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
LMS1587IS-ADJ/NOPB KTT TO-263 3 45 502 25 8204.2 9.19
LMS1587IT-1.5/NOPB NDE TO-220 3 45 502 33 6985 4.06
Pack Materials-Page 4
MECHANICAL DATA
NDE0003B
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MECHANICAL DATA
KTT0003B
TS3B (Rev F)
BOTTOM SIDE OF PACKAGE
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