Programme B.E.

BIOMEDICAL ENGINEERING Semester 5

Subject Name BM3402 ANALOG AND DIGITAL INTEGRATED CIRCUITS
Question Bank

UNIT - I PART – A
1. Define virtual short.
2. What is differential amplifier?
3. Define slew rate.
4. List the important characteristics of an ideal Op - Amp.
5. Define CMRR of an Op - Amp.
6. Differentiate Average & peak detector.
7. Mention some of the linear and non linear applications of Op - Amp.
8. Draw the integrator circuit using Op - Amp.
9. Define precision diode.
10. What is hysteresis?
11. Draw the circuit diagram of Astable vibrator.
12. What is meant by filters? What are the types?
13. Define PSRR of an Op - Amp.
14. Write down the applications of precision diode.
15. What is Peak detector?
16. Draw the circuit diagram of triangular generator.
17. Write short notes on Schmitt trigger and List out the applications.
18. What are the limitations of integrated circuits?
19. Draw the Op – Amp symbol and state its important terminals.
20. State the advantages of voltage follower.
21. When inverting amplifier is called phase inverter?
22. Draw the circuit diagram of subtractor.
23. List the applications of differentiator circuit.
24. State the applications of V to I converter and I to V converter.
25. Draw the circuit diagram of full wave rectifier using Op - Amp.
26. List out the applications of an instrumentation amplifier and what are the requirements of instrumentation
amplifier?
27. State the applications of monostable multivibrator.
28. What is clamper circuit? How clamper circuits are classified?
29. List the applications of Log amplifiers.
UNIT - I PART – B
1. Draw the circuit of inverting and non – inverting amplifiers using Op – Amp and Derive an expression
for their gain. (12 Marks)
2. Explain integrator and differentiator with a neat diagram. (12 Marks)
3. i) What is virtual ground? Explain with a neat circuit diagram. (7 Marks)
ii) Explain briefly about ideal differential amplifier. (5 Marks)
 4. i) Draw the block schematic of an Op – Amp and briefly explain each block. (6 Marks)
ii) What are the Advantages and Disadvantages of Op - Amp? (4 Marks)
iii) List the Applications and Features of Op - Amp. (2 Marks)
5. Explain Astable & Monostable multivibrator using Op - Amp with a neat diagram. (12 Marks)
6. Briefly explain triangular wave generators with a neat circuit diagram. (12 Marks)
7. Explain in detail about V to I converter and I to V converter. (12 Marks)
8. Explain about instrumentation amplifier with a neat sketch. (12 Marks)
9. Explain briefly about summing inverting and Non – inverting amplifier. (12 Marks)
10. i) Write short notes on adder, subtractor, and bridge amplifier. (6 Marks)
ii) Write short notes on half wave rectifier. (2 Marks)
iii) Explain the peak detector circuit using integrator. (4 Marks)
UNIT – II PART – A
1. Define phase comparator.
2. Define lock in range.
3. Define capture range.
4. List out the typical applications of Phase Locked Loop.
5. Define voltage controlled oscillator.
6. What is monotonicity?
7. Draw the blocks of PLL.
8. Write the operation of Voltage to Frequency ADC.
9. Define counter ramp ADC.
10. What is pull- in time?
11. Define resolution of DAC.
12. State advantage of R- 2R ladder type DAC.
13. Which is the fastest ADC and why?
14. List out the advantages of DAC.
15. Define amplitude modulation.
16. List out the disadvantages of ADC.
17. Give the specification of DAC.
18. What are the different types of ADC?
19. What is linear error?
20. Define settling time.
21. What are the stages through which PLL operates?
22. Where is the successive approximation type ADC used?
23. Listout the advantage and draw backs of dual slop ADC.
24. Write the two problems associated with DM.
25. Define Voltage to Frequency conversion factor.
UNIT – II PART – B
1. i) Draw and explain the working principle of op-amp based voltage controlled oscillator circuit.(7 Marks)
ii) Derive the expression for capture range of PLL. (5 Marks)
2. i) Derive the expression for lock range of PLL. (5 Marks)
ii) Explain AM demodulation using PLL. (7 Marks)
3. i) Draw and explain frequency translator using PLL. (8 Marks)
ii) What are the applications of PLL (4 Marks)
4. i) Briefly explain block diagram of PLL. IC 565 (6 Marks)
ii) Write short notes on frequency multiplication (6 Marks)
5. i) Explain in detail about successive approximation DAC. (8 Marks)
ii) Give some application of AM detection. (4 Marks)
6. i) Explain in detail about phase comparator. (8 Marks)
ii) What is meant by counters and give example? (4 Marks)
7. i) Explain in detail about V to F & counter ramp ADC. (8 Marks)
ii) Mention some applications of parallel ADC. (4 Marks)
8. Explain the operation of D/A converter and give some of the Advantages and Disadvantages
(12 Marks)
UNIT – III PART – A
1. Define radix.
2. What are the number systems?
3. Define the following: minterm and maxterm.
4. What is meant by prime implicant?
5. Convert the given binary (1101010110)10 into gray code.
6. Distinguish between 1’s and 2’s complements.
7. Define the terms disjunction and conjunction.
8. What are the logic gates?
9. Define SOP and POS.
10. What do you meant by LSB and MSB?
11. How will you find 2’s complement of a binary number?
12. What are the alphanumeric codes?
13. Convert the given gray code (1011011101) into binary code.
14. Define karnaugh maps.
15. Write the truth table of AND, OR and NAND gates.
16. What is meant by excess 3 decimal numbers?
17. Define the law of Boolean algebra.
18. What is meant by universal gates?
19. What is Multivariable Theorem?
20. Convert (25)10 to binary.
21. What are the types of karnaugh map?
22. Write the truth table of X-OR and X-NOR.
23. Distinguish between Boolean addition and Binary addition.
24. What is meant by multilevel gates networks?
25. What are the drawbacks of K –map method?
26. State De Morgan’s law.
27. What is the number of bits in ASCII code? What is the need for ASCII code?
28. Simplify : A  AB  A  B
 UNIT – III PART – B
1. i) Reduce the following function using k-map technique
f ( A, B, C, D)   m(0,1, 4,8,9,10) (6 Marks)
ii) What are the methods for converting Decimal to Binary conversion?
Give some examples. (6 Marks)
2. i) Minimise the following expression in the POS form
f ( A, B, C, D)   M (0, 2,3,8,9,12,13,15) (6 Marks)
ii) Explain De Morgan’s theorem and the duality principle with proof. (6 Marks)
3. i) Minimize the Boolean expression: AB  ABC  ABC  ABC (6 Marks)
ii) Convert the given expression in to standard SOP.
f ( A, B, C)  AC  AB  BC  AC (6 Marks)
4. i) Convert the following (37)10 to equivalent hexadecimal (2 Marks)
ii) Convert the following (25B) 16, (5A9.B4)16 to octal and binary. (4 Marks)
iii) Perform (4)10 - (9)10 using the 2’s complement method. (3 Marks)
iv) Subtract (9)10 - (4)10 using 1’s complement method. (3 Marks)
5. Find the following i) (CB9.F5)16 + (AB8.CD)16. (3 Marks)
ii) (9E4A)16 – (5FD6)16 (3 Marks)
iii) (E75)16 * (2A)16 (3 Marks)
iv) (745)8 - (263)8 (3 Marks)
6. Subtract the following using 2’s complement.
(i) 11101010 & 11010101 (3 Marks)
(ii) 10101010 & 11010100 (3 Marks)
(iii) 01011101 & 11001010 (3 Marks)
(iv) 10010101 & 11100010 (3 Marks)
7. i) Convert 10101011 into its equivalent Decimal, Octal, Hexadecimal. (6 Marks)
ii) What the two method for Simplification of Boolean Functions (6 Marks)
8. i) Obtain the octal equivalent of (3964)10 . (3 Marks)
ii) Convert octal number (1654)8 into decimal system. (3 Marks)
iii) Convert (634.640625)10 to the octal system. (3 Marks)
iv) Convert (17.35)10 to binary form. (3 Marks)
9. Minimize the expression using Quine McCluskey method.
Y  ABCD  ABCD  ABCD  ABCD  ABCD  ABCD
10. i) Reduce the following function using Karnaugh map technique.
f ( A, B, C, D)   m(5,6,7,12,13)   d (4,9,14,15) (6 Marks)
ii) Reduce the following function using Karnaugh map technique.
f ( A, B, C, D)   M (0,3, 4,7,8,10,12,14)  d (2,6) (6 Marks)

UNIT – IV PART – A
1. Define half adder.
2. What do you meant by Encoder?
3. List out the basic types of PLD.
4. Define full adder.
 5. What is PLA? How its differ from ROM?
6. Define half subtractor.
7. What is meant by decoder?
8. Differentiate sum and carry.
9. What is meant by a full subtractor? Draw a full subtractor circuit.
10. Draw the logic diagram of half – adder.
11. Write a design procedure of combinational circuits.
12. Differentiate decoder and encoder.
13. What is the similar between a half adder and a half subtractor?
14. What do you meant by Comparator?
15. Define Multiplier.
16. What is meant by multiple bit adders?
17. Write short notes on ROM.
18. Define propagation delay.
19. What is PAL? How it differs from ROM and PLA?
20. What is meant by Combinational circuits?
21. Draw the logic diagram of BCD to Excess 3 code converter
22. Write the truth table of Full – adder
23. What is meant by binary decoder?
24. What are the difference between decoder and demultiplexer?
25. Write short notes on priority encoder.
UNIT – IV PART – B
1. i) Design of half adder and full adder using gates. (8 Marks)
ii) Design the logic circuit for odd parity checker. (4 Marks)
2. i) Design of half subtractor & full subtractor using gates. (8 Marks)
ii) List out the design procedure of a combinational circuit. (4 Marks)
3. i) Design a 3 to 8 Decoder using gates. (8 Marks)
ii) Draw the logic diagram of BCD to Excess 3 – code converter. (4 Marks)
4. i) Explain the various types of ROM. (4 Marks)
ii) Implement the following Boolean function using ROM.
F1 ( A1 , A0 )   m(1, 2) and F2 ( A1 , A0 )   m(0,1,3) (8 Marks)
5. i) Explain in detail about parallel binary adder with neat block diagram. (6 Marks)
ii) Give the comparison between PROM, PLA and PAL. (6 Marks)
6. Explain details about the design procedure of circuit 4 - bit multiplier with example. (12 Marks)
7. i) Design a BCD to 7-Segment display decoder. (6 Marks)
ii) Design a priority encoder. (6 Marks)
8. How will you build a full adder using two half adders and an OR gate? Explain briefly. (12 Marks)
9. Draw and explain the block diagram of n - bit parallel and binary adder subtractor. (12 Marks)
10. i) Draw and explain the block diagram of PLA. (4 Marks)
ii) Implement the following Boolean function using PLA.
A( x, y, z)   m(1, 2, 4,6) , B( x, y, z)   m(0,1,6,7) & C ( x, y, z)   m(2,6) (8 Marks)
 UNIT – V PART – A

1. What is sequential circuit?

2. Define flip-flop.
3. What is shift registers?
4. List out the various types of flip-flop.
5. Define metastability.
6. Write the specifications of shift register IC’s
7. List the function of asynchronous inputs.
8. What is meant by trigger?
9. Derive the characteristic equation of T flip flop.
10. What is universal shift register?
11. Draw a block diagram of sequential circuit.
12. Derive the characteristic equation of SR flip flop.
13. Write the specifications of counter IC’s.
14. Define a register and shift register.
15. Write down the 74194 IC specifications.
16. What are the applications of flip-flop?
17. What is meant by synchronous circuit?
18. Define clock period.
19. What is meant by state table?
20. Draw a logic diagram of counters.
21. What is meant by state diagram?
22. Draw the state diagram of JK flip flop.
23. What is meant by asynchronous circuit?
24. Derive the characteristic equation of JK flip flop
25. What are the bistable elements?
UNIT – V PART – B
1. i) Distinguish between combinational and sequential logic circuits. (6 Marks)
ii) What is race around condition? How it’s avoided? (6 Marks)
2. Explain in detail SR & D flip-flop with neat circuit diagram (12 Marks)
3. Explain synchronous decade counter using JK flip-flop with block diagram in detail. (12 Marks)
4. i) Distinguish between synchronous and asynchronous sequential circuits. (6 Marks)
ii) Comparison between synchronous and asynchronous counters. (6 Marks)
5. Explain in detail JK & T flip-flop with neat circuit diagram (12 Marks)
6. i) Briefly explain about Ring counter with neat block diagram. (8 Marks)
ii) Write a short notes on State tables and State diagram (4 Marks)
7. Explain right shift register using JK flip-flop with block diagram in detail. (12 Marks)
8. Explain synchronous decade counter using D flip-flop with block diagram in detail. (12 Marks)
9. Explain right shift register using D flip-flop with block diagram in detail. (12 Marks)
10. Explain synchronous decade counter using T flip-flop with block diagram in detail. (12 Marks)