LDICA 10M Questions
LDICA 10M Questions
LDICA 10M Questions
UNIT-1
UNIT-II
1. With the aid of functional schematic diagram of 555 timer, explain how it can be used as
astable multivibrator.
2. Draw and explain the circuit diagram of parallel comparator type ADC.
3. Draw and explain the circuit operation of an inverted R-2R DAC.
4. With the help of schematic diagram of 555 timer, explain how it can be used as mono
Stablemultivibrator
5. Draw the block schematic of PLL and explain the operation of each block and List the applications of
PLL.
6. Draw and explain the circuit diagram of dual slope ADC
7. With neat block diagram, explain successive approximation type A/D converter in detail
UNIT III
1. Draw the circuit of a triangular-wave generator; explain its operation and derive expressions for
frequency of oscillations?
2. Design Wien bridge oscillator using op-amp and derive the necessary expression.
UNIT IV
1. With suitable example, explain how CMOS logic driving by TTL logic
2. Perform the analysis of standard TTL NAND gate and give its characteristics
3. Explain the concept of MOS & CMOS open drain and tri-state outputs.
4. Explain the different variations came in chip size and circuit complexity.
5. Explain about TTL open collector outputs.
6. What is meant by Tristate logic? Draw the circuit of Tristate TTL logic and explain the functions
7. Explain the concept of CMOS transmission gate.
UNIT V
1. Draw the circuit diagram of a 4-bit ripple carry adder using 4 full adder circuit blocks.
2. Design and draw the circuit diagram of decade counter and explain its operation
3. With the help of logic diagram of a 4-bit adder/ subtractor for adding or subtracting two numbers of
arbitrary signs, using 1's complement and explain its working?
4. Design a 3 input 5-bit multiplexer? Write the truth table and draw the logic diagram?
5. Give the design considerations of 2×4 decoder and explain the operation with relevant circuit Design a
parallel binary adder circuit using 2‟s complement system.
6. Design a 4-bit bidirectional shift register with parallel load
7. What is universal shift register? Draw the truth table, logic diagram of a standard MSI 74x194 4-bit,
Universal Shift Register and model the same using data flow-style VHDL program.
8. Design an Asynchronous counter to count from 3 to 6.
9. With the help of the truth table, explain the logic diagram of a MSI 74x138 3-to-8 binary decoder and
model the same using data flow-style VHDL program.
10. Explain working of 4 bit serial into parallel out shift register.
11. What is parity generator? Explain the 3-bit even parity generator. (b) Explain different types of shift
registers.
12. Draw the circuit of Totem-pole TTL NAND gate. What is the purpose of using a diode at the output?
(b) Design a TTL three state NAND gate and explain the operation.
13. Design a 3-bit binary synchronous counter.
14. Design BCD to Excess 3 Code converter