CD UNIT-VI Code Generation
CD UNIT-VI Code Generation
CD UNIT-VI Code Generation
3 4
Fig.7.1. Dominators
Node 1 is initial node and it dominates every node as it is initial node.
Node 2 dominates 3, 4 and 5.
Node 3 dominates itself similarly node 4 dominates itself.
2. Natural loops
Loop in a flow
low graph can be denoted by nd
n d such that d dom n. This edge is called back
edges and for a loop there can be more than one back edge. If there is p q then q is a
head and p is a tail. And head dominates tail.
tail
1
2 3
3 4
6
Fig.7.3. Natural loop
61 1 is a natural loop because we can reach to all the remaining nodes from 6.
3. Inner loops
The inner loop is a loop that contains no other loop.
Here the inner loop is 424 that mean edge given by 2-3-4.
1
5
Fig.7.4. Inner loop
4. Pre-header
The pre-header
header is a new block created such that successor of this block is the block. All
the computations that can be made before the header block can be made the pre-header
block.
Preheader
Header
B0
Fig.7.5. Preheader
5. Reducible flow graph
The reducible graph is a flow graph in which there are two types of edges forward edges
and backward edges. These edges have following properties,
I. The forward edge forms an acyclic graph.
II. The back edges are such edges whose head dominates their tail
tail.
3 4
5
Fig.7.6. Reducible flow graph
Can be reduced as
3 4
5
Fig.7.7. Reduced flow graph
The above flow graph is reducible. We can reduce this graph by removing the edge from
3 to 2. Similarly by removing the back edge from 5 to 1. We can reduce above flow graph
and the resultant graph is a cyclic graph.
6. Non-reducible
reducible flow graph
A non reducible flow graph is a flow graph in which:
I. There are no back edges.
edges
II. Forward edges may produce cycle in the graph.
Example: Following flow graph is non-reducible.
non
2 3
4
Fig.7.8. Non-Reducible flow graph
Evaluation point
W3: z=a*b
B1: t1=4*i
B4: t4=a[t2]
D1: y=2 B1
D2: y=y+2 B2
D3: x=y+2 B3
Fig.7.10. Reaching definition
The definition D1 is reaching definition for block B2, but the definition D1 is not reaching
definition for block B3, because it is killed by definition D2 in block B2.
2.
3. Live variable
A live variable x is live at point p if there is a path from p to the exit, along which the value
of x is used before it is redefined. Otherwise the variable is said to be dead at the point.
4. Busy expression
An expression e is said to be busy expression along some path pi..pj if and only if an
evaluation of e exists along some path pi…pj and no definition of any operand exist
before its evaluation along the path.
path
Total cost=6
4. Basic Blocks.
A basic block is a sequence of consecutive statements in which flow of control enters at
the beginning and leaves at the end without halt or possibility of branching except at the
end.
The following sequence of three-address
three address statements forms a basic block:
t1 := a*a
t2 := a*b
t3 := 2*t2
t4 := t1+t3
t5 := b*b
6. Next-Use
Use information.
The next-use
use information is a collection of all the names that are useful for next
subsequent statement in a block. The use of a name is defined as follows,
Consider a statement,
x := i
j := x op y
That means the statement j uses value of x.
The next-use
use information can be collected by making the backward scan of the
programming code in that specific block.
Dixita Kagathara, CE Department | 170701 – Compiler Design 93
Unit 8 – Code Generation
Storage for Temporary Names
For the distinct names each time a temporary is needed. And each time a space gets
allocated for each temporary. To have optimization in the process of code generation
we pack two temporaries into the same location if they are not live simultaneously
simultaneously.
Consider three address code as,
t1 := a * a t1 := a * a
t2 := a * b t2 := a * b
t3 := 4 * t2 t2 := 4 * t2
t4 := t1+t3 t1 := t1+t2
t5 := b * b t2 := b * b
:
t6 = t4+t5 t1 := t1+t2
Loop L2 L1-L2
+
<=
[]
sum
* + 10
a
4 i 1
Fig 8.4 DAG for block B2
Algorithm for Construction of DAG
We assume the three address statement could of following types,
types
Case (i) x:=y op z
Case (ii)x:=op y
Case (iii) x:=y
Fig. 8.5.
8. Methods to generate code from DAG
1. Rearranging Order
The order of three address code affects the cost of the object code being generated. In
the senses that by changing the order in which computations are done we can obtain
the object code with minimum cost.
Consider the following code,
t1:=a+b
t2:=c+d
t3:=e-t2
t4:=t1-t3
The code can be generated by translating the three address code line by line.
MOV a, R0
ADD b, R0
MOV c, R1
ADD d, R1
MOV R0, t1
MOV e, R0
Dixita Kagathara, CE Department | 170701 – Compiler Design 97
Unit 8 – Code Generation
SUB R1, R0
MOV t1, R1
SUB R0, R1
MOV R1, t4
Now if we change the sequence of the above three address code.
t2:=c+d
t3:=e-t2
t1:=a+b
t4:=t1-t3
Then we can get improved code as
MOV c, R0
ADD d, R0
MOV e, R1
SUB R0, R1
MOV a, R0
ADD b, R0
SUB R1, R0
MOV R0, t4
2. Heuristic ordering
The heuristic ordering algorithm is as follows:
follows
1. Obtain all the interior nodes. Consider these interior nodes as unlisted nodes
nodes.
2. while( unlisted interior nodes remain)
3. {
4. pick up an unlisted node n, whose parents have been listed
5. list n;
6. while(the leftmost child m of n has no unlisted parent AND is not leaf
7. { 1
8. List m; *
2
9. n=m; 3
+
10. } 4
-
11. } *
5
8
+
/
6 7 11 12
- c d e
9 10
a
b
Fig 8.6 A DAG
1 2
t1 t3
a b e t2 1
1 0 1
c d
1 0
Fig 8.6 Labeled tree