Cadence
Cadence
Cadence
1. Environment setup
a. Use putty and run Start-X-Windows to log into Linux server, these two programs should in
your windows start menu
c. Source Virtuoso
source cust_ic613_mmsim.cshrc
d. Invoke Virtuoso
virtuoso
2. Command Interface Window and Library Manager
a. CIW Some default libraries and the libraries you created will be shown here.
Tools -> Library Manager…
We don't have any gate level schematic in our library, so you need to create the gate from
transistor level in your library, save it and use it in the future.
Check “Compile an ASCII technology file” and browse to tsmc18.tf in the tsmc018_process
directory). Close the library manager.
Place the instance by clicking on the schematic drawing window. You can place the
same instance as many times as you want by clicking multiple times on the drawing
window, press ESC to leave the add-instance mode.
c. Add a pin
Place pins to inputs and outputs nodes.
d. Add a wire
h. Add a stimulus
Here we can use a voltage pulse generator as the input. It is “vpulse” in analogLib.
Place it to the schematic and connect it to the input.
In this tutorial we also need a capacitor at the output. Use “cap” in the analogLib
with 10fF as its capacitance.
Place it to the schematic and connect it to the output.
The top-level inverter view is shown below.
Browse to the library/libraries you want to use for SPICE simulation. In this lab we
use “rf018.scs”.
Select “tt” in the Section pull-down list.
b. Add an analysis
c. Add a probe
In order to check the waveforms of nets we have to add probes to nets based on
our needs. The waveforms will tell us if the functionality is correct and if the
performance meets the SPEC.
Outputs -> To Be Plotted -> Select On Schematic
Click on the nets you want to plot. Those nets should be shown in the “Outputs”
box in the ADE window.
e. Run simulation
The ADE should be setup as below.
Simulation -> Netlist and Run or click on the toolbar.