Instruction Set Addressing Modes

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Instruction Set Addressing Modes

Addressing Modes – the method used to tell the processor the address of the data. That
part of the instruction set of the processor which specifies how to calculate the effective
memory address of an operand by using information held in registers or constants
contained within a machine instruction.

100 ADD 200


110 ADD 210
120 JMP 160

160 ADD 200

200 210
210 220
220 2500

 Intermediate – the operand is included in the instruction e.g. ADD 200 adds the value
200 to the value in the accumulator

 Direct – the instruction holds the address of the operand e.g. ADD 200 adds the value
210, which is stored in location 200, to the value in the accumulator

 Indirect – the instruction holds the address of the address of the operand i.e. the first
address points to the direct address of the operand. e.g. ADD 200 adds the value 220 to
the value in the accumulator

 Indexed - the operand is added to the value in the indexed register to calculate the
address of the data. Her that operand is called the base address. e.g. ADD 200 adds the
value 220 to the value that already exists in the accumulator

 Register addressing – the address field contains a reference to a register; the register
will contain the operand

 Register Indirect – the field contains a reference to a register, the register contains the
memory address of the operand

The instruction size/length refers to how many instructions that a microprocessor can
handle and depends on the internal organization of its registers. Some computers have
instructions of varying lengths. The instruction size is based on the number of address fields
present in the instructions and can be classified into:
1. Three-address instructions
2. Two-address instructions
3. One-address instructions
4. Zero address instructions

Longer instruction lengths permit more opcodes, addressing modes, address ranges, etc
However, longer does not imply a significant increase in functionality; however, instruction
lengths are equal to the basic memory transfer data size or a multiple of that size – if the
memory system retrieves 32-bit words, instructions should be 32 bits (or 64).

Three address instructions use each address field to specify either a processor or a memory
operand. Both operands and the destination for the result are explicitly contained in the
instruction word. Examples: X=Y+Z ADD A,B,C (A=B+C)

Opcode: Operand 1 address Operand 2 address Result address

This format is rarely used due to the length of the addresses themselves and the resulting
length of the instruction words. Three address formats result in short programs but require
larger space to specify three addresses.

Two-address Instructions each address field specifies either a processor register or a


memory word. i.e. they contain two address fields. One of the addresses is used to specify
both an operand and the result location.
Example: X = X + Z

The two operands in the instruction specify the memory address of the data to be acted
upon. The result of the operation is stored in one of the operands determined by the
instruction format.

One address instructions use an implied accumulator (AC) register for all data manipulation
i.e. they contain only one address field. For multiplication and division, where two memory
locations are necessary, a temporary register is used. The address of the second register is
assumed to be the accumulator. The operand specifies the address of the first operand. The
second operand is stored in an accumulator register. The results of the operation are stored
in the accumulator.
Example Load B (Acc=B) Acc = X + Acc

Zero address instructions can be defined as computational instructions in which the address
field is not present. Generally, stack organised computers that use PUSH and POP
instructions use this type of addressing field.

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