2-Wire Serial EEPROM: Features

Features
• Low-Voltage and Standard-Voltage Operation

– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
•
•
Bidirectional Data Transfer Protocol
100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
2-Wire
• Write Protect Pin for Hardware Data Protection
• 8-Byte Page (1K, 2K), 16-Byte Page (4K, 8K, 16K) Write Modes Serial EEPROM
• Partial Page Writes Are Allowed
• Self-Timed Write Cycle (10 ms max) 1K (128 x 8)
• High Reliability
– Endurance: 1 Million Write Cycles 2K (256 x 8)
– Data Retention: 100 Years
– ESD Protection: >3000V 4K (512 x 8)
• Automotive Grade and Extended Temperature Devices Available
• 8-Pin and 14-Pin JEDEC SOIC, 8-Pin PDIP, 8-Pin MSOP, and 8-Pin TSSOP Packages
8K (1024 x 8)
Description 16K (2048 x 8)
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec-
trically erasable and programmable read only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low power and low voltage operation are
AT24C01A
essential. The AT24C01A/02/04/08/16 is available in space saving 8-pin PDIP,
(AT24C01A/02/04/08/16), 8-Pin MSOP (AT24001A/02), 8-Pin TSSOP AT24C02
(AT24C01A/02/04/08/16), and 8-Pin and 14-Pin JEDEC SOIC
(AT24C01A/02/04/08/16) packages and is accessed via a 2-wire serial interface. In AT24C04
addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V
(2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions. AT24C08
Pin Configurations 8-Pin TSSOP
AT24C16
Pin Name Function A0 1 8 VCC
A1 2 7 WP
A0 to A2 Address Inputs A2 3 6 SCL
SDA Serial Data GND 4 5 SDA

2-Wire, 1K
Serial E2PROM
SCL Serial Clock Input
8-Pin MSOP
WP Write Protect
A0 1 8 VCC
NC No Connect A1 2 7 WP
A2 3 6 SCL
14-Pin SOIC
GND 4 5 SDA
NC 1 14 NC
A0 2 13 VCC 8-Pin PDIP 8-Pin SOIC
A1 3 12 WP
NC 4 11 NC A0 1 8 VCC A0 1 8 VCC
A2 5 10 SCL A1 2 7 WP A1 2 7 WP
GND 6 9 SDA A2 3 6 SCL A2 3 6 SCL
NC 7 8 NC GND 4 5 SDA GND 4 5 SDA
Rev. 0180D–06/98
1
Absolute Maximum Ratings
Operating Temperature .................................. -55°C to +125°C *NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
Storage Temperature ..................................... -65°C to +150°C age to the device. This is a stress rating only and
functional operation of the device at these or any
Voltage on Any Pin other conditions beyond those indicated in the
with Respect to Ground .....................................-1.0V to +7.0V operational sections of this specification is not
implied. Exposure to absolute maximum rating
Maximum Operating Voltage........................................... 6.25V conditions for extended periods may affect device
reliability.
DC Output Current........................................................ 5.0 mA
Block Diagram
Pin Description addressed on a single bus system. The A0 pin is a no con-

nect.
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each EEPROM device and negative The AT24C08 only uses the A2 input for hardwire address-
edge clock data out of each device. ing and a total of two 8K devices may be addressed on a
single bus system. The A0 and A1 pins are no connects.
SERIAL DATA (SDA): The SDA pin is bidirectional for
serial data transfer. This pin is open-drain driven and may The AT24C16 does not use the device address pins which
be wire-ORed with any number of other open-drain or open limits the number of devices on a single bus to one. The
collector devices. A0, A1 and A2 pins are no connects.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 WRITE PROTECT (WP): The AT24C01A/02/04/16 has a
and A0 pins are device address inputs that are hard wired Write Protect pin that provides hardware data protection.
for the AT24C01A and the AT24C02. As many as eight The Write Protect pin allows normal read/write operations
1K/2K devices may be addressed on a single bus system when connected to ground (GND). When the Write Protect
(device addressing is discussed in detail under the Device pin is connected to V CC , the write protection feature is
Addressing section). enabled and operates as shown in the following table.
The AT24C04 uses the A2 and A1 inputs for hard wire
addressing and a total of four 4K devices may be
2 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
AT24C02, 2K SERIAL EEPROM: Internally organized with

Part of the Array Protected 256 pages of 1-byte each, the 2K requires an 8-bit data
WP Pin word address for random word addressing.
Status 24C01A 24C02 24C04 24C08 24C16
AT24C04, 4K SERIAL EEPROM: The 4K is internally
Normal Upper organized with 256 pages of 2 bytes each. Random word
Full (1K) Full (2K) Full (4K) Read/ Half
At VCC addressing AT24C01A/02/04/08/16 requires a 9-bit data
Array Array Array Write (8K)
Operation Array
word address.
AT24C08, 8K SERIAL EEPROM: The 8K is internally
At GND Normal Read/Write Operations
organized with 4 blocks of 256 pages of 4 bytes each. Ran-
dom word addressing requires a 10-bit data word address.
Memory Organization AT24C16, 16K SERIAL EEPROM: The 16K is internally
AT24C01A, 1K SERIAL EEPROM: Internally organized organized with 8 blocks of 256 pages of 8 bytes each. Ran-
with 128 pages of 1-byte each, the 1K requires a 7-bit data dom word addressing requires an 11-bit data word
word address for random word addressing. address.
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V.
Symbol Test Condition Max Units Conditions
CI/O Input/Output Capacitance (SDA) 8 pF VI/O = 0V
CIN Input Capacitance (A0, A1, A2, SCL) 6 pF VIN = 0V
Note: 1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C,
VCC = +1.8V to +5.5V (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Units
VCC1 Supply Voltage 1.8 5.5 V
ICC Supply Current VCC = 5.0V READ at 100 kHz 0.4 1.0 mA
ICC Supply Current VCC = 5.0V WRITE at 100 kHz 2.0 3.0 mA
ISB1 Standby Current VCC = 1.8V VIN = VCC or VSS 0.6 3.0 µA
ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 µA
ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 µA
VIL Input Low Level(1) -0.6 VCC x 0.3 V
(1)
VIH Input High Level VCC x 0.7 VCC + 0.5 V
VOL2 Output Low Level VCC = 3.0V IOL = 2.1 mA 0.4 V
VOL1 Output Low Level VCC = 1.8V IOL = 0.15 mA 0.2 V
Note: 1. VIL min and VIH max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and
100pF (unless otherwise noted).
2.7-, 2.5-, 1.8-volt 5.0-volt
Symbol Parameter Min Max Min Max Units
fSCL Clock Frequency, SCL 100 400 kHz
tLOW Clock Pulse Width Low 4.7 1.2 µs
tHIGH Clock Pulse Width High 4.0 0.6 µs
(1)
tI Noise Suppression Time 100 50 ns
tAA Clock Low to Data Out Valid 0.1 4.5 0.1 0.9 µs
tBUF Time the bus must be free before 4.7 1.2 µs
a new transmission can start(1)
tHD.STA Start Hold Time 4.0 0.6 µs
tSU.STA Start Set-up Time 4.7 0.6 µs
tHD.DAT Data In Hold Time 0 0 µs
tSU.DAT Data In Set-up Time 200 100 ns
tR Inputs Rise Time(1) 1.0 0.3 µs
tF Inputs Fall Time(1) 300 300 ns
tSU.STO Stop Set-up Time 4.7 0.6 µs
tDH Data Out Hold Time 100 50 ns
tWR Write Cycle Time 10 10 ms
Endurance(1) 5.0V, 25°C, Page Mode 1M 1M Write Cycles
Note: 1. This parameter is characterized and is not 100% tested.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is nor- ACKNOWLEDGE: All addresses and data words are seri-
mally pulled high with an external device. Data on the SDA ally transmitted to and from the EEPROM in 8-bit words.
pin may change only during SCL low time periods (refer to The EEPROM sends a zero to acknowledge that it has
Data Validity timing diagram). Data changes during SCL received each word. This happens during the ninth clock
high periods will indicate a start or stop condition as cycle.
defined below. STANDBY MODE: The AT24C01A/02/04/08/16 features a
START CONDITION: A high-to-low transition of SDA with low power standby mode which is enabled: (a) upon power-
SCL high is a start condition which must precede any other up and (b) after the receipt of the STOP bit and the comple-
command (refer to Start and Stop Definition timing dia- tion of any internal operations.
gram). MEMORY RESET: After an interruption in protocol, power
STOP CONDITION: A low-to-high transition of SDA with loss or system reset, any 2-wire part can be reset by follow-
SCL high is a stop condition. After a read sequence, the ing these steps:
stop command will place the EEPROM in a standby power 1. Clock up to 9 cycles.
mode (refer to Start and Stop Definition timing diagram).
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition as SDA is high.
4 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing

SCL: Serial Clock, SDA: Serial Data I/O
tWR(1)
Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write
cycle.
5
Data Validity
Start and Stop Definition
Output Acknowledge
6 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
Device Addressing acknowledges receipt of the first data word, the microcon-
troller can transmit up to seven (1K/2K) or fifteen (4K, 8K,
The 1K, 2K, 4K, 8K and 16K EEPROM devices all require
16K) more data words. The EEPROM will respond with a
an 8-bit device address word following a start condition to
zero after each data word received. The microcontroller
enable the chip for a read or write operation (refer to Figure
must terminate the page write sequence with a stop condi-
1).
tion (refer to Figure 3).
The device address word consists of a mandatory one,
The data word address lower three (1K/2K) or four (4K, 8K,
zero sequence for the first four most significant bits as
16K) bits are internally incremented following the receipt of
shown. This is common to all the EEPROM devices.
each data word. The higher data word address bits are not
The next 3 bits are the A2, A1 and A0 device address bits incremented, retaining the memory page row location.
for the 1K/2K EEPROM. These 3 bits must compare to When the word address, internally generated, reaches the
their corresponding hard-wired input pins. page boundary, the following byte is placed at the begin-
The 4K EEPROM only uses the A2 and A1 device address ning of the same page. If more than eight (1K/2K) or six-
bits with the third bit being a memory page address bit. The teen (4K, 8K, 16K) data words are transmitted to the
two device address bits must compare to their correspond- EEPROM, the data word address will “roll over” and previ-
ing hard-wired input pins. The A0 pin is no connect. ous data will be overwritten.
The 8K EEPROM only uses the A2 device address bit with ACKNOWLEDGE POLLING: Once the internally-timed
the next 2 bits being for memory page addressing. The A2 write cycle has started and the EEPROM inputs are dis-
bit must compare to its corresponding hard-wired input pin. abled, acknowledge polling can be initiated. This involves
The A1 and A0 pins are no connect. sending a start condition followed by the device address
The 16K does not use any device address bits but instead word. The read/write bit is representative of the operation
the 3 bits are used for memory page addressing. These desired. Only if the internal write cycle has completed will
page addressing bits on the 4K, 8K, and 16K devices the EEPROM respond with a zero allowing the read or
should be considered the most significant bits of the data write sequence to continue.
word address which follows. The A0, A1 and A2 pins are no
connect. Read Operations
The eighth bit of the device address is the read/write opera- Read operations are initiated the same way as write opera-
tion select bit. A read operation is initiated if this bit is high tions with the exception that the read/write select bit in the
and a write operation is initiated if this bit is low. device address word is set to one. There are three read
Upon a compare of the device address, the EEPROM will operations: current address read, random address read
output a zero. If a compare is not made, the chip will return and sequential read.
to a standby state. CURRENT ADDRESS READ: The internal data word
address counter maintains the last address accessed dur-
Write Operations ing the last read or write operation, incremented by one.
This address stays valid between operations as long as the
BYTE WRITE: A write operation requires an 8-bit data
chip power is maintained. The address “roll over” during
word address following the device address word and
read is from the last byte of the last memory page to the
acknowledgment. Upon receipt of this address, the
first byte of the first page. The address “roll over” during
EEPROM will again respond with a zero and then clock in
write is from the last byte of the current page to the first
the first 8-bit data word. Following receipt of the 8-bit data
byte of the same page.
word, the EEPROM will output a zero and the addressing
device, such as a microcontroller, must terminate the write Once the device address with the read/write select bit set
sequence with a stop condition. At this time the EEPROM to one is clocked in and acknowledged by the EEPROM,
enters an internally-timed write cycle, tWR, to the nonvolatile the current address data word is serially clocked out. The
memory. All inputs are disabled during this write cycle and microcontroller does not respond with an input zero but
the EEPROM will not respond until the write is complete does generate a following stop condition (refer to Figure 4).
(refer to Figure 2). RANDOM READ: A random read requires a “dummy” byte
PAGE WRITE: The 1K/2K EEPROM is capable of an 8- write sequence to load in the data word address. Once the
byte page write, and the 4K, 8K and 16K devices are capa- device address word and data word address are clocked in
ble of 16-byte page writes. and acknowledged by the EEPROM, the microcontroller
must generate another start condition. The microcontroller
A page write is initiated the same as a byte write, but the
now initiates a current address read by sending a device
microcontroller does not send a stop condition after the first
address with the read/write select bit high. The EEPROM
data word is clocked in. Instead, after the EEPROM
acknowledges the device address and serially clocks out
7
the data word. The microcontroller does not respond with a acknowledge, it will continue to increment the data word
zero but does generate a following stop condition (refer to address and serially clock out sequential data words. When
Figure 5). the memory address limit is reached, the data word
SEQUENTIAL READ: Sequential reads are initiated by address will “roll over” and the sequential read will con-
either a current address read or a random address read. tinue. The sequential read operation is terminated when
After the microcontroller receives a data word, it responds the microcontroller does not respond with a zero but does
with an acknowledge. As long as the EEPROM receives an generate a following stop condition (refer to Figure 6).
Figure 1. Device Address
Figure 2. Byte Write
Figure 3. Page Write
(* = DON’T CARE bit for 1K)

Figure 4. Current Address Read
8 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
Figure 5. Random Read
(* = DON’T CARE bit for 1K)

Figure 6. Sequential Read
9
AT24C01A Ordering Information
tWR (max) ICC (max) ISB (max) fMAX
(ms) µA)
(µ µA)
(µ (kHz) Ordering Code Package Operation Range
10 3000 18 400 AT24C01A-10PC 8P3 Commercial
AT24C01A-10SC 8S1 (0°C to 70°C)
AT24C01A-10MC 8M
AT24C01A-10TC 8T
3000 18 400 AT24C01A-10PI 8P3 Industrial
AT24C01A-10SI 8S1 (-40°C to 85°C)
AT24C01A-10MI 8M
AT24C01A-10TI 8T
10 1500 4 100 AT24C01A-10PC-2.7 8P3 Commercial
AT24C01A-10SC-2.7 8S1 (0°C to 70°C)
AT24C01A-10MC-2.7 8M
AT24C01A-10TC-2.7 8T
1500 4 100 AT24C01A-10PI-2.7 8P3 Industrial
AT24C01A-10SI-2.7 8S1 (-40°C to 85°C)
AT24C01A-10MI-2.7 8M
AT24C01A-10TI-2.7 8T
Package Type
8M 8-Lead, 0.118" Wide, Miniature Small Outline Package (MSOP)
8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8T 8-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
14S 14-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC)
Options
Blank Standard Operation (4.5V to 5.5V)
-2.7 Low Voltage (2.7V to 5.5V)
10 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
AT24C01A Ordering Information (Continued)

(ms) µA)
(µ µA)
AT24C01A-10SC-2.5 8S1 (0°C to 70°C)
AT24C01A-10MC-2.5 8M
AT24C01A-10TC-2.5 8T
AT24C01A-10SI-2.5 8S1 (-40°C to 85°C)
AT24C01A-10MI-2.5 8M
AT24C01A-10TI-2.5 8T
AT24C01A-10SC-1.8 8S1 (0°C to 70°C)
AT24C01A-10MC-1.8 8M
AT24C01A-10TC-1.8 8T
AT24C01A-10SI-1.8 8S1 (-40°C to 85°C)
AT24C01A-10MI-1.8 8M
AT24C01A-10TI-1.8 8T
Package Type
Options
11
AT24C02 Ordering Information
(ms) µA)
(µ µA)
10 3000 18 400 AT24C02-10PC 8P3 Commercial
AT24C02N-10SC 8S1 (0°C to 70°C)
AT24C02-10SC 14S
AT24C02-10MC 8M
AT24C02-10TC 8T
3000 18 400 AT24C02-10PI 8P3 Industrial
AT24C02N-10SI 8S1 (-40°C to 85°C)
AT24C02-10SI 14S
AT24C02-10MI 8M
AT24C02-10TI 8T
10 1500 4 100 AT24C02-10PC-2.7 8P3 Commercial
AT24C02N-10SC-2.7 8S1 (0°C to 70°C)
AT24C02-10SC-2.7 14S
AT24C02-10MC-2.7 8M
AT24C02-10TC-2.7 8T
1500 4 100 AT24C02-10PI-2.7 8P3 Industrial
AT24C02N-10SI-2.7 8S1 (-40°C to 85°C)
AT24C02-10SI-2.7 14S
AT24C02-10MI-2.7 8M
AT24C02-10TI-2.7 8T
Package Type
Options
12 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
AT24C02 Ordering Information (Continued)

(ms) µA)
(µ µA)
AT24C02N-10SC-2.5 8S1 (0°C to 70°C)
AT24C02-10SC-2.5 14S
AT24C02-10MC-2.5 8M
AT24C02-10TC-2.5 8T
AT24C02N-10SI-2.5 8S1 (-40°C to 85°C)
AT24C02-10SI-2.5 14S
AT24C02-10MI-2.5 8M
AT24C02-10TI-2.5 8T
AT24C02N-10SC-1.8 8S1 (0°C to 70°C)
AT24C02-10SC-1.8 14S
AT24C02-10MC-1.8 8M
AT24C02-10TC-1.8 8T
AT24C02N-10SI-1.8 8S1 (-40°C to 85°C)
AT24C02-10SI-1.8 14S
AT24C02-10MI-1.8 8M
AT24C02-10TI-1.8 8T
Package Type
Options
13
(ms) µA)
(µ µA)
AT24C04N-10SC 8S1 (0°C to 70°C)
AT24C04-10SC 14S
AT24C04-10TC 8T
AT24C04N-10SI 8S1 (-40°C to 85°C)
AT24C04-10SI 14S
AT24C04-10TI 8T
AT24C04N-10SC-2.7 8S1 (0°C to 70°C)
AT24C04-10SC-2.7 14S
AT24C04-10TC-2.7 8T
AT24C04N-10SI-2.7 8S1 (-40°C to 85°C)
AT24C04-10SI-2.7 14S
AT24C04-10TI-2.7 8T
Package Type
Options
14 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16

(ms) µA)
(µ µA)
AT24C04N-10SC-2.5 8S1 (0°C to 70°C)
AT24C04-10SC-2.5 14S
AT24C04-10TC-2.5 8T
AT24C04N-10SI-2.5 8S1 (-40°C to 85°C)
AT24C04-10SI-2.5 14S
AT24C04-10TI-2.5 8T
AT24C04N-10SC-1.8 8S1 (0°C to 70°C)
AT24C04-10SC-1.8 14S
AT24C04-10TC-1.8 8T
AT24C04N-10SI-1.8 8S1 (-40°C to 85°C)
AT24C04-10SI-1.8 14S
AT24C04-10TI-1.8 8T
Package Type
Options
15
(ms) µA)
(µ µA)
AT24C08N-10SC 8S1 (0°C to 70°C)
AT24C08-10SC 14S
AT24C08-10TC 8T
AT24C08N-10SI 8S1 (-40°C to 85°C)
AT24C08-10SI 14S
AT24C08-10TI 8T
AT24C08N-10SC-2.7 8S1 (0°C to 70°C)
AT24C08-10SC-2.7 14S
AT24C08-10TC-2.7 8T
AT24C08N-10SI-2.7 8S1 (-40°C to 85°C)
AT24C08-10SI-2.7 14S
AT24C08-10TI-2.7 8T
Package Type
Options
16 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16

(ms) µA)
(µ µA)
AT24C08N-10SC-2.5 8S1 (0°C to 70°C)
AT24C08-10SC-2.5 14S
AT24C08-10TC-2.5 8T
AT24C08N-10SI-2.5 8S1 (-40°C to 85°C)
AT24C08-10SI-2.5 14S
AT24C08-10TI-2.5 8T
AT24C08N-10SC-1.8 8S1 (0°C to 70°C)
AT24C08-10SC-1.8 14S
AT24C08-10TC-1.8 8T
AT24C08N-10SI-1.8 8S1 (-40°C to 85°C)
AT24C08-10SI-1.8 14S
AT24C08-10TI-1.8 8T
Package Type
Options
17
(ms) µA)
(µ µA)
AT24C16N-10SC 8S1 (0°C to 70°C)
AT24C16-10SC 14S
AT24C16-10TC 8T
AT24C16N-10SI 8S1 (-40°C to 85°C)
AT24C16-10SI 14S
AT24C16-10TI 8T
AT24C16N-10SC-2.7 8S1 (0°C to 70°C)
AT24C16-10SC-2.7 14S
AT24C16-10TC-2.7 8T
AT24C16N-10SI-2.7 8S1 (-40°C to 85°C)
AT24C16-10SI-2.7 14S
AT24C16-10TI-2.7 8T
Package Type
Options
18 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16

(ms) µA)
(µ µA)
AT24C16N-10SC-2.5 8S1 (0°C to 70°C)
AT24C16-10SC-2.5 14S
AT24C16-10TC-2.5 8T
AT24C16N-10SI-2.5 8S1 (-40°C to 85°C)
AT24C16-10SI-2.5 14S
AT24C16-10TI-2.5 8T
AT24C16N-10SC-1.8 8S1 (0°C to 70°C)
AT24C16-10SC-1.8 14S
AT24C16-10TC-1.8 8T
AT24C16N-10SI-1.8 8S1 (-40°C to 85°C)
AT24C16-10SI-1.8 14S
AT24C16-10TI-1.8 8T
Package Type
Options
19
Packaging Information
8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline 8S1, 8-Lead, 0.150" Wide, Plastic Gull Wing Small
Package (PDIP) Outline (JEDEC SOIC)
Dimensions in Inches and (Millimeters) Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-001 BA
.400 (10.16) .020 (.508)

.355 (9.02) .013 (.330)
PIN
1
.280 (7.11) .157 (3.99) .244 (6.20)

.240 (6.10) .150 (3.81) .228 (5.79)
PIN 1
.037 (.940)
.300 (7.62) REF .027 (.690)
.050 (1.27) BSC
.210 (5.33) MAX .100 (2.54) BSC

SEATING .196 (4.98)
PLANE .189 (4.80)
.068 (1.73)
.015 (.380) MIN .053 (1.35)
.150 (3.81)
.115 (2.92) .022 (.559)
.070 (1.78) .014 (.356)
.045 (1.14) .010 (.254)
.004 (.102)
.325 (8.26)
.300 (7.62) 0
REF .010 (.254)
0 8
REF .007 (.203)
.012 (.305) 15
.008 (.203) .050 (1.27)
.430 (10.9) MAX .016 (.406)
14S, 14-Lead, 0.150" Wide, Plastic Gull Wing Small 8M, 8-Lead, 0.118" Wide, Miniature Small Outline
Outline (SOIC) (MSOP)
Dimensions in Inches and (Millimeters) Dimensions in Millimeters and (Inches)
.020 (.508) 0.40 (0.016)

.013 (.330) 0.25 (0.010)
3.10 (0.122)
.158 (4.01) .244 (6.20) 2.90 (0.114)
PIN 1
PIN 1 .152 (3.86) .228 (5.79)
0.65 (0.026) TYP
.050 (1.27) BSC

3.10 (0.122)
2.90 (0.114)
1.10 (0.043)
.344 (8.74)
0.97 (0.038)
.337 (8.56) .068 (1.73)
.053 (1.35)
0.15 (0.006)
0.05 (0.002)
.010 (.249)
.004 (.102)
0.23 (0.009)
0.13 (0.005)
3.81
0 REF (0.150)
8 .010 (.249)
REF
.008 (.191)
4.90 (0.193)
REF
.050 (1.27)
.016 (.406) * Controlling dimension: millimeters
20 AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
Packaging Information
8T, 8-Lead, Plastic Thin Small Outline Package
(TSOP)
Dimensions in Millimeters and (Inches)*
PIN 1
6.50 (.256)
6.25 (.246)
0.30 (.012)
0.19 (.008)
3.10 (.122)
1.05 (.041) 2.90 (.114)
1.20 (.047) MAX
0.80 (.033)
.65 (.026) BSC 0.15 (.006)

0.05 (.002)
4.5 (.177)
4.3 (.169)
0.20 (.008)
0.09 (.004)
0.75 (.030)
0 REF 0.45 (.018)
8
*Controlling dimension: millimeters
21

2-Wire Serial EEPROM: Features

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2-Wire Serial EEPROM: Features

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Copyright:

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2-Wire Serial EEPROM: Features

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Features

• Low-Voltage and Standard-Voltage Operation

SDA Serial Data GND 4 5 SDA

Pin Description addressed on a single bus system. The A0 pin is a no con-

AT24C02, 2K SERIAL EEPROM: Internally organized with

Write Cycle Timing

Start and Stop Definition

Figure 1. Device Address

Figure 2. Byte Write

Figure 3. Page Write

(* = DON’T CARE bit for 1K)

Figure 5. Random Read

(* = DON’T CARE bit for 1K)

AT24C01A Ordering Information (Continued)

AT24C02 Ordering Information (Continued)

AT24C04 Ordering Information (Continued)

AT24C08 Ordering Information (Continued)

AT24C16 Ordering Information (Continued)

.400 (10.16) .020 (.508)

.280 (7.11) .157 (3.99) .244 (6.20)

.210 (5.33) MAX .100 (2.54) BSC

.020 (.508) 0.40 (0.016)

0.65 (0.026) TYP

.050 (1.27) BSC

.65 (.026) BSC 0.15 (.006)

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