ICA-UNIT-III - R19-Complete
ICA-UNIT-III - R19-Complete
ICA-UNIT-III - R19-Complete
OP-AMP Applications-2
Comparator:
To obtain for better performance, we shall also look at integrated designed specifically as
comparators and converters. A comparator as its name implies, compares a signal voltage on
one input of an op-amp with a known voltage called a reference voltage on the other input.
Comparators are used in circuits such as,
Digital Interfacing
Schmitt Trigger
Discriminator
Voltage level detector and oscillators
1. Non-inverting Comparator:
A fixed reference voltage Vref of 1 V is applied to the negative terminal and time
varying signal voltage Vin is applied tot the positive terminal. When Vin is less than Vref the
output becomes V0 at –Vsat [Vin < Vref => V0 (-Vsat)]. When Vin is greater than Vref, the (+)
input becomes positive, the V0 goes to +Vsat. [Vin > Vref => V0 (+Vsat)]. Thus the V0 changes
from one saturation level to another. The diodes D1 and D2 protects the op-amp from damage
due to the excessive input voltage Vin. Because of these diodes, the difference input voltage
Vid of the op-amp diodes are called clamp diodes. The resistance R in series with Vin is used
to limit the current through D1 and D2 . To reduce offset problems, a resistance Rcomp = R is
connected between the (-ve) input and Vref.
Input and Output Waveforms:
2. Inverting Comparator:
This fig shows an inverting comparator in which the reference voltage Vref is applied to the
(+) input terminal and Vin is applied to the (-) input terminal. In this circuit Vref is obtained
by using a 10K potentiometer that forms a voltage divider with dc supply volt +Vcc and -1
and the wiper connected to the input. As the wiper is moved towards +Vcc, Vref becomes
more positive. Thus a Vref of a desired amplitude and polarity can be obtained by simply
adjusting the 10k potentiometer.
APPLICATIONS OF COMPARATORS:
One of the application of comparator is the zero crossing detector or ―sine wave
to Square wave Converter‖. The basic comparator can be used as a zero crossing detector by
setting Vref is set to Zero. (Vref =0V). This Fig shows when in what direction an input signal
Vin crosses zero volts. (i.e) the o/p V0 is driven into negative saturation when the input the
signal Vin passes through zero in positive direction. Similarly, when Vin passes through Zero
in negative direction the output V0 switches and saturates positively.
Drawbacks of Zero- crossing detector:
In some applications, the input Vin may be a slowly changing waveform, (i.e) a low frequency
signal. It will take Vin more time to cross 0V, therefore V0 may not switch quickly from one
saturation voltage to the other. Because of the noise at the op-amp‘s input terminals the output
V0 may fluctuate between 2 saturations voltages +Vsat and –Vsat. Both of these problems can
be cured with the use of regenerative or positive feedback that cause the output V0 to change
faster and eliminate any false output transitions due to noise signals at the input. Inverting
comparator with positive feedback . This is known as ―Schmitt Trigger‖.
The resistance is chosen so that the zener operates in zener region. When VR= 0 then the
output changes rapidly from one state to other very rapidly every time that the input passes
through zero as shown in fig.
Such a configuration is called zero crossing detector. If we want pulses at zero crossing then
a differentiator and a series diode is connected at the output. It produces single pulses at the
zero crossing point in every cycle.
Window Detector:
• The window detector circuit detects when an unknown voltage falls within a specified
voltage band or window.
• When VIN is below the lower voltage level, VREF(LOWER) which equates to 1/3Vcc, VOUT will be
LOW.
• When VIN exceeds this 1/3Vcc lower voltage level, the first op-amp comparator detects this
and switches its open-collector output HIGH. This means that both op-amps have their
outputs HIGH at the same time. No current flows through the pull-up resistor RL so VOUT is
equal to Vcc.
• As VIN continues to increase it passes the upper voltage level, VREF(UPPER) at 2/3Vcc. At this
point the second op-amp comparator detects this and switches its output LOW and
VOUT becomes equal to 0V.
• Then the difference between VREF(UPPER) and VREF(LOWER) (which is 2/3Vccc – 1/3Vcc in this
example) creates the switching window for the positive going signal.
• Lets now assume that VIN is at its maximum value and equal to Vcc. As VIN decreases it passes
the upper voltage level VREF(UPPER) of the second op-amp comparator which switches the
output HIGH. As VIN continues to decrease it passes the lower voltage level, VREF(LOWER) of the
first op-amp comparator once again switching the output LOW.
• Then the difference between VREF(UPPER) and VREF(LOWER) creates the window for the negative
going signal. So we can see that as VIN passes above or passes below the upper and lower
reference levels set by the two op-amp comparators, the output signal VOUT will be HIGH or
LOW.
• In this simple example we have set the upper trip level at 2/3Vcc and the lower trip level at
1/3Vcc (because we used three equal value resistors), but can be any values we choose by
adjusting the input thresholds. As a result, the window width can be customized for a given
application.
• If we used a dual power supply and set the upper and lower trip levels to say ±10 volts
and VIN was a sinusoidal waveform, then we could use this window comparator circuit as a
zero crossing detector of the sine wave which would produce an output, HIGH or LOW every
time the sine wave crossed the zero volts line from positive to negative or negative to
positive.
Level Detector:
• Level detector circuit is used to detect the input voltage level when it crosses certain voltage
level (ref level). A LED or some indicator is used as a output level indicator.
• As above, the voltage divider network provides a set of reference voltages for the individual
op-amp comparator circuits. To produce the four reference voltages will require five
resistors.
• The junction at the bottom pair of resistors will produce a reference voltage that is one-fifth
the supply voltage, 1/5Vcc using equal value resistors. The second pair 2/5Vcc, a third
pair 3/5Vcc and so on, with these reference voltages increasing by a fixed amount of one-
fifth (1/5) towards 5/5Vcc which is actually Vcc.
• As the common input voltage increases, the output of each op-amp comparator circuit
switches in turn thereby turning OFF the connected LED starting with the lower
comparator, A4 and upwards towards A1 as the input voltage increases. So by setting the
values of the resistors in the voltage divider network, the comparators can be configured to
detect any voltage level. One good example of the use of voltage level detection and
indication would be for a battery condition monitor by reversing the LED’s and connecting
them to 0V (ground) instead of VCC.
• Also by increasing the number of op-amp comparators in the set, more trigger points can be
created. So for example, if we had eight op-amp comparators in the chain and fed the
output of each comparator to an 8-to-3 line Digital Encoder, we could make a very simple
analogue-to-digital converter, (ADC) that would convert the analogue input signal into a 3-
bit binary code (0-to-7).
Types of Rectifiers
Rectifiers are classified into two types: Half wave rectifier and Full wave rectifier.
This section discusses about these two types in detail.
Observe that the circuit diagram of a half wave rectifier shown above looks like an
inverting amplifier, with two diodes D1 and D2 in addition.
The working of the half wave rectifier circuit shown above is explained below
• For the positive half cycle of the sinusoidal input, the output of the op-amp
will be negative. Hence, diode D1 will be forward biased.
• When diode D1 is in forward bias, output voltage of the op-amp will be -0.7 V.
So, diode D2 will be reverse biased. Hence, the output voltage of the above
circuit is zero volts.
• Therefore, there is no (zero) output of half wave rectifier for the positive half
cycle of a sinusoidal input.
• For the negative half cycle of sinusoidal input, the output of the op-amp will
be positive. Hence, the diodes D1 and D2 will be reverse biased and forward
biased respectively. So, the output voltage of above circuit will be –
• Therefore, the output of a half wave rectifier will be a positive half cycle for a
negative half cycle of the sinusoidal input.
Wave forms
The input and output waveforms of a half wave rectifier are shown in the following
figure
As you can see from the above graph, the half wave rectifier circuit diagram
that we discussed will produce positive half cycles for negative half cycles of
sinusoidal input and zero output for positive half cycles of sinusoidal input.
The above circuit diagram consists of two op-amps, two diodes, D1 & D2 and five
resistors, R1 to R5. The working of the full wave rectifier circuit shown above is
explained below −
• For the positive half cycle of a sinusoidal input, the output of the first op-amp
will be negative. Hence, diodes D1 and D2 will be forward biased and reverse
biased respectively.
• Then, the output voltage of the first op-amp will be −
• Observe that the output of the first op-amp is connected to a resistor R4, which
is connected to the inverting terminal of the second op-amp. The voltage
present at the non-inverting terminal of second op-amp is 0 V. So, the second
op-amp with resistors, R4 and R5 acts as an inverting amplifier.
• The output voltage of the second op-amp will be
• Therefore, the output of a full wave rectifier will be a positive half cycle for
the positive half cycle of a sinusoidal input. In this case, the gain of the output
is
• If we consider R1 =R2= R4 = R5 =R, then the gain of the output will be one.
• For the negative half cycle of a sinusoidal input, the output of the first op-amp
will be positive. Hence, diodes D1 and D2 will be reverse biased and forward
biased respectively.
• The output voltage of the first op-amp will be −
The output of the first op-amp is directly connected to the non-inverting terminal
of the second op-amp. Now, the second op-amp with resistors, R4 and R5 acts as
a non-inverting amplifier.
The output voltage of the second op-amp will be −
As you can see in the above figure, the full wave rectifier circuit diagram that we considered
will produce only positive half cycles for both positive and negative half cycles of a
sinusoidal input.
Logarithmic Amplifier
A logarithmic amplifier, or a log amplifier, is an electronic circuit that
produces an output that is proportional to the logarithm of the applied input. This
section discusses about the op-amp based logarithmic amplifier in detail.
An op-amp based logarithmic amplifier produces a voltage at the output, which is
proportional to the logarithm of the voltage applied to the resistor connected to its
inverting terminal. The circuit diagram of an op-amp based logarithmic amplifier is
shown in the following figure −
In the above circuit, the non-inverting input terminal of the op-amp is connected
to ground. That means zero volts is applied at the non-inverting input terminal of the
op-amp.
According to the virtual short concept, the voltage at the inverting input terminal of
an op-amp will be equal to the voltage at its non-inverting input terminal. So, the
voltage at the inverting input terminal will be zero volts.
The nodal equation at the inverting input terminal’s node is −
The following is the equation for current flowing through a diode, when it is in forward bias
where,
Is is the saturation current of the diode,
Vf is the voltage drop across diode, when it is in forward bias,
VT is the diode’s thermal equivalent voltage.
The KVL equation around the feedback loop of the op amp will be −
Note that in the above equation, the parameters n, VT and Is are constants. So, the
output voltage V0 will be proportional to the natural logarithm of the input
voltage Vi for a fixed value of resistance R1.
Therefore, the op-amp based logarithmic amplifier circuit discussed above will
produce an output, which is proportional to the natural logarithm of the input voltage
Vi, when R1 Is= 1V.
Observe that the output voltage V0 has a negative sign, which indicates that there exists a
1800 phase difference between the input and the output.
Anti-Logarithmic Amplifier
An anti-logarithmic amplifier, or an anti-log amplifier, is an electronic circuit
that produces an output that is proportional to the anti-logarithm of the applied input.
This section discusses about the op-amp based anti-logarithmic amplifier in detail.
An op-amp based anti-logarithmic amplifier produces a voltage at the output, which
is proportional to the anti-logarithm of the voltage that is applied to the diode
connected to its inverting terminal.
The circuit diagram of an op-amp based anti-logarithmic amplifier is shown in the
following figure −
In the circuit shown above, the non-inverting input terminal of the op-amp is
connected to ground. It means zero volts is applied to its non-inverting input terminal.
According to the virtual short concept, the voltage at the inverting input terminal of
op-amp will be equal to the voltage present at its non-inverting input terminal. So, the
voltage at its inverting input terminal will be zero volts.
The nodal equation at the inverting input terminal’s node is −
We know that the equation for the current flowing through a diode, when it is in forward bias,
is as given below –
The KVL equation at the input side of the inverting terminal of the op amp will be
1
Contd..
Contd..
2
Contd..
3
SQUAREWAVE GENERATOR:
• The square wave generator using op amp means
the astable multivibrator circuit using op-amp.
SQUAREWAVE GENERATOR:
4
Contd..
Frequency of Oscillation:
• The voltage across the capacitor as a function of time
is given as
Where,
VC(t) is the instantaneous voltage across the capacitor.
Vinitial is the initial voltage
Vmax is the voltage toward which the capacitor is
charging.
5
Contd..
• Let us consider the charging of capacitor from
VLT to VUT, where VLT is the initial voltage, VUT is
the instantaneous voltage and +Vsat is the
maximum voltage.
Contd..
6
Contd..
Contd..
7
IC Applications
UNIT-III
8
Contd..
9
Contd..
Contd..
10
Contd..
11
Contd..
Contd..
12
V-F acccp+s Gon VIE) a„cl
t01'4h
Vib
CDhvnc
1-17-1
V
curv-vå ofr C 38
Cq Vend ShcÜ1/)
vc2_ A reachd
Ccrnpa9rJ7)
diode CD) be biased
VOI bcømeg 4Ve
cwvvv+ Q
v014CUe Von
Vin
YO/
when -Ihah
meda{iVe cacle
we Can SA
2R2RCW
Vsıl