Memory Organization Part 2
Memory Organization Part 2
Memory Organization Part 2
1. Every memory cell exhibit two states which represent binary 0 and 1.
2. Every memory cell can be read to sense the state it is representing.
3. Every memory cell can be written to set it to a particular state i.e.,
either 0 or 1.
Every memory cell has three lines of access select, control, and read/write.
The select line indicates whether the particular memory cell has been
selected for the read/write operation or not. The control line indicates
whether it is a read or write operation.
For writing the cell an electrical signal is passed through the read/write line
which sets the cell’s status to 0 or 1. While reading the same read/write line
is used to output the cells state.
It is easy to read data from and write data into the RAM memory. The data
is read or written into the RAM memory using the electric signals. Further,
the RAM memory has two other forms DRAM and SRAM.
In dynamic RAM (DRAM) the memory cells are made using capacitors.
When the capacitors are charged the value of that memory cell is
considered as 1 and when the capacitor has discharged the value of that
memory cell is considered as 0. That means the charged or uncharged
capacitor represents the binary 1 or 0 respectively.
The capacitor automatically discharged after a period so to retain the data
in the capacitor it must charge periodically.
In static RAM (SRAM) the memory cell is implemented using the two inverters that are
cross-connected to form a latch and this latch in turn is connected to two-bit lines which are
connected to two transistors. Here the transistors act as a switch that can be closed and
opened under the control of the word line.
The figure below shows the structure of a ROM memory cell where the bit value of the
memory cell is 0 if the transistor is at a ground level otherwise it is 1.
The bit line is connected to the power supply via a resistor. To read the value of the memory
cell the word line is activated which connects the transistor to the ground. This drops the
voltage of the bit line to 0 if the transistor is connected to the ground. If there is no
connection between transistor and ground the bit line remains at high voltage indicating 1.
The state of the memory cell at the connection to the ground is defined during the chip
fabrication.
The ROM memory can be used for microprogramming, such as for storing library
subroutines, system programs, function tables. The advantage of this internal memory is that
the required data or the program is always present in the internal main memory and it is not
required to get the data loaded from any secondary memory like in RAM.
On the ROM memory chip, the data or program is embedded during the chip fabrication so it
leads to a large fixed cost whether you are fabricating a single copy or more. And even there
is no scope for an error of even a single bit as it will ruin the entire batch of ROMS.
Like RAM the ROM also has some other forms such as programmable ROM, erasable
programable ROM, electrically erasable programable ROM, and flash memory.
The programable ROM (PROM) is used when few ROMs are required with a specific
memory content. PROMs can be written only once using electric signals.
The erasable programable ROM (EPROM) can be read and written using electrical signals.
Well before a write operation is performed the memory content of this memory chip are
erased to reatin its initial state by exposing the memory chip to the ultraviolet rays.
The EPROM can be erased and update repeatedly and like ROM and PROM, it retains its
memory content even if there is no power supply. Compared to ROM and PROM the
EPROM is more expensive.
The electrically erasable programable ROM (EEPROM) is the ROM memory that can be
erased selectively and written multiple times. Unlike the EPROM where the entire data gets
erased when exposed to the ultraviolet rays.
In EEPROM the selective data can be erased without removing the memory chip from the
system as with the high than normal electrical voltage the data be erased. The EEPROM is a
little complex when compared to the EPROM as it requires different electrical voltage to
erase the data.
Flash memory functionally and costs wise lies between EPROM and EEPROM. In flash
memory, it is possible to write the entire block of cells. Before writing into the flash memory
the block of cells has to be erased, unlike the EEPROM where the byte level erasure is
performed. The erasure of flash memory is faster.
Cache Memory
The cache memory is a volatile memory that loses its memory content once the power supply
to the memory unit is interrupted. The cache memory keeps the copies of the recently
accessed information from the main memory.
Whenever the same information is required again it is accessed from the cache memory
which enhances the performance of the system. In this way the cache memory stores the
frequently use information. The cache memory is faster and costlier and smaller than RAM
memory.
So, these are the internal memories of the computer which are faster smaller, and costlier than
the external memories. Usually, the internal memories of the computer are made of
semiconductor material that has the technology to speed up access to the memory content.
RAM is a part of the computer's Main Memory, which is directly accessible by the
CPU. Random access allows the PC processor to directly access any part of the
memory rather than proceeding sequentially from a starting place. RAM is located
close to a computer's processor and enables faster access to data than storage
media such as hard disk drives and solid-state drives. RAM is used to store the data
that is currently processed by the CPU. Most of the programs and data that are
modifiable are stored in RAM. Integrated RAM chips are available in two forms:
Dynamic random access memory stores each bit of data in a separate capacitor
within an integrated circuit. The charging and discharging of the capacitor represent
0 and 1, i.e., the two possible values that can be stored in a bit.
DRAM is widely used in digital electronics where low-cost and high-capacity memory
is required.
ow DRAM works?
Memory is made of bits of data or program code that are arranged in a two-
dimensional grid.
o DRAM will store bits of data in a storage or memory cell, consisting of a capacitor
and a transistor.
o The storage cells are typically organized in a rectangular configuration. When a
charge is sent through a column, the transistor at the column is activated.
o A DRAM storage cell is dynamic, meaning that it needs to be refreshed or given a
new electronic charge every few milliseconds to compensate for charge leaks from
the capacitor.
o The memory cells will work with other circuits that can be used to identify rows and
columns, track the refresh process, and instruct a cell whether or not to accept a
charge and read or restore data from a cell.
o DRAM is one option of semiconductor memory that a system designer can use when
building a computer. Alternative memory choices include static RAM (SRAM),
electrically erasable programmable read-only memory (EEPROM), NOR flash, and
NAND flash. Many systems use more than one type of memory.
Types of DRAM
Many types of DRAM can be used in a device. Below are some common types of
DRAM, such as:
1. Asynchronous DRAM: The memory access was not synchronized with the system
clock. That's why it's called asynchronous. It was the first type of DRAM in use but
was gradually replaced by synchronous DRAM.
o RAS only Refresh: ROR is a classic asynchronous DRAM type, and it is refreshed by
opening each row in turn. An external counter is required to refresh the rows
sequentially. The refresh cycles are spread across the overall refresh interval.
o CAS before RAS refresh: CBRis used to reduce external circuitry. The counter
required for the refresh was incorporated into the main chip. It became the standard
format for the refresh of an asynchronous DRAM. (It is also the only form generally
used with SDRAM).
o FPM DRAM: FPM DRAM or Fast Page Mode DRAM was designed to be faster than
conventional types of DRAM. As such, it was the main type of DRAM used in PCs,
although it is now well out of date as it was only able to support memory bus speeds
up to about 66 MHz.
o Extended data out DRAM: EDO DRAM improves the time to read from memory on
microprocessors, such as the Intel Pentium. EDO DRAM was a form of DRAM that
provided a performance increase over FPM DRAM. Yet this type of DRAM was still
only able to operate at speeds of up to about 66 MHz.
o Single Data Rate SDRAM: Single data rate SDRAM (SDR SDRAM or SDR) is the
original generation of SDRAM. It made a single transfer of data per clock cycle.
o Double Data Rate SDRAM: DDR SDRAM almost doubles the bandwidth in the data
rate of SDRAM by using double pinning. This process allows for data to transfer on
rising and falling edges of a clock signal.
It has been available in different iterations over time, including DDR2 SDRAM, DDR3
SDRAM, and DDR4 SDRAM.
o Rambus DRAM: RDRAM was more widely used in the early 2000s for graphics cards.
The RDRAM provides a very high data transfer rate over a narrow CPU-memory bus.
It uses various speedup mechanisms, like a synchronous memory interface, caching
inside the DRAM chips, and very fast signal timing. The Rambus data bus width is 8 or
9 bits.
o Reduced Latency DRAM: Reduced Latency DRAM (RLDRAM) is a high-performance
double data rate (DDR) SDRAM that combines fast, random access with high
bandwidth, mainly intended for networking and caching applications.
Advantages of DRAM
The main advantages of DRAM include the following:
Disadvantages of DRAM
Here are the following main disadvantages of DRAM, such as:
DRAM SRAM
DRAM can do byte-level writing and multiple- SRAM can do byte-level read and write.
byte-level reading.
DRAM needs refreshing as it operates on the There is no need for refreshing in SRAM as it
principle of charging the capacitor. operates on the principle of switching the
current.
DRAM is used in the main memory. SRAM is used in the cache memory.
The structure of the DRAM module needs a The structure of SRAM needs a lot of
transistor and a capacitor for storing every bit transistors.
of data.
DRAM requires less power than SRAM SRAM consumes less power than DRAM in
nactive state. sleep mode.
But SRAM retains some advantages over DRAM. SRAM does not need to be
refreshed because it operates on the principle of switching the current flow in one of
two directions rather than holding a charge in place within a storage cell. SRAM is
generally used for cache memory, which can access more quickly than DRAM.