Ts 914
Ts 914
Ts 914
Features
■ Rail-to-rail input and output voltage ranges
■ Single (or dual) supply operation from 2.7 to
16 V
■ Extremely low input bias current: 1 pA typical D
■ Low input offset voltage: 5 mV max. (A grade) SO-14
(plastic micropackage)
■ Specified for 600 Ω and 100 Ω loads
■ Low supply current: 200 μA/ampli. (VCC = 3 V)
■ Latch-up immunity
Pin connections (top view)
■ Spice macromodel included in this specification
Related products
■ See TS56x series for better accuracy and smaller
packages
Description
The TS914 device is a rail-to-rail CMOS quad
operational amplifier designed to operate with a
single or dual supply voltage.
The input voltage range Vicm includes the two
supply rails VCC+ and VCC-.
The output reaches VCC- +50 mV, VCC+ -50 mV,
with RL = 10 kΩ, and VCC- +350 mV, VCC+ -
350 mV, with RL = 600 Ω.
This product offers a broad supply voltage
operating range from 2.7 to 16 V and a supply
current of only 200 μA/amp. (VCC = 3 V).
The source and sink output current capability is
typically 40 mA (at VCC = 3 V), fixed by an internal
limitation circuit.
2 Schematic diagram
3 Electrical characteristics
Table 3. VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C (unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
TS914 10
Input offset voltage TS914A 5
Vio mV
(Vicm = Vo = VCC/2) Tmin ≤ Tamb ≤ Tmax, TS914 12
Tmin ≤ Tamb ≤ Tmax, TS914A 7
ΔVio Input offset voltage drift 5 μV/°C
(1)
Input offset current 1 100
Iio pA
Tmin ≤ Tamb ≤ Tmax 200
Input bias current(1) 1 150
Iib pA
Tmin. ≤ Tamb ≤ Tmax 300
per amplifier, AVCL = 1, no load 200 300
ICC Supply current μA
Tmin ≤ Tamb ≤ Tmax 400
CMR Common mode rejection ratio Vicm = 0 to 3 V, Vo = 1.5 V 70 dB
SVR Supply voltage rejection ratio VCC+ = 2.7 to 3.3 V, Vo = VCC/2 80 dB
RL = 10 kΩ, Vo = 1.2 V to 1.8 V 3 10
Avd Large signal voltage gain V/mV
Tmin ≤ Tamb ≤ Tmax 2
Vid = 1 V,
RL = 10 kΩ 2.9 2.97
RL = 600 Ω 2.2 2.7
VOH High level output voltage RL = 100 Ω 2 V
Vid = 1V, Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ 2.8
RL = 600 Ω 2.1
Vid = -1 V,
RL = 10 kΩ 50 100
RL = 600 Ω 300 600
VOL Low level output voltage RL = 100 Ω 900 mV
Vid = -1 V, Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ 150
RL = 600 Ω 900
Vid = ±1 V
Io Output short-circuit current Source (Vo = VCC-) 40 mA
Sink (Vo = VCC+) 40
AVCL = 100, RL = 10 kΩ,
GBP Gain bandwidth product 0.8 MHz
CL = 100 pF, f = 100 kHz
AVCL = 1, RL = 10 kΩ, CL = 100 pF,
SR Slew rate 0.5 V/μs
Vin = 1.3 V to 1.7 V
φm Phase margin 30 °
en Equivalent input noise voltage Rs = 100 Ω, f = 1 kHz 30 nV/√Hz
VO1/VO2 Channel separation f = 1 kHz 120 dB
1. Maximum values include unavoidable inaccuracies of the industrial tests.
Table 4. VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C (unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
TS914 10
Input offset voltage TS914A 5
Vio mV
(Vicm = Vo = VCC/2) Tmin ≤ Tamb ≤ Tmax, TS914 12
Tmin ≤ Tamb ≤ Tmax, TS914A 7
ΔVio Input offset voltage drift 5 μV/°C
1 100
Iio Input offset current (1) pA
Tmin ≤ Tamb ≤ Tmax 200
1 150
Iib Input bias current (1) pA
Tmin ≤ Tamb ≤ Tmax 300
per amplifier, AVCL = 1, no load 230 350
ICC Supply current μA
Tmin ≤ Tamb ≤ Tmax 450
CMR Common mode rejection ratio Vicm = 1.5 to 3 V, Vo = 2.5 V 85 dB
SVR Supply voltage rejection ratio VCC+ = 3 to 5 V, Vo = VCC/2 80 dB
R L = 10 kΩ, Vo = 1.5 V to 3.5 V 10 40
Avd Large signal voltage gain V/mV
Tmin ≤ Tamb ≤ Tmax 7
Vid = 1 V,
RL = 10 kΩ 4.85 4.95
RL = 600 Ω 4.20 4.65
VOH High level output voltage RL = 100 Ω 3.7 V
Vid = 1 V, Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ 4.8
RL = 600 Ω 4.1
Vid = -1 V,
RL = 10 kΩ 50 100
RL = 600 Ω 350 680
VOL Low level output voltage RL = 100 Ω 1400 mV
Vid = -1 V, Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ 150
RL = 600 Ω 900
Vid = ±1 V
Io Output short-circuit current Source (Vo = VCC-) 60 mA
Sink (Vo = VCC+) 60
AVCL = 100, RL = 10 kΩ, CL = 100 pF,
GBP Gain bandwidth product 1 MHz
f = 100 kHz
AVCL = 1, RL = 10 kΩ, CL = 100 pF,
SR Slew rate 0.8 V/μs
Vin = 1 V to 4 V
φm Phase margin 30 °
en Equivalent input noise voltage R s = 100 Ω, f = 1 kHz 30 nV/√Hz
VO1/VO2 Channel separation f = 1 kHz 120 dB
1. Maximum values include unavoidable inaccuracies of the industrial tests.
TS914 10
Input offset voltage (Vicm = TS914A 5
Vio mV
Vo = VCC/2) Tmin ≤ Tamb ≤ Tmax, TS914 12
Tmin ≤ Tamb ≤ Tmax, TS914A 7
ΔVio Input offset voltage drift 5 μV/°C
1 100
Iio Input offset current(1) pA
Tmin ≤ Tamb ≤ Tmax 200
1 150
Iib Input bias current(1) pA
Tmin ≤ Tamb ≤ Tmax 300
Common mode rejection Vicm = 3 to 7 V, Vo = 5 V 90
CMR dB
ratio Vicm = 0 to 10 V, Vo = 5 V 75
SVR Supply voltage rejection ratio VCC+= 5 to 10 V, Vo = VCC/2 90 dB
RL = 10 kΩ, Vo = 2.5 V to 7.5 V 15 60
Avd Large signal voltage gain V/mV
Tmin ≤ Tamb ≤ Tmax 10
Vid = 1 V,
RL = 10 kΩ 9.85 9.95
RL = 600 Ω 9 9.35
VOH High level output voltage RL = 100 Ω 7.8 V
Vid = 1 V, Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ 9.8
RL = 600 Ω 9
Vid = -1 V,
RL = 10 kΩ 50 180
RL = 600 Ω 650 800
VOL Low level output voltage RL = 100 Ω 2300 mV
Vid = -1 V, Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ 150
RL = 600 Ω 900
Io Output short-circuit current Vid = ±1 V 60 mA
AVCL = 1, no load, 400 600
ICC Supply current / operator μA
Tmin ≤ Tamb ≤ Tmax 700
AVCL = 100, RL = 10 kΩ, CL = 100 pF,
GBP Gain bandwidth product 1.4 MHz
f = 100 kHz
AVCL = 1, RL = 10 kΩ, CL = 100 pF,
SR Slew rate 1 V/μs
Vi = 2.5 V to 7.5 V
φm Phase margin Rs = 100 Ω, f = 1 kHz 40 °
Equivalent input noise
en Rs = 100 Ω, f = 1 kHz 30 nV/√Hz
voltage
AVCL = 1, RL = 10 kΩ, CL = 100 pF,
THD Total harmonic distortion 0.02 %
Vo = 4.75 to 5.25 V, f = 1 kHz
Cin Input capacitance 1.5 pF
Figure 2. Supply current (each amplifier) Figure 3. High level output voltage vs. high
vs. supply voltage level output current
(VCC = +5 V, VCC = +3 V)
Output voltage
Supply current
Figure 4. Low level output voltage vs. low level Figure 5. Input bias current vs. temperature
output current (VCC = +5 V, VCC = +3 V)
Input bias current
Output voltage
Figure 6. High level output voltage vs. high Figure 7. Low level output voltage vs. low
level output current level output current
(VCC = +16 V, VCC = +10 V) (VCC = 16 V, VCC = 10 V)
Output voltage
Output voltage
Figure 8. Gain and phase vs. frequency Figure 9. Gain bandwidth product vs. supply
(RL = 10 kΩ) voltage (RL = 10 kΩ)
Phase (degrees)
Phase
Figure 10. Phase margin vs. supply voltage Figure 11. Gain and phase vs. frequency
(RL = 10 kΩ) (RL = 600 Ω)
Gain
Phase (degrees)
d
Phase
Phase margin
Gain
Figure 12. Gain bandwidth product vs. supply Figure 13. Phase margin vs. supply voltage
voltage (RL = 600 Ω) (RL = 600 Ω)
d
Gain bandw. prod.
Phase margin
Frequency
4 Macromodels
Vio 0 mV
Avd RL = 10 kΩ 10 V/mV
ICC No load, per operator 100 μA
Vicm -0.2 to 3.2 V
VOH RL = 600 Ω 2.96 V
VOL RL = 60 Ω 300 mV
Isink VO = 3 V 40 mA
Isource VO = 0 V 40 mA
GBP RL = 10 kΩ, CL = 100 pF 0.8 MHz
SR RL = 10 kΩ, CL = 100 pF 0.3 V/μs
φm Phase margin 30 Degrees
5 Package information
Millimeters Inches
Symbol
Min. Typ. Max. Min. Typ. Max.
6 Ordering information
7 Revision history
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