Ordering number : EN7739A

LA6571
Monolithic Linear IC

5CH Driver for Mini Disk and Compact Disk http://onsemi.com

Overview
The LA6571 is 5-channel driver for mini disk and compact disk applications (BTL-AMP: 5CH).

Features
• Power amplifier 5-channel built-in.
• IO max 1A
• Level shift circuit built-in.
• Mute circuit (output ON/OFF) with three built-in channels (2-2-1).
(Operates independently for each of MUTE1: CH1 and 2, MUTE2: CH3 and 4, and MUTE3: CH5.
Not operating for the regulator (REG))
• Regulator (REG) built-in (external PNP transistor).
Voltage setting (typ: 1.5V or more) with an external resistor
• Overheat protection circuit (thermal shutdown) built-in.

Specifications
Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit

Supply voltage VCC max 14 V

Maximum output current IO max Each output for channel 1 to 5. 1 A
Maximum input voltage VINB 13 V
MUTE pin voltage VMUTE 13 V
Allowable loss Pd max Independent IC 0.8 W
Mounted on a specified board* 2 W
Operating temperature Topr -30 to +85 °C
Storage temperature Tstg -55 to +150 °C
* Mounted on a specified board: 76.1mm×114.3mm×1.6mm glass epoxy
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

Recommended Operating Conditions at Ta = 25°C

Parameter Symbol Conditions Ratings Unit
Supply voltage 1 VCC1 4.5 to VCC2 V
Supply voltage 2 VCC2 6 to 13 V

Semiconductor Components Industries, LLC, 2013

June, 2013 92706 / 40506 MS IM B8-8101, 5525 No.7739-1/7
 LA6571
Electrical Characteristics at Ta = 25°C, VCC1 = 5V, VCC2 = 12V, VREF-IN = 1.65V, unless especially specified
Ratings
Parameter Symbol Conditions Unit
min typ max
[ALL Blocks]
No-load current drain ON ICC ON All outputs ON *1 30 50 mA
No-load current drain OFF ICC OFF All outputs OFF *1 10 20 mA
VREF input voltage range VREF-IN 1 VCC2-1 V
Thermal shutdown temperature TSD *7 150 175 200 °C
[BTL AMP Block] (CH1 to CH5)
Output offset voltage VOFF Voltage difference in output between
-50 50 mV
BTL AMP and each channel.
Output offset voltage VOFF1 Voltage difference in output between
-80 80 mV
BTL AMP and each channel.
Output voltage VO CH1,CH2 *3 3.2 4.0 V
Output voltage VO1 CH3,CH4,CH5 *4 9.7 10.5 V
Closed-circuit voltage gain VG1 Gain between input and output for CH1, CH2,
4.2 5.0 6.0 times
and CH5 *2
Closed-circuit voltage gain VG3 Gain between input and output for CH3 and
8.2 9.0 11.0 times
CH4 *2
Slew rate SR AMP Independent.
0.5 V/μs
Multiply 2 between outputs. *7
MUTE ON voltage VMUTE ON Each MUTE *6 2 V
MUTE OFF voltage VMUTE OFF Each MUTE *6 0.5 V
[Input AMP Block]
Input voltage range VIN op 0 VCC2-1.5 V
Output offset voltage VOFF op -10 10 mV
Output current (SINK) SINK op 2 mA
Output current (SOURCE) SOURCE op *5 300 500 μA
[Power Supply Block] (PNP transistor: 2SB632K)
Regulator output VOUT For error Amp, RL = 10kΩ at buffer 1.2 1.3 1.4 V
REG-IN SINK current REG-IN-SINK Base current to external PNP 5 10 mA
Line regulation ΔVOLN 6V ≤ VCC ≤ 12V, IO = 200mA 20 150 mV
Load regulation ΔVOLD 5mA ≤ IO ≤ 200mA 50 200 mV
*1. Current dissipation that is a sum of VCC1 and VCC2 at no load.
*2. Input AMP is a BUFFER AMP.
*3. Voltage difference between both ends of load (8Ω). Output saturated.
*4. Voltage difference between both ends of load (12Ω). Output saturated.
*5. The source of input OP-AMP is a constant current. (See the specified block diagram.)
As the 11kΩ resistance to the next stage is a load, pay due attention when setting the input OP-AMP gain.
*6. Output ON with MUTE: [H] and OFF with MUTE: [L] (HI impedance).
*7. Design guarantee value

No.7739-2/7
 LA6571
Package Dimensions
unit : mm
3251 Pd max - Ta
3.0
Mounted on a specified board:

Allowable Power Dissipation, Pd max - W

17.8 76.1mm×114.3mm×1.6mm glass epoxy
(6.2) 2.5
36 19
Mounted on a specified board
2.0

(4.9)

10.5
7.9
1.5

0.65
1.04
1.0 Independent IC
1 18 0.8
(0.5) 0.8 2.0 0.3
0.25
0.5
(2.25)

2.45max 0.42

0
-40 -30 -20 0 20 40 60 80 85 100
Ambient Temperature, Ta -°C ILA00922
0.1

2.7

SANYO : HSOP36R(375mil)

Pin Description
Pin Pin
Pin No. Equivalent Circuit Diagram Description
Name Name
Input VIN1+ 17 Each input pin
VIN1− 16
VIN- VIN
VIN1 15
VIN2+ 20 VCC
VIN2− 19
VIN2 18
VIN3+ 23
VIN3− 22
VIN3 21 VIN+
VIN4− 30
VIN4+ 29
VIN4 31
VIN5+ 32
VIN5− 33 S-GND
VIN5 34
Output VO1+ 12 Each output
VO1− 13 VCC
VO2+ 10
VO2− 11
VO3+ 8
VO3− 9 VO
VO4+ 6
VO4− 7
VO5+ 5 RF
VO5− 4
MUTE MUTE1 1 VCC Turns ON/OFF the output for
MUTE2 2 MUTE1: CH1, 2
MUTE3 36 MUTE2: CH3, 4, and
MUTE3: CH5.
Each MUTE operates
MUTE independently.
100kΩ 100kΩ

MUTE: H output ON
MUTE: L output OFF
With the output OFF, the
S-GND output has a high impedance.

No.7739-3/7
 LA6571
Relationship between MUTE and Power (VCC)

CH1 (4-fold)
MUTE1 VCC1 (5V)
CH2 (4-fold)

CH3 (10.5-fold)
MUTE2
CH4 (10.5-fold) VCC2 (12V)

MUTE3 CH5 (10.5-fold)

* MUTE operates independently for each corresponding channel.

Schematic Diagram of I/O Related Components

11kΩ
VIN -
Level Shift

11kΩ VO+
VIN- - +
-
VIN+ +
+
-
- VO-
+
VREF-IN +

-
+

No.7739-4/7
 LA6571
Block Diagram

MUTE1 1 MUTE1 CH1,2 Thermal Shutdown CH5 MUTE3 36 MUTE3

Each MUTE operates independently for

MUTE2 2 MUTE2 CH3,4 each corresponding current. 35 S-GND
“H”: Output ON
CH3,4,5 “L”: Output OFF
VCC2 3 Power Supply 34 VIN5

27.5kΩ
VO5− 4 33 VIN5−

Level Shift
11kΩ
-
CH5 -
+
+
VO5+ 5 32 VIN5+

VO4+ 6 31
Level Shift

VIN4

CH4
50kΩ
VO4− 7 30 VIN4−
11kΩ
-
-
+
+
VO3+ 8 29 VIN4+
Level Shift

CH3
-
VO3− 9 + 28 VREF-IN

-
FR FR FR FR
+

VO2+ 10 27
Level Shift

VREF-IN(CH5)

CH2 VREG
-
VO2− 11 26 REG-IN(B)
+

VO1+ 12 25
Level Shift

(NC)

CH1

VO1− 13 24 REG-VREF

CH1,2 50kΩ
VCC1 14 5V Power Supply 23 VIN3+
11kΩ
+
-
-
+
VIN1 15 - 22 VIN3−
+

VIN1− 16 27.5kΩ 21 VIN3

11kΩ
-
-
+ 27.5kΩ
VIN1+ 17 + 20 VIN2+
11kΩ
+
-
-
+
VIN2 18 19 VIN2−

No.7739-5/7
 LA6571
Sample Application Circuit

No.7739-6/7
 LA6571

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PS No.7739-7/7