STF33N60M2, STI33N60M2

STP33N60M2, STW33N60M2
Datasheet

N-channel 600 V, 0.108 Ω typ., 26 A, MDmesh M2 Power MOSFETs

in TO‑220FP, I2PAK, TO-220 and TO-247 packages

TAB
Features
Order codes VDS @ TJmax RDS(on) max. ID Package
3 23
1 STF33N60M2 TO-220FP
2
1
TO-220FP I2PAK STI33N60M2 I²PAK
TAB 650 V 0.125 Ω 26 A
STP33N60M2 TO-220
STW33N60M2 TO-247

2
3 • Extremely low gate charge
1
TO-220 TO-247 • Excellent output capacitance (COSS) profile
• 100% avalanche tested
D ( 2 , TAB )
• Zener-protected

G( 1)
Applications
• Switching applications
• LLC converters, resonant converters

S(3) AM15572V1
Description
These devices are N-channel Power MOSFETs developed using the MDmesh M2
technology. Thanks to their strip layout and improved vertical structure, these devices
exhibit low on-resistance and optimized switching characteristics, rendering them
suitable for the most demanding high-efficiency converters.

Product status links

STF33N60M2
STI33N60M2
STP33N60M2
STW33N60M2

DS9497 - Rev 3 - June 2019 www.st.com

For further information contact your local STMicroelectronics sales office.
 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Value
Symbol Parameter I2PAK, TO-220, Unit
TO-220FP
TO-247

VGS Gate-source voltage ±25 V

Drain current (continuous) at TC = 25 °C 26(1) 26 A

ID
Drain current (continuous) at TC = 100 °C 16(1) 16 A

IDM(2) Drain current (pulsed) 104(1) 104 A

PTOT Total power dissipation at TC = 25 °C 35 190 W

dv/dt(3) Peak diode recovery voltage slope 15 V/ns

dv/dt(4) MOSFET dv/dt ruggedness 50 V/ns

Insulation withstand voltage (RMS) from all three

VISO leads to external heat sink 2500 V
(t = 1 s, TC = 25 °C)

Tstg Storage temperature range

-50 to 150 °C
Tj Operating junction temperature range

1. Limited by maximum junction temperature.

2. Pulse width is limited by safe operating area.
3. ISD ≤ 26 A, di/dt ≤ 400 A/µs, VDS peak < V(BR)DSS, VDD = 400 V
4. VDS ≤ 480 V

Table 2. Thermal data

Value

Symbol Parameter I2PAK Unit

TO-220FP TO-247
TO-220

Rthj-case Thermal resistance junction-case 3.6 0.66 °C/W

Rthj-amb Thermal resistance junction-ambient 62.5 50 °C/W

Table 3. Avalanche characteristics

Symbol Parameter Value Unit

IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 5 A

EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 450 mJ

DS9497 - Rev 3 page 2/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Electrical characteristics

2 Electrical characteristics

(TC = 25 °C unless otherwise specified).

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 V 600 V

VGS = 0 V, VDS = 600 V 1 µA

IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V,
100 µA
TC = 125 °C(1)

IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA

VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V

RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 13 A 0.108 0.125 Ω

1. Defined by design, not subject to production test.

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ciss Input capacitance - 1781 - pF

VDS = 100 V, f = 1 MHz,
Coss Output capacitance - 85 - pF
VGS = 0 V
Crss Reverse transfer capacitance - 2.5 - pF

Coss eq.(1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 135 - pF

RG Intrinsic gate resistance f = 1 MHz, ID = 0 V - 5.2 - Ω

Qg Total gate charge VDD = 480 V, ID = 26 A, - 45.5 - nC

Qgs Gate-source charge VGS = 0 to 10 V - 9.9 - nC

(see Figure 19. Test circuit for gate
Qgd Gate-drain charge - 18.5 - nC
charge behavior)

1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(on) Turn-on delay time VDD = 300 V, ID = 13 A, - 16 - ns

tr Rise time RG = 4.7 Ω, VGS = 10 V - 9.6 - ns

td(off) Turn-off delay time (see Figure 18. Test circuit for - 109 - ns
resistive load switching times and
Figure 23. Switching time
tf Fall time - 9 - ns
waveform)

DS9497 - Rev 3 page 3/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Electrical characteristics

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD Source-drain current - 26 A

ISDM(1) Source-drain current (pulsed) - 104 A

VSD (2) ISD = 26 A, VGS = 0 V

Forward on voltage - 1.6 V

trr Reverse recovery time ISD = 26 A, di/dt = 100 A/µs - 375 ns

Qrr Reverse recovery charge VDD = 60 V - 5.6 µC

(see Figure 20. Test circuit for
IRRM Reverse recovery current inductive load switching and diode - 30 A
recovery times)
trr Reverse recovery time ISD = 26 A, di/dt = 100 A/µs - 478 ns

Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C - 7.7 µC

(see Figure 20. Test circuit for
IRRM Reverse recovery current inductive load switching and diode - 35.5 A
recovery times)

1. Pulse width limited by safe operating area.

2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.

DS9497 - Rev 3 page 4/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Electrical characteristics (curves)

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area for TO-220FP Figure 2. Thermal impedance for TO-220FP
AM17917v1
ID K GC20521
(A)
δ=0.5

100 0.2
is 0.1
ea
a r on) 10-1
is DS (
th
10 in a x R
io n y m 10µs
at 0.05
er d b
O p m ite 100µs 0.02
Li
1 1ms 0.01
10ms 10-2
Zth= K*R thJ-c
Single pulse
δ =t p/Ƭ
0.1 Tj=150°C
Tc=25°C
S ingle puls e tp
Ƭ
0.01 10-3
0.1 1 10 100 VDS (V) 10-4 10 -3
10
-2
10 -1
10-0 tp(s)

Figure 3. Safe operating area for I2PAK and TO-220 Figure 4. Thermal impedance for I2PAK and TO-220
AM17906v1
ID
(A)

100
is
R re a
)
on
ax a
S(
m th is

10 10µs
by n
d ni

100µs
ite io
m at
Li p e r

1ms
O

1 10ms
Tj=150°C
Tc=25°C
S ingle puls e
0.1
0.1 1 10 100 VDS (V)

Figure 5. Safe operating area for TO-247 Figure 6. Thermal impedance for TO-247
AM17918v1
ID
(A)

100
is
R re a
)
on
ax a
S(

10µs
m th is

10
by n
d ni

100µs
ite io
m at
Li p e r

1ms
O

1 10ms
Tj=150°C
Tc=25°C
S ingle puls e
0.1
0.1 1 10 100 VDS (V)

DS9497 - Rev 3 page 5/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Electrical characteristics (curves)

Figure 7. Output characteristics Figure 8. Transfer characteristics

AM17907v1 AM17908v1
ID (A) ID
VGS =7, 8, 9, 10V (A)
6V VDS =17V
60 60

50 50

40 40
5V
30 30

20 20

10 10
4V
0 0
0 5 10 15 20 VDS (V) 0 2 4 6 8 10 VGS (V)

Figure 9. Gate charge vs gate-source voltage Figure 10. Static drain-source on-resistance
AM17909v1 AM17910v1
VGS R DS (on)
VDS
(V) (V) (Ω )
VDD=480V VGS =10V
12 0.114
ID=26A 500
VDS
10
400 0.112
8
300 0.110
6
200 0.108
4

2 100 0.106

0 0 0.104
0 10 20 30 40 50 Q g (nC) 0 5 10 15 20 25 ID(A)

Figure 12. Normalized gate threshold voltage vs

Figure 11. Capacitance variations
temperature
AM17911v1
C AM17913v1
VGS (th)
(pF) (norm)
ID=250µA
10000
1.1
Cis s
1000
1.0

100
Cos s 0.9

10
0.8
Crs s
1
0.1 1 10 100 VDS (V) 0.7
-50 -25 0 25 50 75 100 TJ (°C)

DS9497 - Rev 3 page 6/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Electrical characteristics (curves)

Figure 13. Normalized on-resistance vs temperature Figure 14. Source-drain diode forward characteristics
AM17914v1 AM17916v1
R DS (on) VS D
(norm)
ID=13A
2.3 VDS =10V

2.1 TJ =-50°C
1.9
1.7
1.5
1.3 TJ
TJ =150°C
1.1
0.9
0.7
0.5
-50 -25 0 25 50 75 100 TJ (°C) 0 4 IS D

Figure 15. Normalized V(BR)DSS vs temperature Figure 16. Output capacitance stored energy
AM17915v1 AM17912v1
V(BR)DSS E os s
(norm.) (µJ )
ID=1mA 12
1.09
1.07
10
1.05
8
1.03
1.01 6
0.99
0.97 4

0.95
2
0.93
0.91 0
-50 -25 0 25 50 75 100 TJ (°C) 0 100 200 300 400 500 600 VDS (V)

Figure 17. Maximum avalanche energy vs temperature

EAS GADG070220191439EAS
(mJ)

400

300
ID = 5 A,
VDD = 50 V
200

100

0
-75 -25 25 75 125 TJ (°C)

DS9497 - Rev 3 page 7/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Test circuits

3 Test circuits

Figure 18. Test circuit for resistive load switching times Figure 19. Test circuit for gate charge behavior

VDD

12 V 47 kΩ
1 kΩ
100 nF
RL
2200 3.3
+ μF μF VDD
VD IG= CONST
VGS 100 Ω D.U.T.

VGS
RG D.U.T. pulse width +
2.7 kΩ
2200 VG
pulse width μF
47 kΩ

1 kΩ

AM01468v1 AM01469v1

Figure 20. Test circuit for inductive load switching and

Figure 21. Unclamped inductive load test circuit
diode recovery times

A A A L
D VD
fast 100 µH
G D.U.T. diode 2200 3.3
S B 3.3 1000 + µF µF VDD
B B
25 Ω D
µF + µF VDD ID
G D.U.T.
+ RG S
Vi D.U.T.
_
pulse width

AM01471v1
AM01470v1

Figure 23. Switching time waveform

Figure 22. Unclamped inductive waveform
ton toff
V(BR)DSS
td(on) tr td(off) tf
VD

90% 90%
IDM

10% VDS 10%

ID 0

VDD VDD VGS 90%

0 10%
AM01472v1
AM01473v1

DS9497 - Rev 3 page 8/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Package information

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.

4.1 TO-220FP package information

Figure 24. TO-220FP package outline

7012510_Rev_13_B

DS9497 - Rev 3 page 9/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
TO-220FP package information

Table 8. TO-220FP package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.40 4.60
B 2.50 2.70
D 2.50 2.75
E 0.45 0.70
F 0.75 1.00
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.20
G1 2.40 2.70
H 10.00 10.40
L2 16.00
L3 28.60 30.60
L4 9.80 10.60
L5 2.90 3.60
L6 15.90 16.40
L7 9.00 9.30
Dia 3.00 3.20

DS9497 - Rev 3 page 10/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
I²PAK package information

4.2 I²PAK package information

Figure 25. I²PAK package outline

0004982_Rev_H

DS9497 - Rev 3 page 11/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
I²PAK package information

Table 9. I²PAK package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.40 - 4.60
A1 2.40 - 2.72
b 0.61 - 0.88
b1 1.14 - 1.70
c 0.49 - 0.70
c2 1.23 - 1.32
D 8.95 - 9.35
e 2.40 - 2.70
e1 4.95 - 5.15
E 10 - 10.40
L 13 - 14
L1 3.50 - 3.93
L2 1.27 - 1.40

DS9497 - Rev 3 page 12/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
TO-220 type A package information

4.3 TO-220 type A package information

Figure 26. TO-220 type A package outline

0015988_typeA_Rev_22

DS9497 - Rev 3 page 13/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
TO-220 type A package information

Table 10. TO-220 type A package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.40 4.60
b 0.61 0.88
b1 1.14 1.55
c 0.48 0.70
D 15.25 15.75
D1 1.27
E 10.00 10.40
e 2.40 2.70
e1 4.95 5.15
F 1.23 1.32
H1 6.20 6.60
J1 2.40 2.72
L 13.00 14.00
L1 3.50 3.93
L20 16.40
L30 28.90
øP 3.75 3.85
Q 2.65 2.95

DS9497 - Rev 3 page 14/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
TO-247 package information

4.4 TO-247 package information

Figure 27. TO-247 package outline

0075325_9

DS9497 - Rev 3 page 15/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
TO-247 package information

Table 11. TO-247 package mechanical data

mm
Dim.
Min. Typ. Max.

A 4.85 5.15
A1 2.20 2.60
b 1.0 1.40
b1 2.0 2.40
b2 3.0 3.40
c 0.40 0.80
D 19.85 20.15
E 15.45 15.75
e 5.30 5.45 5.60
L 14.20 14.80
L1 3.70 4.30
L2 18.50
ØP 3.55 3.65
ØR 4.50 5.50
S 5.30 5.50 5.70

DS9497 - Rev 3 page 16/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Ordering information

5 Ordering information

Table 12. Order codes

Order code Marking Package Packing

STF33N60M2 TO-220FP

STI33N60M2 I2PAK
33N60M2 Tube
STP33N60M2 TO-220
STW33N60M2 TO-247

DS9497 - Rev 3 page 17/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2

Revision history

Table 13. Document revision history

Date Version Changes

13-Sep-2013 1 First release.

Modified: RDS(on) and ID values in cover page
Modified: values in Table 4
Modified: RDS(on) typical and maximum values in Table 5, the entire typical
19-Nov-2013 2
values in Table 6, 7 and 8
Added: Section 2.1: Electrical characteristics (curves)
Minor text changes
Removed maturity status indication from cover page.
Updated title, features and description.
14-Jun-2019 3 Updated Table 3. Avalanche characteristics.
Added Figure 17. Maximum avalanche energy vs temperature.
Minor text changes

DS9497 - Rev 3 page 18/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2
Contents

Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 I²PAK package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

DS9497 - Rev 3 page 19/20

 STF33N60M2, STI33N60M2, STP33N60M2, STW33N60M2

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
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products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved

DS9497 - Rev 3 page 20/20