Aic Lec 01 Introduction v01

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‫ن ا ْلعِْلِم إِاَّل قَلِ ًيل‬ِ ‫وما أُوتِيتم‬

‫م‬
8 June 2020 1441 ‫ شوال‬16

َ ُْ ََ

Analog IC Design

Lecture 01
Introduction

Dr. Hesham A. Omran


Integrated Circuits Laboratory (ICL)
Electronics and Communications Eng. Dept.
Faculty of Engineering
Ain Shams University
Introduction

ENIAC, U.S. Army, 1946 Smart phone


Size → Large hall (> 150m2) Size → Your pocket
Power Consumption ≈ 150kW Power consumption < 1W
01: Introduction 2
Electronics All Around Us

01: Introduction 3
Transistor Evolution

First transistor Modern MOSFET


Emitter and Collector contacts Effective channel
separation ≈ 100µm length ≈ 35nm
Bell Labs, 1947 Intel, 2006
01: Introduction [Weste and Harris, 2010] 4
Integrated Circuit Evolution
≈ 20mm

≈ 11mm

First IC Xeon E5 Microprocessor


Only one transistor (+ R + C)! 2.26 billion transistors!
Texas Instruments (TI), 1958 Intel, 2012

01: Introduction 5
Sensing Microsystems

3mm 4mm

ADXL350
Analog Devices, 2012
Complete system on a tiny chip
• 3-axis MEMS* accelerometer
• Interface electronics
• Analog-to-digital conversion
• Memory
First accelerometer • Control logic
B&K, 1940s • Power management
• Digital interface
Simple bulky transducer
Acceleration → Voltage *MEMS = Micro-Electro-Mechanical
01: Introduction Systems 6
Moore’s Law
❑ Moore’s law [1965]: Transistor count doubles every year

01: Introduction [Electronics magazine article, 1965] 7


Moore’s Law
❑ Moore’s law [1965]: Transistor count doubles every year
❑ Practically: It doubled every 2-3 years since the 4004 [1970s]
❑ At the end of the day: It is exponential!

01: Introduction [Weste and Harris, 2010] 8


Technology Minimum Feature Size
❑ Minimum feature size shrinking 30% (≈ 1/ 2) every 2-3 years
▪ Transistor area and cost are reduced by a factor of 2
❑ Device scaling brings new opportunities and challenges!

01: Introduction [Weste and Harris, 2010] 9


Levels of Abstraction

01: Introduction [Razavi, 2017] 10


IC Industry in Egypt

?
01: Introduction 11
Course Objective
❑ To teach the basic knowledge required for
▪ Analog IC analysis and design using CMOS technology
▪ Moving from specifications (specs) to block design
▪ Simulating analog ICs using professional CAD tools

Specifications

01: Introduction [M. El-Nozahi, ASU] 12


Your Learning Journey
Material Devices Circuits

Product System

01: Introduction [M. El-Nozahi, ASU] 13


Course Prerequisites
❑ You should be familiar with
▪ Analysis of electrical circuits
▪ Basic semiconductor physics
▪ Basic MOSFET operation and physics
▪ MOSFT large signal and small signal models
▪ Basic analysis of transistor amplifiers
❑ A review will be provided for all of the above topics
▪ But you will struggle if you have never heard about these topics before

01: Introduction 14
References
❑ Textbook
▪ B. Razavi, “Design of analog CMOS integrated circuits,” 2nd ed., McGraw-Hill Ed., 2017.

❑ References for beginners


▪ A. Sedra and K. Smith, “Microelectronic circuits,” 7th ed., Oxford University Press, 2015.
▪ T. Floyd, “Electronics Fundamentals, Circuits, Devices, and Applications,” 8th ed.,
Pearson, 2014.
▪ B. Razavi, “Fundamentals of microelectronics,” 2nd ed., Wiley, 2014.

01: Introduction 15
References
❑ References for professionals
▪ T. C. Carusone, D. Johns, and K. W. Martin, “Analog integrated circuit design,” 2nd ed.,
Wiley, 2012.
▪ P. Gray, P. Hurst, S. Lewis, and R. Meyer, “Analysis and design of analog integrated
circuits,” 5th ed., Wiley, 2009.
▪ P. Jespers and B. Murmann, “Systematic design of analog CMOS circuits using pre-
computed lookup tables,” Cambridge University Press, 2017.
▪ R. J. Baker, “CMOS circuit design,” 3rd ed., Wiley, 2010.
▪ W. Sansen, “Analog design essentials,” Springer, 2006.

01: Introduction 16
Canvas
❑ Canvas is a learning management system (LMS) used in many universities in the US and
around the world
❑ We will use Canvas for
▪ Posting lectures, notes, etc.
▪ Questions and answers
▪ Announcements and discussions
▪ Quizzes
▪ Submitting and grading assignments, reports, etc.
▪ And more!
❑ Every student must register at Canvas today!
❑ Contact me through Canvas, only in emergency contact me by email:
[email protected]

01: Introduction 17
Feedback
❑ Don’t hesitate to send me feedback to improve the course quality.
❑ Avoid two common misconceptions
1. Feedback should NOT wait to the end of the course!
• It will be too late to improve anything!
• But anyway, you may still help next generations ☺
2. Feedback should NOT be always negative!
• Too much negative feedback leads to zero output!
• Too much positive feedback causes oscillation!
• Be balanced!

01: Introduction 19
What is an Integrated Circuit (IC)?
❑ Various circuit elements: transistors, capacitors, resistors, and even small inductances can
be integrated on one chip

01: Introduction 20
Discrete vs. Integrated Electronics
Circuits using discrete
components Integrated circuit

01: Introduction 21
Integrated Circuit Components
❑ Transistors:
▪ Billions of tiny transistors can be integrated on the same chip
▪ Very Large Scale Integration (VLSI): > 10,000 transistors
❑ Capacitors:
▪ Capacitors as large as 100s of pF can be integrated on-chip
▪ But they consume a lot of chip area → Use sparingly
❑ Resistors:
▪ Resistors as large as few MOhms can be integrated on-chip
▪ But they consume a lot of chip area → Use sparingly
❑ Inductors:
▪ Small inductors (few nH) can be integrated on-chip
▪ But they consume a lot of area with relatively poor performance → Use sparingly: Only
in high frequency circuits (e.g., RFICs)
01: Introduction 22
Analog vs Digital Signals
❑ Analog: continuous in time and amplitude

❑ Digital: discrete in time and amplitude

01: Introduction [Razavi, 2014] 23


Why Digital?
❑ Digital circuits are
▪ Less sensitive to noise (robust)
▪ Easier to store (digital memories)
▪ Easier to process (digital signal processing: DSP)
▪ Amenable to automated design
▪ Amenable to automated testing
▪ Direct beneficiary of Moore’s law (down-scaling)

01: Introduction 24
Why Analog?
❑ All the physical signals in the world around us are analog
▪ Voice, light, temperature, pressure, etc.
❑ We (will) always need an “analog” interface circuit to connect between our physical world
and our digital electronics
❑ There will always be jobs for analog/mixed-signal/RF designers ☺

Digital
Amplifier A/D processing
and storage

01: Introduction 25
Why Analog?
❑ High speed digital design is actually analog design!
❑ At low speeds, we may directly digitize the signal and perform the signal processing in the
digital domain.
❑ At high speeds, signal processing in the analog domain is much more energy efficient.
❑ The boundary between high and low speed has risen over time.

01: Introduction [Razavi, 2017] 26


Signal Processing Chain
❑ There will always be jobs for analog/mixed-signal/RF designers ☺

Amp A/D

Physical
world
Digital
(sound,
Power Management processing
temperature,
and storage
pressure,
light, etc.)

Amp D/A

01: Introduction 27
Example: Mixed-Signal Hearing Aid
❑ There will always be jobs for analog/mixed-signal/RF designers ☺

ΣΔ ΣΔ H-Bridge
DSP
A/D D/A Driver

AGC Decimation
Filter

-50
[dB]

-100

-150
0.001 0.01 0.1 0.5
Normalized frequency

01: Introduction [Y. Chiu, EECT 7327, UTD] 28


Wireless Signal Processing Chain
❑ There will always be jobs for analog/mixed-signal/RF designers ☺

Rx Amp A/D

EM Waves
Digital
Power Management processing
and storage

Tx Amp D/A

01: Introduction 29
Why CMOS?
❑ Early integrated circuits primarily used bipolar transistors (BJTs)
❑ CMOS technologies dominated the digital market since the 1980s
→ CMOS = Complementary MOS = NMOS + PMOS
1. Consumed negligible static power
• Was indeed negligible in the past
• But not negligible any more…
2. Required very few devices per gate
3. Can be scaled down more easily
4. Lower fabrication cost
❑ For analog design, BJTs used to be much better than MOSFETs
▪ Faster, less noisy, less variations, more energy efficient, higher gain
❑ Then why analog CMOS?

04: MOSFET DC 30
Why Analog CMOS?
❑ ICs market is driven primarily by memories and microprocessors
▪ The analog designer needs to survive in a digital driven market
❑ We want to integrate analog and digital on the same chip
▪ Mixed-signal design and system-on-a-chip
❑ BJTs used to be faster, but with continuous scaling, MOSFET speed exceeded BJT
❑ MOSFET can operate with lower supply voltage

04: MOSFET DC 31
Analog Amplifier

𝑣𝑜𝑢𝑡
❑ The amplifier has finite gain (𝐴𝑣 = ) and finite bandwidth (speed)
𝑣𝑖𝑛

01: Introduction [Razavi, 2014] 32


Analog IC Design Challenges
❑ Device scaling
▪ Transistors become faster, but the gain declines
❑ Supply voltage scaling
▪ From 12V in 1970s to less than 1V nowadays
❑ Low power consumption
▪ Increase battery lifetime, decrease cost and heat emissions
❑ Complexity
▪ Continuous increase in transistor count and system complexity
❑ PVT variations
▪ Tolerate large process, voltage, and temperature variations
❑ New applications
▪ Wireless standards, wearables, IoT, serial links (e.g., USB), power management

01: Introduction 33
Analog IC Design Challenges
❑ Analog design automation is a difficult task

01: Introduction [Razavi, 2017] 34


Analog IC Design Flow (Simplified)
Design Specs

Topology Selection Fabrication

Circuit Hand Calculations


Packaging
Design and Analysis Tape-out

Simulation and
Testing
Design Adjustment

Physical Layout and Post No Specs


Design Layout Simulation met?

Yes
Specs
No met? Yes Product

01: Introduction [M. El-Nozahi, ASU] 35


Tape-Out
❑ The layout is sent to the fab in a format called GDS II
▪ Previously it was sent on a magnetic tape → tape-out
▪ Now by email (small design) or FTP (large design)

01: Introduction [Weste and Harris, 2010] 36


MPW
❑ ICs are fabricated on silicon wafers
▪ Turnaround time ~ 3months
❑ A fabrication run in 65nm process costs about $3 million
▪ Cost sharing using MPW (multi-project wafer)
• US: MOSIS
• Europe and MENA: Europractice

01: Introduction [Weste and Harris, 2010] 37


MPW Example
❑ Link: http://www.europractice-ic.com/general_runschedule.php
❑ Foundries include TSMC, UMC, GLOBALFOUNDRIES, …
❑ < 50 samples only!
❑ Example:

01: Introduction 38
Packaging and Testing
❑ Wafer diced into dies
❑ Gold bond wires from die I/O pads to package
❑ Packaging is now much more advanced than the
simple DIP
→ DIP: Dual inline package

01: Introduction [Weste and Harris, 2010] 39


Thank you!

01: Introduction 40
References
❑ A. Sedra and K. Smith, “Microelectronic Circuits,” Oxford University Press, 7th ed., 2015.
❑ B. Razavi, “Fundamentals of Microelectronics,” Wiley, 2nd ed., 2014.
❑ B. Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw-Hill, 2nd ed., 2017.
❑ N. Weste and D. Harris, “CMOS VLSI Design,” Pearson, 4th ed., 2010.

01: Introduction 41
Modern “Moore” Concepts
❑ More Moore
▪ Further miniaturization of transistor as per Moore’s law
▪ New materials for performance enhancement (HK, SOI, III-V)
▪ We are approaching the “physical limits” of the transistor
❑ More than Moore
▪ Adding functionalities not associated with transistor scaling to increase device value
(sensors, MEMS, bio, passives, etc.)
▪ 3D integrated circuits
❑ Beyond Moore (Beyond CMOS)
▪ Exploring new device architectures
▪ Gate-all-around transistors, nanowires (NW-FET), nanotubes (CNT), memristors, spin
electronics, graphene, etc.

01: Introduction [P. Kin Leong, SUTD] 42


Modern “Moore” Concepts

01: Introduction [Wolfgang Arden et. al., ITRS] 43


IC Technology Generations
❑ Early integrated circuits primarily used bipolar transistors (BJTs)
❑ 1960s: MOS ICs became attractive for their low cost
▪ MOS transistor occupied less area
▪ The fabrication process was simpler
▪ Early commercial processes used only PMOS transistors and suffered from poor
performance, yield, and reliability
❑ 1970s: Processes using only NMOS transistors became common
❑ Digital circuits in all the previous technologies have quiescent power
▪ Power is dissipated when the circuit is idle, i.e., not switching
▪ This limits the maximum number of transistors that can be integrated on one die

01: Introduction 44
IC Technology Generations (Cont’d)
❑ 1980s: The VLSI era
▪ Power consumption became a major issue
▪ CMOS processes were widely adopted and replaced NMOS and bipolar processes for
nearly all digital logic applications
→ CMOS = Complementary MOS = NMOS + PMOS
▪ A key advantage for “digital” CMOS is that it has negligible idle (static) power
consumption
❑ Nowadays:
▪ With aggressive scaling and billions of transistors, CMOS idle leakage current is not
negligible any more
▪ But no better technology is available yet…

01: Introduction 45
How to Design a Billion Transistor Chip?
1. Abstraction
▪ Hiding details until they become necessary
2. Structured design
▪ Hierarchy: Block, sub-blocks, … → Tree structure (from root to leaf cells)
▪ Regularity: Min no. of different blocks → Block reuse (e.g., standard cells)
▪ Modularity: Blocks are black boxes that have well-defined interfaces → Combine to
build larger system without surprises!
3. CAD Tools
▪ Automation, automation, automation!
▪ Analog automation is way behind digital automation

01: Introduction 46
CAD/EDA
❑ Analog design
▪ Design entry (schematic), simulation, layout
▪ Verification (LVS: layout vs schematic, DRC: layout design rule check, parasitic
extraction, post-layout simulation)
❑ Digital design
▪ Design entry (e.g., HDL) and simulation
▪ Automated synthesis (from HDL to gates)
▪ Automated place and route (from gates to transistor layout)
▪ Verification
❑ System design
▪ Behavioral modeling and high level simulation/verification
❑ EM simulation, process simulation, device simulation, etc.

01: Introduction 47

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