Physics of Semiconductor Materials

4. Introduction to Integrated Circuit

Fabrication
 Learning Outcomes

 Upon completion of viewing this presentation, you should be able to:

Understand IC technology
Understand IC fabrication

Reference : 1. Introduction to Integrated Circuit Technology, Written

by: Scotten W. Jones
2. ©2002 John Wiley & Sons, Inc. M. P. Groover, “Fundamentals of
Modern Manufacturing 2/e”

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 Introduction to Integrated Circuit
 Integrated circuit is defined as a complex set of tiny components and their
interconnections that are imprinted onto a tiny slice of semiconductor
material (e.g. Si).

 Integrated circuits: many transistors on one chip.

 Integrated circuits usually called ICs or chips.

 In the field of nanotechnology, this basic idea of fabrication is very

important from the point of view of semiconductor device engineering.

 Semiconductor device fabrication is the process used to create chips for

devices that are a part of our everyday use. It is a multiple-step sequence
of photographic and chemical processing during which electronic circuits
are gradually created on a wafer substrate made of pure semi-conducting
material. 3
 In the world of semiconductor devices and integrated circuits,
Si is the commonly used semiconductor materials and it is
mostly used as a substrate material. E.g. solar cells made of
silicon wafers are cheaper and can be used for practical
applications.

 Of date, it has been observed that GaAs fabrication has

advanced compared to Si due to strong thermal stability,
direct bandgap and higher electron mobility. However, GaAs
fabrication is a difficult process and the cost is also very high.

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• Integrated circuit (IC) is a collection of electronic devices such as
transistors, diodes, and resistors that have been fabricated and
electrically interconnected onto a small flat chip of semiconductor
material.

• Silicon (Si) - most widely used semiconductor material for ICs, due to its
combination of properties and low cost.

• Less common semiconductor materials: germanium (Ge) and gallium

arsenide (GaAs).

• Since circuits are fabricated into one solid piece of material, the term
solid state electronics is used for these devices.

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 IC Elements

 Resistors-resists current flow

 Capacitors-stores charge

 Diodes-allows current to flow in only one direction

 Transistors-switches and/or amplifies current.

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7
Circuit Integration of Semiconductors -Integration Eras

• Increase in chip performance

 Components per chip
Semiconductor trends:  Power consumption
• Increase in chip reliability
• Reduction in chip price
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 A Brief History of Integrated Circuits(ICs)
 1958: First integrated circuit-oscillator IC (5 components)

 Flip-flop using two transistors

 Built by Jack Kilby at Texas Instruments

 1961: First planar IC (transistor+R+C) invented by Noyce

 1971

 1000 transistors and 1 MHz operation 1961

 1974

 4500 transistors

Intel 4004 Micro-Processor(1971) Intel 8080 Micro-Processor(1974) 9

 2000
42 million transistors
1.5 GHz
 2010 Intel Pentium (IV) microprocessor(2000)

– Intel Core i7 mprocessor

• 2.3 billion transistors
– 64 Gb Flash memory
• > 16 billion transistors

[Trinh09]© 2009 IEEE.

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8 metal layers-over the past 25 years

Evolution of wafer size

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 Devices and layers from a silicon ship
ICs have four layers:
Layer one:~400µm thickness- Si
substrate
Layer two (conductive layer):~5-25µm
thickness-dopants are introduced.
Layer three (insulation layer):~0.02-
2µm thickness- impurities don’t diffuse
in the IC. E.g. SiO2
Layer four (usually called Al
layer):~1µm thickness- used to
interconnect different components (i.e,
diodes or transistors) 12
 Many Chips
A single integrated circuit, also known as a die, chip, and microchip.

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 Overview of IC Technology
• An integrated circuit consists of hundreds, thousands, or millions of
microscopic electronic devices (i.e, transistors, resistors, and capacitors)
that have been fabricated and electrically interconnected on the surface of
a silicon chip.
• A chip is a square or rectangular flat plate that is about 0.5 mm (0.020 in)
thick and typically 5 to 25 mm (0.2 to 1.0 in) on a side.
• Each electronic device (e.g., transistor) on the chip surface consists of
separate layers and regions with different electrical properties combined
to perform the particular electronic function of the device.

Cross-section of a transistor (specifically, a MOSFET)

in an integrated circuit. Approximate size of the
device is shown; feature sizes within the device can
be less than 1 µm with current technology.

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• The fabrication of ICs is an art. From the age of large-scale integration (LSI) to
very large-scale integration (VLSI), the device dimension has reduced by a large
amount but at the same time 100% of its switching speed has increased.
• Ultra large-scale integration (ULSI) is used for low dimensional nanostructure
devices.
• Nowadays, the use of molecular beam epitaxy (MBE), metal oxide chemical
vapor deposition (MOCVD) and chemical bath deposition (CBD), make it possible
to fabricate the nanostructure semiconductor devices in the form of quantum
well, quantum wire and quantum dot.
• Nanodevices are typically 1-100 nm (in each direction) in dimension. The smaller
the devices, the greater the challenge of fabrication.
• As shown from the Fig., there has been a market shift from bipolar to the MOS
technology.
• With devices getting smaller and smaller, the number of their
components/chips has been increasingly getting bigger and bigger.

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 Types of Integrated Circuits
1. Monolithic ICs
 In the monolithic ICs, the entire circuit is built into a single piece of
semiconductor chip, which consists of active and passive components.
 The most commonly used ICs, microprocessors, memories, etc, are all
monolithic
2. Hybrid ICs
 In the hybrid IC, the electronic circuit is generally integrated in the
ceramic substrate using various components and then enclosed in the
single package.
 The hybrid IC consists of several monolithic ICs connected by metallic
interconnector mounted on a common substrate.
 Hybrid IC technology bonds various substrates either at the die level or
wafer level. This technology streamlines the connections between
different semiconductor chips by replacing wire bonding.
 This process achieves an accelerated, streamlined, and less costly process.
 Hybrid IC allows increase in communication bandwidth and facilities
higher system yield.

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 Advantages and disadvantages of Integrated Circuits
Advantages of ICs
 Small in size due to the reduced device dimension

 Low weight due to the small size

 Low power requirement due to lower dimension and lower threshold power
requirement

 Low cost due to large-scale production

 High reliability due to the absence of a solder joint.

 Facilitates integration of large number of devices

 Improves the device performance even at high frequency region

Disadvantages of ICs
 IC resistors have a limited range

 Generally inductors (L) and transformers cannot be formed using IC

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 Scale of Integration
• Historically, the 1st semiconductor IC chips held one diode/transistor.

• Advancement of technology enabled us to add more and more

transistors.

• The 1st to arrive was small scale integration (SSI) and then improvements

in technique led to devices with hundreds of logic gates-large-scale

integration (LSI).

• Present day micro-processors have millions of logic gates and transistors.

• Moore’s law is responsible for smaller, cheaper and more efficient IC.

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 Semiconductor memory devices

NVSM): non-volatility high device density, low power consumption, electrical

rewritability
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 Moore’s law for microprocessors
• The number of transistors on a chip double every 12(18) months.

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21
• Moore’s Law

Original contact transistor

1947
~cm

Transistor
in Integrated circuit
Nowadays
~micrometer

CNT Transistor
Moore’s Law plot of transistor size versus year Future
~nanometer

To meet the Moore’s Law, the size of transistor should be decreased

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 Silicon Processing
• Microelectronic chips are fabricated on a substrate of semiconductor
material.
• Silicon is the leading semiconductor material today, constituting more
than 95% of all semiconductor devices produced in the world.
• Preparation of silicon substrate can be divided into three steps:
1. Production of electronic grade silicon (EGS)
2. Crystal growing
3. Shaping of Si into wafers
• Silicon is one of the most abundant materials in the earth's crust,
occurring naturally as silica (e.g., sand) and silicates (e.g., clay)
• Principal raw material for silicon is quartzite, which is very pure SiO2
• Electronic grade silicon (EGS) is polycrystalline silicon of ultra high purity -
so pure that impurities are measured in parts per billion (ppb).

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 Sand to Wafer

• Quartz sand: mainly SiO2

• Sand to Crude silicon or metallic grade silicon (MGS): it

requires very high T because the Si-O bond is strong; SiO2 is
very stable.
2000oC
SiO2 + C Si + CO2
Sand MGS (98 to 99% purity)

• MGS is a polycrystalline Si

• MGS has a high impurity concentration and must be purified

for use in semiconductor device manufacturing.
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 Silicon purification
• First, crude Si is ground into a fine powder and then react it with
HCl to form trichlorosilane (TCS, SiHCl3) vapor

300oC
Si + 3HCl SiHCl3 + H2
MGS TCS

• TCS vapor then passes through a series of filters, condensers, and

purifiers to reach ultrahigh-purity liquid TCS, with purity as high as
99.9999999%

• High-purity TCS is most commonly used Si precursors for Si

deposition. It is widely applied to amorphous Si, polycrystalline Si
(polysilicon for short), and epitaxial Si depositions.
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 Silicon Purification I

Hydrochloride Reactor,
300 C

Si + HCl Silicon
 TCS Powder

Condenser
Filters

Pure TCS with

Purifier
99.9999999%

www2.austin.cc.tx.us/HongXiao/Book.ht
26
m
• React TCS to H2 to form polysilicon (EGS)
1100oC
• SiHCl3 + H2 Si + 3HCl
TCS EGS

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 Silicon Purification II
The high-purity polycrystalline silicon is called electronic-grade silicon (EGS)

Process
Chamber
EGS
H2

H2 and TCS

Liquid
TCS TCS+H2EGS+HCl

Carrier gas
bubbles

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 Electronic Grade Silicon (EGS)

Source:
http://www.fullman.com/semiconductors/_polysilicon.html
www2.austin.cc.tx.us/HongXiao/Book.ht
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m
 Processing Sequence for Silicon-based ICs
• Silicon processing - sand is reduced to very pure silicon and then shaped into
wafers.
• IC fabrication - processing steps that add, alter, and remove thin layers in
selected regions to form electronic devices.
• Lithography is used to define the regions to be processed on wafer surface.
• IC packaging - wafer is tested, cut into individual chips, and the chips are
encapsulated in an appropriate package.

Sequence of processing steps in the production of integrated circuits: (1) pure silicon
is formed from the molten state into an ingot and then sliced into wafers; (2)
fabrication of integrated circuits on the wafer surface; and (3) wafer is cut into chips
and packaged. 30
 Stages of IC fabrication
At the highest level, the manufacture of ICs may be broken up to 5 major steps:

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Preparation of silicon wafers

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 Types of IC chips

 The planar technology for IC fabrication consists of the following processes:

1. Crystal growth of the wafer

2. Epitaxial growth

3. Oxidation

4. Photolithography

5. Etching

6. Diffusion

7. Ion implantation

8. Metallization

9. Testing and packaging

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 Crystal Growing
• The silicon substrate for microelectronic chips must be made of a single
crystal whose unit cell is oriented in a certain direction.
• The silicon used in semiconductor device fabrication must be of ultra high
purity.
• The substrate wafers must be cut in a direction that achieves the desired
planar orientation.
• Most widely used crystal growing method is the Czochralski process, in
which a single crystal boule is pulled upward from a pool of molten
silicon.

Czochralski process for growing single crystal ingots of silicon: (a) initial setup prior to start of crystal pulling,
and (b) during crystal pulling to form the boule 34
 Shaping of Silicon into Wafers
• Processing steps to reduce the boule into thin, disc-shaped wafers
1. Ingot (boule) preparation
• The ends of the boule are cut off
• Cylindrical grinding is used to shape the boule into a more perfect cylinder
• One or more flats are ground along the length of the boule, whose functions, after
the boule is cut into wafers, are the following:
 Identification
 Orientation of ICs relative to crystal structure
 Mechanical location during processing

Grinding operations used in shaping the silicon ingot: (a) a form of cylindrical grinding provides
diameter and roundness control, and (b) a flat ground on the cylinder
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2. Wafer slicing
• A very thin ring-shaped saw blade with diamond grit bonded to internal
diameter is the cutting edge
 The Internal Diameter (ID) is used for slicing rather than the outside
diameter (OD) for better control over flatness, thickness, parallelism, and
surface characteristics of the wafer
• Wafers are cut ~0.5-0.7 mm (0.020-0.028 in.) thick, greater thicknesses for
larger wafer diameters
 To minimize kerf loss, blades are made very thin: about 0.33 mm (0.013
in.)

Wafer slicing using a diamond abrasive cut-off saw

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3. Wafer preparation
• Wafer rims are rounded by contour-grinding wheel to reduce
chipping during handling.

• Wafers are chemically etched to remove surface damage

from slicing

• A flat polishing operation is performed to provide surfaces of

high smoothness for photolithography processes to follow

• Finally, the wafer is chemically cleaned to remove residues

and organic films

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 Fabrication steps for different circuits
fabrication of resistors in IC

• Resistors in IC can be made by the base diffusion method. The resistor is

made up of a p-layer within one n-type island or the reverse.

• Resistance (R) =ρ*L/A,

where, ρ is the resistivity,

l= length and A =area

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 Difference between Ohomic contact and Schottky contact

 SCHOTTKY diode or contact is a metal-

semiconductor diode or contact having
characteristics similar to a p-n junction.
• When the metal deposited directly on the
semiconductor surface, the SCHOTTKY contact is
produced.
 The junction of the metal semiconductor, the
same metal-doped layer, produces a linear
behavior, i.e., OHOMIC behavior.
• The junction that follows ohm’s law, i.e., linear
nature in I-V characteristics forms an OHOMIC
CONTACT.
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 The applications of Schottky contact
• Electron availability is very high in the metal as the Schottky
diode is made with the directly deposited metal on
semiconductor surface.

• Schottky diode is a majority carrier device. As the time of

injection of the electrons from conduction band to metal
decreases, the switching becomes faster. This diode has low
reverse and forward impedances. So, it is used in high-speed
switching devices.

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 Steps of fabrication of capacitors
• In ICs, capacitors are fabricated using the depletion region capacitance of a
reverse bias p-n junction, or by MOS structure.

• In case of junction, or the magnitude depends on the dimension and type of the
junction, and the applied bias. A depletion capacitance can be formed using MOS
structure. A parallel plate capacitor is obtained by MOS technique.

• A pair of n layers is deposited to form source (S) and drain (D).

• A thin SiO2 layer acts as the dielectric layer.

• The heavily doped n-region and the Al layers act as the two plates of the capacitor.
The magnitude of the capacitance is generally very small, in the order of pico-
farad.

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 Steps of fabrication of the transistor circuit
• A step-by-step process will now be followed for the fabrication of a
transistor circuit

Step-I: On the p-type substrate a layer of n-type semiconductor is formed.

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• Step-II: Photolithographic process using UV ray source.

• Step-III: The p diffusion at the window region is done by ion implantation

technique or by chemical deposition.

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• Step-IV: Again, to form a p-region within n-region, another set of masks
are used, and the second step of photolithography is formed.

• Step-V: the third-level of mask is used to get the pattern.

• Multiple types of masks and subsequent photolithography is done to
achieve the desired complicated circuit.

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• Step-VI: Before metallization, the metal mask of the desired pattern is
used. In this mask, the blank space is kept where we want to go for
metallization.

• Step-VII: Metal interconnections for different contact points are used.

• Metallization is performed at a very low pressure, at about 106 torr. Total
metallization is formed in a closed chamber and the room should be
clean. High pure Au or Al is used for metallization. Purity is 99.9999%.

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 The Schottky Diode
• In Fig., terminal 1 forms the ohmic contact, because Al is deposited on the
n region and not on the n-region, but terminal 2 forms Schottky contact.
The Schottky contact together with the two terminals forms the Schottky
diode.

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 Schematic diagram of a CMOS circuit
• The Figure shows that one nMOS and one
pMOS are placed on a common substrate. It
looks like two tubs are placed on a same
base. The source, gate and drain are
indicated by S, G and D, respectively.
• With the help of twin-tub method, a
complete CMOS can be realized.

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 Real –life applications

• In our daily life ICs are applied everywhere. In addition to their wide use in
computers and mobile phones

• ICs are mostly used in optoelectronic devices-LED, LASER, Modulator,

Demodulator, set-top box, etc. even a calling bell uses an IC with music
encoded in it.

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