Inverters

Question 1 WRONG

The output voltage of a single-phase full bridge voltage source inverter is controlled by unipolar PWM with one pulse per half cycle.
For the fundamental rms component of output voltageto be 75% of DC voltage, the required pulse width in degrees (round off up to
one decimal place) is _________

82.6

B 98.6

112.8

D 168.2

GATE EE 2019 Power Electronics

Question 1 Explanation: 
2 2
V01,rms =
​

​ ​

π
0.9 sin d Vs = 0.75Vs
​ ​

d = 56.44∘
​ ​

2d = 112.88∘
Pulse width  = 112.88∘

Question 2 WRONG
The figure below shows a half-bridge voltage source inverter supplying an RL-load with R = 40Ω and L = ( 0.3 π )H . The desired
​

fundamental frequency of the load voltage is 50 Hz. The switch control signals of the converter are generated using sinusoidal pulse
width modulation with modulation index. M = 0.6. At 50 Hz, the RL-load draws an active power of 1.44 kW. The value of DC source
voltage VDC in volts is
​

300 2 ​

B 500

500 2 ​

D 1000 2 ​

GATE EE 2017-SET-2 Power Electronics

Question 2 Explanation: 

V
 Vs
V01peak = M ⋅ M → Modulation index
​

2
​ ​

M⋅ Vs
2
​

Vs
V01peak = =M⋅
​
​

2 2 2
​ ​ ​

​ ​

​ ​

0.6Vs
=
​

V01peak
2 2
​ ​

0.3
V01 = Vs
2
​ ​ ​

∣Z1 ∣ = R2 + (ωL)2 ​ ​

= 402 + (2πf L)2 ​

0.3 2
= 402 + (2π × 50 × )
π
​ ​

402 + 302 = 50 = ​

ωL 30
ϕ1 = tan−1 = tan−1 = 36.896∘
40
​ ​ ​

R
Active power = V01 I01 cos ϕ ​
​ ​

V01
= V01 cos ϕ
​

∣Z1 ∣
​ ​

2
0.3 1
1.44 × 10 = (
3
Vs ) ⋅ (cos 36.896∘ )
2 50
​ ​ ​

1.44 × 103 × 100

∴ Vs2 =
0.32 (0.8)
​ ​

= 20 × 105
Vs = ​ 2 ⋅ 103 = 1000 2
​ ​

Vs
VDC = = 500 2 V
​

2
​ ​ ​

Question 3 WRONG

A three-phase voltage source inverter with ideal devices operating in 180∘ conduction mode is
feeding a balanced star-connected
resistive load. The DC voltage input is Vdc . The peak of the
fundamental component of the phase voltage is ​

Vdc ​

π ​

2Vdc ​

π ​

C 3Vdc
π
​

D 4Vdc
π
​

GATE EE 2017-SET-2 Power Electronics

Question 3 Explanation: 
3 − ϕ  VSI 180∘  mode:

/
 6Vdc /3
VRn = sin nωt
​

nπ
​ ​

2 × Vdc
= sin nωt
​

nπ
​ ​

2Vdc
= sin ωt
​

VRn
π
​ ​

Question 4 WRONG
In the converter circuit shown below, the switches are controlled such that the load voltage vo (t)
is a 400 Hz square wave.
The RMS
​

value of the fundamental component of vo (t) in volts is _______. ​

220

B 440

198

D 110

GATE EE 2017-SET-1 Power Electronics

Question 4 Explanation: 

4Vs 4×220
V01 =
​

2π
​
​

​ = 2π ​
​ = 198.06V

Question 5 WRONG

A 3-phase voltage source inverter is supplied from a 600V DC source as shown in the figure
below. For a star connected resistive load
of 20 Ω per phase, the load power for 120∘ device conduction, in kW is __________.

18

9
 245
C
D 90

GATE EE 2017-SET-1 Power Electronics

Question 5 Explanation: 

1 2π
Vrms = (300)2
3
​ ​ ​ ​

π
2
= 300 = 244.94V
3
​ ​

​ ​

V2 3 × (244.94)2
3 = = 9kW
R 20
​ ​

Question 6 WRONG
A three-phase Voltage Source Inverter (VSI) as shown in the figure is feeding a delta connected resistive load of 30 Ω/phase. If it is fed
from a 600 V battery, with 180∘ conduction of solid-state devices, the power consumed by the load, in kW, is __________.

10

B 20

24

D 30

GATE EE 2016-SET-2 Power Electronics

Question 6 Explanation: 
2
VL = Vph = Vs
3
​ ​ ​ ​ ​

2
Vph = × 600
3
​ ​ ​

​ ​

2
Vph 3 × 23 × 6002
P =3 =
​
​

30
​ ​

R
= 24kW

Question 7 WRONG

A single-phase full-bridge voltage source inverter (VSI) is fed from a 300 V battery. A pulse of 120∘ duration is used to trigger the
appropriate devices in each half-cycle. The rms value of the fundamental component of the output voltage, in volts, is
 234

245

C 300

D 331

GATE EE 2016-SET-1 Power Electronics

Question 7 Explanation: 
2 2
V01(rms) = Vs ⋅ sin d
​

π
​ ​ ​

Pulse width where 2d = 120∘
d = 60∘
2 2
​ ​

= Vs sin 60∘
​

V01(rms)
π
​ ​ ​

2 2 3
= = 234V
​ ​

Vs
2
​ ​ ​

Question 8 CORRECT

The switches T1 and T2 in Figure (a) are switched in a complementary fashion with sinusoidal
pulse width modulation technique. The
modulating voltage vm (t) = 0.8 sin(200πt)V and the triangular carrier voltage (vc ) are as shown in Figure (b). The carrier frequency
​ ​

is 5 kHz. The peak value of the 100 Hz component of the load current (iL ), in ampere, is ________ .
​

10

B 100

C 150

D 20

GATE EE 2016-SET-1 Power Electronics

Question 8 Explanation: 
 ma = 0.8
​

Vd
(V01 )peak = ma [ma ≤ 1]
​

2
​ ​ ​ ​ ​

= 0.8 × 250 = 200V

(V01 )peak
(I01 )peak =
​ ​

Z1
​ ​ ​
​ ​

200
=
R + (ωL)2
2
​

200
= = 10A
122 + 162
​

Question 9 WRONG
The single-phase full-bridge voltage source inverter (VSI), shown in figure, has an output frequency of 50 Hz. It uses unipolar pulse
width modulation with switching frequency of 50 kHz and modulation index of 0.7. For Vin =100 V DC, L=9.55 mH, C=63.66 μF, and ​

R=5 Ω, the amplitude of the fundamental component in the output voltage Vo (in Volt) under steady-state is ________. ​

12.25

B 40.25

62.75

D 82.75

GATE EE 2015-SET-1 Power Electronics

Question 9 Explanation: 
The rms value of the fundamental component of output voltage,
Vs
VR1 = × mi
​

2
​ ​ ​

100
​ ​

= × 0.7 = 49.49V
2
​

Amplitude of the value is peak value (i.e.)

VRpeak = 2 × 49.49 = 70V
​
​ ​

VRpeak is the amplitude of fundamental voltage at the VSI. V0(peak) is the amplitude of fundamental voltage at the resistor.
​
​
​
​

R(−jXC )
Z=
​

R − XC j
​

5(−j50)
=
5 − j50
​

= 4.97∠ − 5.71∘ Ω
1
where, XC = ​ ​

ωC
1
=
2π × 50 × 63.66 × 10−6
​

​ ​

= 50Ω
XL = ωL ​

= 2π × 50 × 9.55 × 10−3
= 3Ω
4.97∠ − 5.71∘
V0(peak) = VRpeak ×
(4.97∠ − 5.71∘ ) + j3
​ ​ ​
​

= 62.75∠ − 32.5∘ V
 Therefore, the amplitude of the fundamental component in the output voltage,
V0 = 62.75V
​

Question 10 WRONG
A single-phase voltage source inverter shown in figure is feeding power to a load.
The triggering pulses of the devices are also shown
in the figure.

If the load current is sinusoidal and is zero at 0, π, 2π.., the node voltage VAO has the waveform
​

B B

C C

GATE EE 2014-SET-3 Power Electronics

Question 10 Explanation: 
θ ≤ ωt ≤ π − θ (S11 S4 → ON ) ​ ​

VDC
VA = VDC , V0 =
​

2
​ ​ ​ ​

VDC ​

VAO = (π − θ < ωt < z)

​

2
​ ​
 VA = 0
​

VDC
VAO = V ⋅ 0 −
​

2
​ ​

​ ​

VDC
=−
​

2
​

π + θ ≤ ωt ≤ 2π

VA = 0, V0 =
​ ​
Vd
2
​

​
Question 11 CORRECT

The figure shows one period of the output voltage of an inverter. α should be
chosen such that 60∘ < α < 90∘ . If rms value of the fundamental
component is 50V, then α in degree is _____.

A 42.35

77.15

C 82.15

D 98.35

GATE EE 2014-SET-1 Power Electronics

Question 11 Explanation: 
The output voltage V0 can be reprresnted by fourier series as under:
​

∞
V0 =
​ ∑ ​ an cos nωt + bn sin nωt
​ ​

n=1,3,5,...
T
2
where, an = ∫ f (t) cos nωt d(ωt)
T 0
​ ​ ​

2 T
bn = ∫ f (t) sin nωt d(ωt)
​ ​ ​

T 0
180∘ −α
1 α
an = [∫ 100 cos ωt d(ωt) + ∫
​ ​ ​ (−100) cos ωt d(ωt) ​

π 0 α
180∘ 180∘ +α
+∫ ​ 100 cos ωt d(ωt) + ∫ (−100) cos ωt d(ωt)
​

180∘ −α 180∘
360∘ −α 360∘
+∫ ​ 100 cos ωt d(ωt) + ∫ (−100) cos ωt d(ωt)]
​

180∘ +α 360∘ −α
100
an = [sin α − sin(180∘ − α) + sin α
π
​ ​

+ sin(180∘ ) − sin(180∘ − α)
− sin(180∘ + α) + sin 180∘
+ sin(360∘ − α) − sin(180∘ + α)
− sin(360∘ ) + sin(360∘ − α)]
​ ​

an = 0
​

∘
180 −α
1 α
bn = [∫ 100 sin ωt d(ωt) + ∫
​ ​ ​
(−100) sin ωt d(ωt)
​

π 0 α
180∘ 180∘ +α
+∫ ​ 100 sin ωt d(ωt) + ∫ (−100) sin ωt d(ωt)
​

180∘ −α 180∘
360∘ −α 360∘
+∫ ​ 100 sin ωt d(ωt) + ∫ (−100) sin ωt d(ωt)]
​

180∘ +α 360∘ −α
100
bn = [− cos α + 1 + cos(180∘ − α) − cos α
π
​ ​

− cos(180∘ ) + cos(180∘ − α)
+ cos(180∘ + α) − cos 180∘
− cos(360∘ − α) + cos(180∘ + α)
+ cos(360∘ ) − cos(360∘ − α)]
100
bn = [4 − 8 cos α] = 50 2
π
​ ​ ​

cos α = 0.22231 = 77.15∘

Question 12 WRONG
The Voltage Source Inverter (VSI) shown in the figure below is switched to provide a 50 Hz, square-wave
ac output voltage (vo ) across an R-L load.
​

Reference polarity of vo and reference direction of the output

current io are indicated in the figure. It is given that R = 3Ω, L = 55.9 mH.
​ ​
Appropriate transition i.e., Zero Voltage Switching (ZVS)/Zero Current Switching (ZCS) of the
IGBTs during turn-on/turn-off is

ZVS during turn off

B ZVS during turn-on

C ZCS during turn off

ZCS during turn-on

GATE EE 2013 Power Electronics

Question 13 WRONG
The Voltage Source Inverter (VSI) shown in the figure below is switched to provide a 50 Hz, square-wave
ac output voltage (vo ) across an R-L load.
​

Reference polarity of vo and reference direction of the output

current io are indicated in the figure. It is given that R = 3Ω, L = 55.9 mH.
​ ​

In the interval when vo < 0and io > 0 the pair of devices which conducts the load current is
​ ​

A Q1 , Q2
​ ​

B Q3 , Q4
​ ​

D1 , D2
​ ​

D3 , D4
​ ​

GATE EE 2013 Power Electronics

Question 13 Explanation: 
As V0 < 0, (Q3 , D3 ) and (Q4 , D4 ) should work.
​ ​ ​ ​ ​

Also P = v0 i0 ​ ​

As I0 > 0
​

P <0
Power is being feedback.
so D3  and D4 are working.
​ ​

Question 14 WRONG

In the 3-phase inverter circuit shown, the load is balanced and the gating scheme is 180∘ -conduction mode.
All the switching devices are ideal.

If the dc bus voltage Vd =300 V, the power consumed by 3-phase load is

​
 1.5kW
A
B 2.0kW

2.5kW

3.0kW

GATE EE 2012 Power Electronics

Question 14 Explanation: 
Power consumed by each resistor
V2 2
P = Rp = (141.4) = 1000W
​

20
​ ​

Total power consumed =3P=3kW

Question 15 WRONG

In the 3-phase inverter circuit shown, the load is balanced and the gating scheme is 180∘ -conduction mode.
All the switching devices are ideal.

The rms value of load phase voltage is

A 106.1V

141.4V

212.2V

D 282.8V

GATE EE 2012 Power Electronics

Question 15 Explanation: 
RMS value of line voltage
1/2
VL = [ π1 ∫0 Vs2 d(ωt)]
2π/3 2
​ ​ ​ ​ = 3 Vs
​
​ ​

Therefore, RMS value of load phase voltage

Vp = VL3 = 32 Vs = 300×
​
​

3
2
​

​
= 141.4V ​

​ ​
​

Question 16 CORRECT
A three phase current source inverter used for the speed control of an induction
motor is to be realized using MOSFET switches as shown below.
Switches S1 to S6 are identical switches.
​ ​

The proper configuration for realizing switches S1 to S6 is ​ ​

 A
A
B B

D D

GATE EE 2011 Power Electronics

Question 16 Explanation: 
Device used in current source inverter (CSI) must have reverse voltage bloking capacity. Therefore, device such as GTOs, power transistors and power MOSFETs canot
be used in a CSI. SO, a diode is added in series with the devices for reverse blocking.

Question 17 WRONG

The Current Source Inverter shown in figure is operated by alternately turning on

thyristor pairs (T1 , T2 ) and (T3 , T4 ). If the load is purely resistive, the
​ ​ ​ ​

theoretical
maximum output frequency obtainable will be

A 125kHz

250kHz

500kHz

D 50kHz

GATE EE 2009 Power Electronics

Question 17 Explanation: 
The circuit shown in the figure is a single phase bridge auto sequential commutated inverter (1-phase ASCI).
Thyristor pairs T1 , T2  and T3 , T4 are alternatively switches to obtain a nearly square wave load current. Two commutating capacitors, one C1 in the upper half and
​ ​ ​ ​ ​

the other C2 in the lower half are connected as shown.

​

Diodes D1 to D4 are connected in series with each SCR to prevent the commutation capacitors from discharging into the load.
​ ​

THe inverter output frequency is controlled by adjusting the period T through the triggering circuits of thyristors.
The theoretical maximum output frequency obtainable
1 1
fmax = 4RC
​ = 4×10×0.1×10
​

−6 = 250kHz​

Question 18 WRONG

A single phase source inverter is feeding a purely inductive load as shown in the
figure
The inverter is operated at 50 Hz in 180∘ square wave mode.
Assume that the load current does not have any dc component. The peak value of the inductor current i0 will be ​

A 6.37A

10A

20A
 40A
D
GATE EE 2008 Power Electronics

Question 18 Explanation: 

Load current increases linearly from −IP to IP during 0 < ωt ≤ π , where IP = peak value of i0
​ ​ ​ ​

π π 1
⇒ t1 = = sec
ω 2π50 100
​ ​ ​ ​

At t = 0, i0 = −IP  and t = t1 , i0 = IP

​ ​ ​ ​ ​

di
V0 = L
dt
​ ​

During 0 < ωt ≤ π
V0 = Vs = 200V
​ ​ ​ ​

IP − (−IP )
⇒ 200 = 0.1 ( )
​ ​

t1 − 0
​

200
⇒ 2IP = × t1
0.1
​ ​ ​

2000 1
IP = × = 10A
2 100
​ ​ ​

Question 19 WRONG
A 3-phase voltage source inverter is operated in 180∘ conduction mode. Which one of the following statements is true ?

A Both pole-voltage and line-voltage will have 3rd harmonic components

Pole-voltage will have 3rd harmonic component but line-voltage will be free from 3rd harmonic

Line-voltage will have 3rd harmonic component but pole-voltage will be free from 3rd harmonic

D Both pole-voltage and line-voltage will be free from 3rd harmonic

components

GATE EE 2008 Power Electronics

Question 19 Explanation: 
In 3-phase VSI working in 180∘ mode

Pole voltage is a squre wave.

Therefore 3rd harmonic is present in pole voltage.

In line voltage waveform even and tripplen harmonics are not present.

Question 20 WRONG
A voltage source inverter is used to control the speed of three-phase, 50 Hz, squirrel cage induction motor. Its slip for rated torque is 4%. The flux is
maintained at rated value. If the stator resistance and rotational losses are neglected, then the frequency of the impressed voltage to obtain twice the
rated torque at starting should be

A 10 Hz

5 Hz
 4 Hz

D 2 Hz

GATE EE 2007 Power Electronics

Question 21 CORRECT

A single-phase voltages source inverter is controlled in a single

pulse-width modulated mode with a pulse width of 150∘ in each half cycle. Total
2 −V 2
Vrms
harmonic distortion is defined as T HD = 1
× 100, where V1 is the rms value of the fundamental component of the output voltage. The
​ ​ ​

V1
​ ​

THD of output ac voltage waveform is

A 65.65%

B 48.42%

31.83%

D 30.49%

GATE EE 2007 Power Electronics

Question 21 Explanation: 

Pulse width = 2d = 150∘

⇒ d = 75∘
1 π/2+d 2
Vrms = ∫ V d(ωt)
π π/2−d s
​ ​ ​ ​ ​

​ ​

2d 5
= Vs = Vs = 0.913Vs
π 6
​ ​ ​ ​ ​ ​ ​

Output voltage in fourier series,

∞
V0 = ∑n=1,3,5 4V
​
nπ
nπ sin 2 sin nd sin nωt
s
​
​

​ ​

RMS value of fundamental component of output voltage,

V1 = 12 [ 4Vπ s sin 75∘ ] = 0.87Vs
​ ​

​
​

​ ​

Total harmonic Distortion,

2 −V2
Vrms 1
T HD = × 100
​ ​

V12
​ ​

(0.913Vs )2 − (0.87Vs )2 ​

= × 100
​ ​

(0.87Vs )2
​ ​

= 31.83%

Question 22 WRONG
"Six MOSFETs connected in a bridge configuration (having no other power
device) must be operated as a Voltage Source Inverter (VSI)". This statement
is

A True, because being majority carrier devices MOSFETs are voltage driven.

True, because MOSFETs hav inherently anti-parallel diodes

C False, because it can be operated both as Current Source Inverter (CSI) or

a VSI

False, because MOSFETs can be operated as excellent constant current

sources in the saturation region.

GATE EE 2007 Power Electronics

Question 22 Explanation: 
As MOSFET have internally antiparallel diodes, MOSFET can not withstand reverse voltage , due to which MOSFET can not be as current source inverter (CSI).

Question 23 WRONG
A single-phase inverter is operated in PWM mode generating a
single-pulse of width 2d in the centre of each half cycle as shown in figure. It is
found
that the output voltage is free from 5th harmonic for pulse width 144∘ . What
will be percentage of 3rd harmonic present in the output voltage (
Vo3 /Vo1max
) ?
​ ​

0.00%

19.60%

C 31.70%

D 53.90%

GATE EE 2006 Power Electronics

Question 23 Explanation: 
( VV0301 )
4Vs ​

sin 3d
= 3π
= 19.6%
​

​ ​

4Vs ​
​

max
​

π ​

Question 24 WRONG

The output voltage waveform of a three-phase square-wave inverter contains

A only even harmonics

both odd and even harmonic

only odd harmonics

D only triple harmonics

GATE EE 2005 Power Electronics

Question 24 Explanation: 
The output voltage in both 180∘ and 120∘ conduction mode can be described by the fourier series as follow:
In 180∘ conduction mode,
line output voltage
∞
Vab = ∑n=1,3,5 4V
​
nπ
​
π
nπ cos 6 sin n (ωt + 6 ) ...(i)
s ​

​ ​ ​

line to neutral output voltage

Va0 = ∑∞
​
2Vs
n=6k±1 nπ sin nωt ...(ii) ​
​

where k=0,1,2,...
In 120∘ conduction mode
line to neutral output voltage
∞
Va0 = ∑n=1,3,5 2V
​
nπ
​
π
nπ cos 6 sin n (ωt + 6 ) ...(iii)
s ​

​ ​ ​

Line output voltage

Vab = ∑∞
​
3Vs
n=6k±1 nπ sin n (ωt + 3 ) ...(iv)
π
​
​

​ ​

where k=0,1,2...
It is clear from equation (i) to (iv), output voltage wave form contains only odd-harmonic.

Question 25 CORRECT

With reference to the output wave form given in the figure, the output of
the converter will be free from 5th harmonic when

α = 72∘

α = 36∘
 B
C α = 150∘

D α = 120∘

GATE EE 2003 Power Electronics

Question 25 Explanation: 
To eliminate fifth harmonic,
π 2π
5d = 0, π, 2π ⇒ d ⇒ 0, ,
5 5
​ ​

2π 4π
∴ Pulse width  = 2d = α = 0,
​

, ​

5 5
​ ​

= (0∘ , 72∘ , 144∘ )

Question 26 CORRECT
An inverter has a periodic output voltage with the output wave form as shown
in figure

When the conduction angle α = 120∘ , the rms fundamental component of the output voltage is

0.78 V

B 1.10 V

C 0.90 V

D 1.27 V

GATE EE 2003 Power Electronics

Question 26 Explanation: 

Output voltage,
V0 = ∑∞
​
4Vs
n=1,3,5... nπ sin nd sin 2 sin nωt
nπ
​
​

​ ​

R.M.S. value of fundamental component, n=1

= 4V2sπ sin d × 1
​
​

α = 120, ∴ 2d = 120∘ , ∴ d = 60∘

= 4V2sπ sin 60∘ = 0.78Vs = 0.78V
​
​

​ ​

Question 27 WRONG
Figure shows an inverter circuit with a dc source voltage Vs . The
semiconductor switches of the inverter are operated in such a manner that the
pole
​

voltages V10 and V20 are as shown in figure. What is the rms value of
the pole-to-pole voltage V12 ?
​ ​ ​

Vs ϕ ​

π 2
​
 ϕ
Vs ​

π ​ ​

C Vs ​
ϕ
2π ​ ​

D Vs
π
​

GATE EE 2002 Power Electronics

Question 27 Explanation: 

V12 = V10 − V20

​ ​ ​

ϕ
Vrms = Vs
​ ​

​ ​ ​ ​

Question 28 CORRECT
A single-phase full-bridge voltage source inverter feeds a purely inductive load, a
shown in figure, where T1 , T2 , T3 , T4 are power transistors and D1 ,
​ ​ ​ ​

D2 , D3 , D4 are
feedback diodes. The inverter is operated in square-wave mode with a frequency of 50
Hz. If the average load current is zero, what is
​ ​ ​

the time duration of conduction of each

feedback diode in a cycle?

5 msec

B 10 msec

C 20 msec

D 2.5 msec

GATE EE 2001 Power Electronics

Question 28 Explanation: 
Conduction time = T4 = 204 = 5 ms ​ ​