TMC2660 Datasheet Rev1.07

POWER DRIVER FOR STEPPER MOTORS INTEGRATED CIRCUITS
TMC2660 DATASHEET
Universal, cost-effective stepper driver for two-phase bipolar motors with state-of-the-art features.
Integrated MOSFETs for up to 4 A motor current per coil. With Step/Dir Interface and SPI.
APPLICATIONS
Textile, Sewing Machines
Factory Automation
Lab Automation
Liquid Handling
Medical
Office Automation
Printer and Scanner
CCTV, Security
ATM, Cash recycler
POS
Pumps and Valves
Heliostat Controller
CNC Machines
FEATURES AND BENEFITS
Drive Capability up to 4A motor current
Voltage up to 30V DC DESCRIPTION
Highest Resolution up to 256 microsteps per full step The TMC2660 driver for two-phase stepper
motors offers an industry-leading feature
Compact Size 10x10mm QFP-44 package set, including high-resolution
Low Power Dissipation, very low RDSON & synchronous microstepping, sensorless mechanical load
rectification measurement, load-adaptive power
EMI-optimized programmable slope optimization, and low-resonance chopper
operation. Standard SPI™ and STEP/DIR
Protection & Diagnostics overcurrent, short to GND, interfaces simplify communication.
overtemperature & undervoltage Integrated power MOSFETs handle motor
stallGuard2™ high precision sensorless motor load detection currents up to 2.2A RMS continuously or
2.8A RMS boost current per coil. Integrated
coolStep™ load dependent current control for energy savings
protection and diagnostic features support
up to 75%
robust and reliable operation. High
microPlyer™ microstep interpolation for increased integration, high energy efficiency and
smoothness with coarse step inputs. small form factor enable miniaturized
spreadCycle™ high-precision chopper for best current sine designs with low external component
wave form and zero crossing count for cost-effective and highly
competitive solutions.
BLOCK DIAGRAM
TRINAMIC Motion Control GmbH & Co. KG

Hamburg, Germany
TMC2660 DATASHEET (Rev. 1.07 / 2020-JUN-09) 2
APPLICATION EXAMPLES: SMALL SIZE – BEST PERFORMANCE

The TMC2660 scores with power density, integrated power MOSFETs, and a versatility that covers a wide
spectrum of applications and motor sizes, all while keeping costs down. Extensive support at the chips,
board, and software levels enables rapid design cycles and fast time-to-market with competitive products.
High energy efficiency from TRINAMIC’s coolStep technology delivers further cost savings in related systems
such as power supplies and cooling.
TMC4210+TMC2660-EVAL EVALUATION-BOARD FOR 1 AXIS
This evaluation board is a development

platform for applications based on the
TMC2660. The board features a USB interface
for communication with the TMCL-IDE control
software running on a PC. The power
MOSFETs of the TMC2660 support drive
currents up to 2.4A RMS and 29V.
The control software provides a user-friendly
GUI for setting control parameters and
visualizing the dynamic response of the
motor.
Motor movement can be controlled through
the Step/Dir interface using inputs from an
external source or signals generated by the
onboard microcontroller acting as a step
Evaluation board system with TMC2660 generator. Optionally add a motion controller
card between CPU board and TMC2660-EVAL.
Top level layout of TMC2660-EVAL
ORDER CODES
Order code PN Description Size [mm²]
TMC2660-PA 00-0114
coolStep™ driver with internal MOSFETs, up to 30V DC, 10 x 10
QFP-44 with 12x12 pins
TMC2660-PA-T 00-0114-T -T devices are packaged in tape on reel
TMC2660-EVAL 40-0068 Evaluation board for TMC2660. 85 x 55
LANDUNGSBRÜCKE 40-0167 Baseboard for TMC2660-EVAL and further evaluation 85 x 55
boards
ESELSBRÜCKE 40-0098 Connector board for plug-in evaluation board system 61 x 38
www.trinamic.com
TABLE OF CONTENTS
1 PRINCIPLES OF OPERATION ............... 4 11.2 OPEN-LOAD DETECTION .............................. 39
11.3 OVERTEMPERATURE DETECTION ................... 39
1.1 KEY CONCEPTS ............................................... 4 11.4 UNDERVOLTAGE DETECTION......................... 40
1.2 CONTROL INTERFACES .................................... 5
1.3 MECHANICAL LOAD SENSING ......................... 5 12 POWER SUPPLY SEQUENCING .......... 41
1.4 CURRENT CONTROL ........................................ 5 13 SYSTEM CLOCK ...................................... 41
2 PIN ASSIGNMENTS ................................. 6 13.1 FREQUENCY SELECTION ................................ 42
2.1 PACKAGE OUTLINE ......................................... 6 14 LAYOUT CONSIDERATIONS ............... 43
2.2 SIGNAL DESCRIPTIONS .................................. 6
14.1 SENSE RESISTORS........................................ 43
3 INTERNAL ARCHITECTURE.................... 8 14.2 POWER MOSFET OUTPUTS......................... 43
4 STALLGUARD2 LOAD MEASUREMENT 9 14.3 POWER SUPPLY PINS .................................. 43
14.4 POWER FILTERING ....................................... 43
4.1 TUNING THE STALLGUARD2 THRESHOLD ......10 14.5 LAYOUT EXAMPLE ........................................ 44
4.2 STALLGUARD2 MEASUREMENT FREQUENCY
AND FILTERING ............................................11 15 ABSOLUTE MAXIMUM RATINGS ....... 45
4.3 DETECTING A MOTOR STALL ........................11 16 ELECTRICAL CHARACTERISTICS ....... 46
4.4 LIMITS OF STALLGUARD2 OPERATION .........11
16.1 OPERATIONAL RANGE .................................. 46
5 COOLSTEP CURRENT CONTROL .........12 16.2 DC AND AC SPECIFICATIONS ...................... 46
5.1 TUNING COOLSTEP .......................................14 16.3 THERMAL CHARACTERISTICS ........................ 49
6 SPI INTERFACE ......................................15 17 PACKAGE MECHANICAL DATA .......... 50
6.1 BUS SIGNALS...............................................15 17.1 DIMENSIONAL DRAWINGS ........................... 50

6.2 BUS TIMING ................................................15 17.2 PACKAGE CODE ........................................... 50
6.3 BUS ARCHITECTURE .....................................16 18 DISCLAIMER ........................................... 51
6.4 REGISTER WRITE COMMANDS ......................17
6.5 DRIVER CONTROL REGISTER (DRVCTRL) ....18 19 ESD SENSITIVE DEVICE ...................... 51
6.6 CHOPPER CONTROL REGISTER (CHOPCONF) .. 20 TABLE OF FIGURES ............................... 52
...................................................................20
6.7 COOLSTEP CONTROL REGISTER (SMARTEN)21 21 REVISION HISTORY ............................. 52
6.8 STALLGUARD2 CONTROL REGISTER
(SGCSCONF) .............................................22
6.9 DRIVER CONTROL REGISTER (DRVCONF) ...23
6.10 READ RESPONSE ..........................................24
6.11 DEVICE INITIALIZATION ...............................25
7 STEP/DIR INTERFACE ...........................26
7.1 TIMING ........................................................26
7.2 MICROSTEP TABLE .......................................27
7.3 CHANGING RESOLUTION ..............................28
7.4 MICROPLYER STEP INTERPOLATOR ...............28
7.5 STANDSTILL CURRENT REDUCTION ................29
8 CURRENT SETTING ................................30
8.1 SENSE RESISTORS ........................................31
9 CHOPPER OPERATION .........................32
9.1 SPREADCYCLEMODE ....................................33
9.2 CONSTANT OFF-TIME MODE ........................35
10 POWER MOSFET STAGE ......................37
10.1 BREAK-BEFORE-MAKE LOGIC ........................37
10.2 ENN INPUT .................................................37
11 DIAGNOSTICS AND PROTECTION ...38
11.1 SHORT TO GND DETECTION ........................38
www.trinamic.com
1 Principles of Operation
0A+
S/D
N
High-Level µC TMC2660 0A- S
Interface
0B+
0B-
SPI
0A+
TMC429
Motion N
S/D
High-Level µC
SPI
Controller TMC2660 0A- S
Interface
for up to
0B+
3 Motors
0B-
SPI
Figure 1.1 Block diagram: applications
The TMC2660 motor driver chip with included MOSFETs is the intelligence and power between a
motion controller and the two phase stepper motor as shown in Figure 1.1. Following power-up, an
embedded microcontroller initializes the driver by sending commands over an SPI bus to write
control parameters and mode bits in the TMC2660. The microcontroller may implement the motion-
control function as shown in the upper part of the figure, or it may send commands to a dedicated
motion controller chip such as TRINAMIC’s TMC429 as shown in the lower part.
The motion controller can control the motor position by sending pulses on the STEP signal while
indicating the direction on the DIR signal. The TMC2660 has a microstep counter and sine table to
convert these signals into the coil currents which control the position of the motor. If the
microcontroller implements the motion-control function, it can write values for the coil currents
directly to the TMC2660 over the SPI interface, in which case the STEP/DIR interface may be disabled.
This mode of operation requires software to track the motor position and reference a sine table to
calculate the coil currents.
To optimize power consumption and heat dissipation, software may also adjust coolStep and
stallGuard2 parameters in real-time, for example to implement different tradeoffs between speed and
power consumption in different modes of operation.
The motion control function is a hard real-time task which may be a burden to implement reliably
alongside other tasks on the embedded microcontroller. By offloading the motion-control function to
the TMC429, up to three motors can be operated reliably with very little demand for service from the
microcontroller. Software only needs to send target positions, and the TMC429 generates precisely
timed step pulses. Software retains full control over both the TMC2660 and TMC429 through the SPI
bus.
1.1 Key Concepts

The TMC2660 motor driver implements several advanced features which are exclusive to TRINAMIC
products. These features contribute toward greater precision, greater energy efficiency, higher
reliability, smoother motion, and cooler operation in many stepper motor applications.
stallGuard2™ High-precision load measurement using the back EMF on the coils
coolStep™ Load-adaptive current control which reduces energy consumption by as much as
75%
spreadCycle™ High-precision chopper algorithm available as an alternative to the traditional
constant off-time algorithm
microPlyer™ Microstep interpolator for obtaining increased smoothness of microstepping over a
STEP/DIR interface
www.trinamic.com
In addition to these performance enhancements, TRINAMIC motor drivers also offer safeguards to
detect and protect against shorted outputs, open-circuit output, overtemperature, and undervoltage
conditions for enhancing safety and recovery from equipment malfunctions.
1.2 Control Interfaces

There are two control interfaces from the motion controller to the motor driver: the SPI serial
interface and the STEP/DIR interface. The SPI interface is used to write control information to the chip
and read back status information. This interface must be used to initialize parameters and modes
necessary to enable driving the motor. This interface may also be used for directly setting the currents
flowing through the motor coils, as an alternative to stepping the motor using the STEP and DIR
signals, so the motor can be controlled through the SPI interface alone.
The STEP/DIR interface is a traditional motor control interface available for adapting existing designs
to use TRINAMIC motor drivers. Using only the SPI interface requires slightly more CPU overhead to
look up the sine tables and send out new current values for the coils.
1.2.1 SPI Interface

The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus
master to the bus slave, another bit is sent simultaneously from the slave to the master.
Communication between an SPI master and the TMC2660 slave always consists of sending one 20-bit
command word and receiving one 20-bit status word.
The SPI command rate typically corresponds to the microstep rate at low velocities. At high velocities,
the rate may be limited by CPU bandwidth to 10-100 thousand commands per second, so the
application may need to change to fullstep resolution.
1.2.2 STEP/DIR Interface

The STEP/DIR interface is enabled by default. Active edges on the STEP input can be rising edges or
both rising and falling edges, as controlled by another mode bit (DEDGE). Using both edges cuts the
toggle rate of the STEP signal in half, which is useful for communication over slow interfaces such as
optically isolated interfaces.
On each active edge, the state sampled from the DIR input determines whether to step forward or
back. Each step can be a fullstep or a microstep, in which there are 2, 4, 8, 16, 32, 64, 128, or 256
microsteps per fullstep. During microstepping, a step impulse with a low state on DIR increases the
microstep counter and a high decreases the counter by an amount controlled by the microstep
resolution. An internal table translates the counter value into the sine and cosine values which
control the motor current for microstepping.
1.3 Mechanical Load Sensing

The TMC2660 provides stallGuard2 high-resolution load measurement for determining the mechanical
load on the motor by measuring the back EMF. In addition to detecting when a motor stalls, this
feature can be used for homing to a mechanical stop without a limit switch or proximity detector. The
coolStep power-saving mechanism uses stallGuard2 to reduce the motor current to the minimum
motor current required to meet the actual load placed on the motor.
1.4 Current Control

Current into the motor coils is controlled using a cycle-by-cycle chopper mode. Two chopper modes
are available: a traditional constant off-time mode and the new spreadCycle mode. spreadCycle mode
offers smoother operation and greater power efficiency over a wide range of speed and load.
www.trinamic.com
2 Pin Assignments
2.1 Package Outline
TST_MODE
TST_ANA
VCC_IO
SG_TST
STEP
GND
GND
VHS
DIR
VS
-
44
43
42
41
40
39
38
37
36
35
34
- 1 33 -
2 32
OA1 OB1
3 31
VSA 4 30 VSB
5 29
OA2
6
TMC2660-PA 28
OB2
QFP44
7 27
OA1 OB1
8 26
BRA 9 25 BRB
10 24
OA2 OB2
11 23
12
13
14
15
16
17
18
19
20
21
22
SRA
5VOUT
SDO
SDI
SCK
GND
CSN
ENN
-
CLK
SRB
Figure 2.1 TMC2660 pin assignment
2.2 Signal Descriptions

Pin Number Type Function
OA1 2, 3 O (VS) Bridge A1 output. Interconnect all of these pins using thick traces
7, 8 capable to carry the motor current and distribute heat into the PCB.
OA2 5, 6 O (VS) Bridge A2 output. Interconnect all of these pins using thick traces
OB1 26, 27 O (VS) Bridge B1 output. Interconnect all of these pins using thick traces
OB2 23, 24 O (VS) Bridge B2 output. Interconnect all of these pins using thick traces
VSA 4 Bridge A/B positive power supply. Connect to VS and provide
VSB 30 sufficient filtering capacity for chopper current ripple.
BRA 9 AI Bridge A/B negative power supply via sense resistor in bridge foot
BRB 25 point.
SRA 12 AI Sense resistor inputs for chopper current regulation.
SRB 22
5VOUT 13 Output of the on-chip 5V linear regulator. This voltage is used to
supply the low-side MOSFETs and internal analog circuitry. An
external capacitor to GND close to the pin is required. Place the
capacitor near pins 13 and 17. A 470nF ceramic capacitor is
sufficient.
SDO 14 DO VIO SPI serial data output.
www.trinamic.com
Pin Number Type Function

SDI 15 DI VIO SPI serial data input.
(Scan test input in test mode.)
SCK 16 DI VIO Serial clock input of SPI interface.
(Scan test shift enable input in test mode.)
GND 17, 39, Digital and analog low power GND.
44
CSN 18 DI VIO Chip select input for the SPI interface. (Active low.)
ENN 19 DI VIO Power MOSFET enable input. All MOSFETs are switched off when
disabled. (Active low.)
CLK 21 DI VIO System clock input for all internal operations. Tie low to use the
on-chip oscillator. A high signal disables the on-chip oscillator until
power down.
VHS 35 High-side supply voltage (motor supply voltage - 10V)
VS 36 Motor supply voltage
TST_ANA 37 AO VIO Reserved. Do not connect.
SG_TST 38 DO VIO stallGuard2 output. Signals a motor stall. (Active high.)
VCC_IO 40 Input/output supply voltage VIO for all digital pins. Tie to digital
logic supply voltage. Operation is allowed in 3.3V and 5V systems.
DIR 41 DI VIO Direction input. Sampled on an active edge of the STEP input to
determine stepping direction. Sampling a low increases the
microstep counter, while sampling a high decreases the counter. A
60-ns internal glitch filter rejects short pulses on this input.
STEP 42 DI VIO Step input. Active edges can be rising or both rising and falling, as
controlled by the DEDGE mode bit. A 60-ns internal glitch filter
rejects short pulses on this input.
TST_MODE 43 DI VIO Test mode input. Puts IC into test mode. Tie to GND for normal
operation.
n.c. 1, 33 No internal connection - can be tied to any net, e.g., in order to
improve power routing to pins VSA and VSB.
n.c. 20, 34 No internal connection
www.trinamic.com
3 Internal Architecture
Figure 3.1 shows the internal architecture of TMC266O.
+VM 9-29V
100n
100n
16V
VHS VS
+VCC
TMC2660
VM-10V 5V supply
VCC_IO OSC 5V linear 5VOUT
3.3V or 5V D linear
15MHz regulator
100n
regulator
470nF
slope HS VHS +VM
8-20MHz CLK Clock
D CLK VSA
selector
P-Gate Provide sufficient filtering capacity
ENABLE S S near bridge supply (electrolyt
STEP drivers G G
capacitors and ceramic capacitors)
Step &
step & dir D
D D
DIR Direction
(optional) D Short to OA1
interface Break
Phase polarity Chopper GND
Step multiply before detectors motor coil A
logic
16 à 256 make OA2
0.16V
0.30V
VSENSE
Sine wave SIN &

D D
1024 entry COS N-Gate G G

S S
drivers
BRA
TEST_SE D VREF RSENSE=75mΩ
Digital
ENABLE 9
slope LS +5V 22R RSENSE for 4A peak (2.8A RMS)
D control SRA RSENSE=100mΩ
DAC for 3A peak (2.1A RMS)
CSN M 10nF
D
U
SCK X 10nF
D SRB
SPI SPI interface DAC RSENSE=75mΩ
SDI 9 for 4A peak (2.8A RMS)
D slope LS +5V 22R RSENSE
RSENSE=100mΩ
SDO for 3A peak (2.1A RMS)
D BRB
coolStep N-Gate Optional input protection and
S S filter network against inductive
Energy drivers G G sparks upon motor cable break
efficiency D D
OB2
stallGuard SG_TST BACK
D stallGuard 2 Break
output EMF Phase polarity Chopper Short to motor coil B
before
logic GND OB1
make
Protection & SHORT detectors
Diagnostics TO GND D D
P-Gate G
S
G
S
Provide sufficient filtering capacity
ENABLE near bridge supply (electrolyt
drivers capacitors and ceramic capacitors)
Temperature VSB
sensor
100°C, 150°C
slope HS VHS +VM
GND TEST_ANA
Figure 3.1 TMC2660 block diagram
PROMINENT FEATURES INCLUDE:
Oscillator and clock selector provide the system clock from the on-chip oscillator or an external
source.
Step and direction interface uses a microstep counter and sine table to generate target currents
for the coils.
SPI interface receives commands that directly set the coil current values.
Multiplexer selects either the output of the sine table or the SPI interface for
controlling the current into the motor coils.
Multipliers scale down the currents to both coils when the currents are
greater than those required by the load on the motor or as set by
the CS current scale parameter.
DACs and comparators convert the digital current values to analog signals that are
compared with the voltages on the sense resistors. Comparator
outputs terminate chopper drive phases when target currents are
reached.
Break-before-make and gate drivers ensure non-overlapping pulses, boost pulse voltage, and control
pulse slope to the gates of the power MOSFETs.
On-chip voltage regulators provide high-side voltage for P-channel MOSFET gate drivers and
supply voltage for on-chip analog and digital circuits.
www.trinamic.com
4 stallGuard2 Load Measurement

stallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall
detection as well as other uses at loads below those which stall the motor, such as coolStep load-
adaptive current reduction. (stallGuard2 is a more precise evolution of the earlier stallGuard
technology.)
The stallGuard2 measurement value changes linearly over a wide range of load, velocity, and current
settings, as shown in Figure 4.1. At maximum motor load, the value goes to zero or near to zero. This
corresponds to a load angle of 90° between the magnetic field of the coils and magnets in the rotor.
This also is the most energy-efficient point of operation for the motor.
1000
900
stallGuard2
Start value depends
reading 800
on motor and
700 operating conditions
600
stallGuard value reaches zero
500 Motor stalls above this point.
and indicates danger of stall.
Load angle exceeds 90° and
This point is set by stallGuard
400 available torque sinks.
threshold value SGT.
300
200
100
0 10 20 30 40 50 60 70 80 90 100
motor load
(% max. torque)
Figure 4.1 stallGuard2 load measurement SG as a function of load
Two parameters control stallGuard2 and one status value is returned.
Parameter Description Setting Comment

SGT 7-bit signed integer that sets the stallGuard2 0 indifferent value
threshold level for asserting the SG_TST output +1… +63 less sensitivity
and sets the optimum measurement range for
readout. Negative values increase sensitivity, -1… -64 higher sensitivity
and positive values reduce sensitivity so more
torque is required to indicate a stall. Zero is a
good starting value. Operating at values below
-10 is not recommended.
SFILT Mode bit which enables the stallGuard2 filter for 0 standard mode
more precision. If set, reduces the measurement 1 filtered mode
frequency to one measurement per four
fullsteps. If cleared, no filtering is performed.
Filtering compensates for mechanical
asymmetries in the construction of the motor,
but at the expense of response time. Unfiltered
operation is recommended for rapid stall
detection. Filtered operation is recommended
for more precise load measurement.
www.trinamic.com
Status word Description Range Comment

SG 10-bit unsigned integer stallGuard2 0… 1023 0: highest load
measurement value. A higher value indicates low value: high load
lower mechanical load. A lower value indicates high value: less load
a higher load and therefore a higher load angle.
For stall detection, adjust SGT to return an SG
value of 0 or slightly higher upon maximum
motor load before stall.
4.1 Tuning the stallGuard2 Threshold

Due to the dependency of the stallGuard2 value SG from motor-specific characteristics and application-
specific demands on load and velocity the easiest way to tune the stallGuard2 threshold SGT for a
specific motor type and operating conditions is interactive tuning in the actual application.
The procedure is:

1. Operate the motor at a reasonable velocity for your application and monitor SG.
2. Apply slowly increasing mechanical load to the motor. If the motor stalls before SG reaches
zero, decrease SGT. If SG reaches zero before the motor stalls, increase SGT. A good SGT
starting value is zero. SGT is signed, so it can have negative or positive values.
3. The optimum setting is reached when SG is between 0 and 400 at increasing load shortly
before the motor stalls, and SG increases by 100 or more without load. SGT in most cases can
be tuned together with the motion velocity in a way that SG goes to zero when the motor
stalls and the stall output SG_TST is asserted. This indicates that a step has been lost.
The system clock frequency affects SG. An external crystal-stabilized clock should be used for
applications that demand the highest precision. The power supply voltage also affects SG, so tighter
regulation results in more accurate values. SG measurement has a high resolution, and there are a
few ways to enhance its accuracy, as described in the following sections.
4.1.1 Variable Velocity Operation

Across a range of velocities, on-the-fly adjustment of the stallGuard2 threshold SGT improves the
accuracy of the load measurement SG. This also improves the power reduction provided by coolStep,
which is driven by SG. Linear interpolation between two SGT values optimized at different velocities is
a simple algorithm for obtaining most of the benefits of on-the-fly SGT adjustment, as shown in
Figure 4.2. An optimal SGT curve in black and a two-point interpolated SGT curve in red are shown.
1000 20
stallGuard2 900 18
reading at
800 16
no load
700 14
optimum 600 12
SGT setting
500 10
400 8
300 6
simplified
SGT setting 200 4
100 2
0 0 50 100 150 200 250 300 350 400 450 500 550 600
lower limit for stall back EMF reaches Motor RPM

detection 4 RPM supply voltage (200 FS motor)
Figure 4.2 Linear interpolation for optimizing SGT with changes in velocity.
www.trinamic.com
4.1.2 Small Motors with High Torque Ripple and Resonance

Motors with a high detent torque show an increased variation of the stallGuard2 measurement value
SG with varying motor currents, especially at low currents. For these motors, the current dependency
might need correction in a similar manner to velocity correction for obtaining the highest accuracy.
4.1.3 Temperature Dependence of Motor Coil Resistance

Motors working over a wide temperature range may require temperature correction, because motor
coil resistance increases with rising temperature. This can be corrected as a linear reduction of SG at
increasing temperature, as motor efficiency is reduced.
4.1.4 Accuracy and Reproducibility of stallGuard2 Measurement

In a production environment, it may be desirable to use a fixed SGT value within an application for
one motor type. Most of the unit-to-unit variation in stallGuard2 measurements results from
manufacturing tolerances in motor construction. The measurement error of stallGuard2 – provided that
all other parameters remain stable – can be as low as:
𝑠𝑡𝑎𝑙𝑙𝐺𝑢𝑎𝑟𝑑 𝑚𝑒𝑎𝑠𝑢𝑟𝑒𝑚𝑒𝑛𝑡 𝑒𝑟𝑟𝑜𝑟 = ±𝑚𝑎𝑥(1, |𝑆𝐺𝑇|)
4.2 stallGuard2 Measurement Frequency and Filtering

The stallGuard2 measurement value SG is updated with each full step of the motor. This is enough to
safely detect a stall, because a stall always means the loss of four full steps. In a practical application,
especially when using coolStep, a more precise measurement might be more important than an
update for each fullstep because the mechanical load never changes instantaneously from one step to
the next. For these applications, the SFILT bit enables a filtering function over four load
measurements. The filter should always be enabled when high-precision measurement is required. It
compensates for variations in motor construction, for example due to misalignment of the phase A to
phase B magnets. The filter should only be disabled when rapid response to increasing load is
required, such as for stall detection at high velocity.
4.3 Detecting a Motor Stall

To safely detect a motor stall, a stall threshold must be determined using a specific SGT setting.
Therefore, you need to determine the maximum load the motor can drive without stalling and to
monitor the SG value at this load, for example some value within the range 0 to 400. The stall
threshold should be a value safely within the operating limits, to allow for parameter stray. So, your
microcontroller software should set a stall threshold which is slightly higher than the minimum value
seen before an actual motor stall occurs. The response at an SGT setting at or near 0 gives some idea
on the quality of the signal: Check the SG value without load and with maximum load. These values
should show a difference of at least 100 or a few 100, which shall be large compared to the offset. If
you set the SGT value so that a reading of 0 occurs at maximum motor load, an active high stall
output signal will be available at SG_TST output.
4.4 Limits of stallGuard2 Operation

stallGuard2 does not operate reliably at extreme motor velocities: Very low motor velocities (for many
motors, less than one revolution per second) generate a low back EMF and make the measurement
unstable and dependent on environment conditions (temperature, etc.). Other conditions will also lead
to extreme settings of SGT and poor response of the measurement value SG to the motor load.
Very high motor velocities, in which the full sinusoidal current is not driven into the motor coils also
lead to poor response. These velocities are typically characterized by the motor back EMF reaching the
supply voltage.
www.trinamic.com
5 coolStep Current Control

coolStep allows substantial energy savings, especially for motors which see varying loads or operate
at a high duty cycle. Because a stepper motor application needs to work with a torque reserve of 30%
to 50%, even a constant-load application allows significant energy savings because coolStep
automatically enables torque reserve when required. Reducing power consumption keeps the system
cooler, increases motor life, and allows reducing cost in the power supply and cooling components.
Reducing motor current by half results in reducing power by a factor of four.
Energy efficiency - power consumption decreased up to 75%.

Motor generates less heat - improved mechanical precision.
Less cooling infrastructure - for motor and driver.
Cheaper motor - does the job.
0,9
Efficiency with coolStep
0,8 Efficiency with 50% torque reserve
0,7
0,6
0,5
Efficiency
0,4
0,3
0,2
0,1
0
0 50 100 150 200 250 300 350
Velocity [RPM]
Figure 5.1 Energy efficiency example with coolStep
Figure 5.1 shows the efficiency gain of a 42mm stepper motor when using coolStep compared to
standard operation with 50% of torque reserve. coolStep is enabled above 60rpm in the example.
coolStep is controlled by several parameters, but two are critical for understanding how it works:
Parameter Description Range Comment

SEMIN 4-bit unsigned integer that sets a lower 0… 15 lower coolStep
threshold. If SG goes below this threshold, threshold:
coolStep increases the current to both coils. The SEMINx32
4-bit SEMIN value is scaled by 32 to cover the
lower half of the range of the 10-bit SG value.
(The name of this parameter is derived from
smartEnergy, which is an earlier name for
coolStep.)
SEMAX 4-bit unsigned integer that controls an upper 0… 15 upper coolStep
threshold. If SG is sampled equal to or above threshold:
this threshold enough times, coolStep decreases (SEMIN+SEMAX+1)x32
the current to both coils. The upper threshold is
(SEMIN + SEMAX + 1) x 32.
Figure 5.2 shows the operating regions of coolStep. The black line represents the SG measurement
value, the blue line represents the mechanical load applied to the motor, and the red line represents
the current into the motor coils. When the load increases, SG falls below SEMIN, and coolStep
www.trinamic.com
increases the current. When the load decreases and SG rises above (SEMIN + SEMAX + 1) x 32 the
current becomes reduced.
mechanical load
motor current
stallGuard2
reading
motor current reduction area current setting CS

(upper limit)
SEMAX+SEMIN+1
SEMIN
½ or ¼ CS
motor current increment area (lower limit)
0=maximum load
stall possible
time
current increment due to
increased load
slow current reduction due

to reduced motor load
load
angle load angle optimized load angle optimized
optimized
Figure 5.2 coolStep adapts motor current to the load.
Four more parameters control coolStep and one status value is returned:
Parameter Description Range Comment

CS Current scale. Scales both coil current values as 0… 31 scaling factor:
taken from the internal sine wave table or from
1/32, 2/32, … 32/32
the SPI interface. For high precision motor
operation, work with a current scaling factor in
the range 16 to 31, because scaling down the
current values reduces the effective microstep
resolution by making microsteps coarser. This
setting also controls the maximum current value
set by coolStep™.
SEUP Number of increments of the coil current for each 0… 3 step width is:
occurrence of an SG measurement below the 1, 2, 4, 8
lower threshold.
SEDN Number of occurrences of SG measurements 0… 3 number of stallGuard
above the upper threshold before the coil current measurements per
is decremented. decrement:
32, 8, 2, 1
SEIMIN Mode bit that controls the lower limit for scaling Minimum motor
the coil current. If the bit is set, the limit is ¼ 0 current:
CS. If the bit is clear, the limit is ½ CS. 1/2 of CS
1 1/4 of CS
Status word Description Range Comment
SE 5-bit unsigned integer reporting the actual 0… 31 Actual motor current
current scaling value determined by coolStep. scaling factor set by
This value is biased by 1 and divided by 32, so coolStep:
the range is 1/32 to 32/32. The value will not be 1/32, 2/32, … 32/32
greater than the value of CS or lower than either
¼ CS or ½ CS depending on the setting of
SEIMIN.
www.trinamic.com
5.1 Tuning coolStep

Before tuning coolStep, first tune the stallGuard2 threshold level SGT, which affects the range of the
load measurement value SG. coolStep uses SG to operate the motor near the optimum load angle of
+90°.
The current increment speed is specified in SEUP, and the current decrement speed is specified in
SEDN. They can be tuned separately because they are triggered by different events that may need
different responses. The encodings for these parameters allow the coil currents to be increased much
more quickly than decreased, because crossing the lower threshold is a more serious event that may
require a faster response. If the response is too slow, the motor may stall. In contrast, a slow
response to crossing the upper threshold does not risk anything more serious than missing an
opportunity to save power.
coolStep operates between limits controlled by the current scale parameter CS and the SEIMIN
bit.
5.1.1 Response Time

For fast response to increasing motor load, use a high current increment step SEUP. If the motor load
changes slowly, a lower current increment step can be used to avoid motor current oscillations. If the
filter controlled by SFILT is enabled, the measurement rate and regulation speed are cut by a factor of
four.
5.1.2 Low Velocity and Standby Operation

Because stallGuard2 is not able to measure the motor load in standstill and at very low RPM, the
current at low velocities should be set to an application-specific default value and combined with
standstill current reduction settings programmed through the SPI interface.
www.trinamic.com
6 SPI Interface
TMC2660 requires setting configuration parameters and mode bits through the SPI interface before the
motor can be driven. The SPI interface also allows reading back status values and bits.
6.1 Bus Signals

The SPI bus on the TMC2660 has four signals:
SCK bus clock input

SDI serial data input
SDO serial data output
CSN chip select input (active low)
The slave is enabled for an SPI transaction by a low on the chip select input CSN. Bit transfer is
synchronous to the bus clock SCK, with the slave latching the data from SDI on the rising edge of SCK
and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum
of 20 SCK clock cycles is required for a bus transaction with the TMC2660.
If more than 20 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a
20-clock delay through an internal shift register. This can be used for daisy chaining multiple chips.
CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal
shift register are latched into the internal control register and recognized as a command from the
master to the slave. If more than 20 bits are sent, only the last 20 bits received before the rising edge
of CSN are recognized as the command.
6.2 Bus Timing

SPI interface is synchronized to the internal system clock, which limits the SPI bus clock SCK to half
of the system clock frequency. If the system clock is based on the on-chip oscillator, an additional
10% safety margin must be used to ensure reliable data transmission. All SPI inputs as well as the
ENN input are internally filtered to avoid triggering on pulses shorter than 20ns. Figure 6.1 shows the
timing parameters of an SPI bus transaction, and the table below specifies their values.
CSN
tCC tCL tCH tCH tCC
SCK
tDU tDH
SDI bit19 bit18 bit0
tDO tZC
SDO bit19 bit18 bit0
Figure 6.1 SPI Timing
www.trinamic.com
AC-Characteristics
SPI Interface Timing
clock period is tCLK
Parameter Symbol Conditions Min Typ Max Unit
SCK valid before or after change
tCC 10 ns
of CSN
CSN high time *)
Min time is for
synchronous CLK
>2tCLK
tCSH with SCK high one tCLK ns
+10
tCH before CSN high
only
SCK low time *)
Min time is for
tCL synchronous CLK tCLK >tCLK+10 ns
only
SCK high time *)
Min time is for
tCH synchronous CLK tCLK >tCLK+10 ns
only
SCK frequency using internal Assumes minimum
fSCK OSC frequency 4 MHz
clock
SCK frequency using external Assumes
fSCK synchronous CLK 8 MHz
16MHz clock
SDI setup time before rising
tDU 10 ns
edge of SCK
SDI hold time after rising edge
tDH 10 ns
of SCK
Data out valid time after falling No capacitive load
tDO on SDO tFILT+5 ns
SCK clock edge
SDI, SCK, and CSN filter delay Rising and falling
tFILT edge 12 20 30 ns
time
6.3 Bus Architecture

SPI slaves can be chained and used with a single chip select line. If slaves are chained, they behave
like a long shift register. For example, a chain of two motor drivers requires 40 bits to be sent. The
last bits shifted to each register in the chain are loaded into an internal register on the rising edge of
the CSN input. For example, 24 or 32 bits can be sent to a single motor driver, but it latches just the
last 20 bits received before CSN goes high.
Mechanical Feedback or
virtual stop switch
Real time Step & +VM Stepper
3 x REF_L, REF_R Dir interface TMC2660 stepper driver oto r #1
tep m
VSA / B
coolS river
TMC429 VCC_IO
trol
Half Bridge 1 OA1
triple stepper motor S1 (SDO_S)
n con d Half Bridge 1
Reference switch STEP N 2 phase
step multiplier
controller
Motio
processing
D1 (SCK_S)
sine table
OA2 S stepper
DIR x chopper motor
Output select
S2 (nSCS_S) 4*256 entry
nSCS_C OB1
SPI or D2 (SDI_S) Driver 2 Half Bridge 2
SCK_C Step & Step & Dir
Half Bridge 2 OB2
SDI_C SPI to master 3x linear RAMP Direction pulse S3 (nSCS_2)
generator generation BRA / B
SDOZ_C D3 (nSCS_3) Driver 3 CSN
RSA / B
SCK coolStep™
SPI control, RSENSE RSENSE
SDI Config & diags
nINT Interrupt Position
controller comparator
SDO
Serial driver
interface 2 x current
Microstep table Protection 2 x DAC
stallGuard2™ comparator
CLK & diagnostics
Realtime event trigger POSCOMP Virtual stop switch SG_TST
Second driver and motor

Motion command Configuration and
SPITM diagnostics SPITM Third driver and motor
User CPU
o l
System interfacing
m contr
Syste
Figure 6.2 Interfaces to a TMC429 motion controller chip and a TMC2660 motor driver
www.trinamic.com
Figure 6.2 shows the interfaces in a typical application. The SPI bus is used by an embedded MCU to
initialize the control registers of both a motion controller and one or more motor drivers. STEP/DIR
interfaces are used between the motion controller and the motor drivers.
6.4 Register Write Commands

An SPI bus transaction to the TMC2660 is a write command to one of the five write-only registers that
hold configuration parameters and mode bits:
Register Description
The DRVCTRL register has different formats for controlling the
Driver Control Register
interface to the motion controller depending on whether or
(DRVCTRL)
not the STEP/DIR interface is enabled.
Chopper Configuration Register The CHOPCONF register holds chopper parameters and mode
(CHOPCONF) bits.
coolStep Configuration Register The SMARTEN register holds coolStep parameters and a mode
(SMARTEN) bit. (smartEnergy is an earlier name for coolStep.)
stallGuard2 Configuration Register The SGCSCONF register holds stallGuard2 parameters and a
(SGCSCONF) mode bit.
The DRVCONF register holds parameters and mode bits used to
control the power MOSFETs and the protection circuitry. It also
Driver Configuration Register
holds the SDOFF bit which controls the STEP/DIR interface and
(DRVCONF)
the RDSEL parameter which controls the contents of the
response returned in an SPI transaction
In the following sections, multibit binary values are prefixed with a % sign, for example %0111.
6.4.1 Write Command Overview

The table below shows the formats for the five register write commands. Bits 19, 18, and sometimes
17 select the register being written, as shown in bold. The DRVCTRL register has two formats, as
selected by the SDOFF bit. Bits shown as 0 must always be written as 0, and bits shown as 1 must
always be written with 1. Detailed descriptions of each parameter and mode bit are given in the
following sections.
Register/ DRVCTRL DRVCTRL CHOPCONF SMARTEN SGCSCONF DRVCONF

Bit (SDOFF=1) (SDOFF=0)
19 0 0 1 1 1 1
18 0 0 0 0 1 1
17 PHA 0 0 1 0 1
16 CA7 0 TBL1 0 SFILT TST
15 CA6 0 TBL0 SEIMIN 0 SLPH1
14 CA5 0 CHM SEDN1 SGT6 SLPH0
13 CA4 0 RNDTF SEDN0 SGT5 SLPL1
12 CA3 0 HDEC1 0 SGT4 SLPL0
11 CA2 0 HDEC0 SEMAX3 SGT3 0
10 CA1 0 HEND3 SEMAX2 SGT2 DISS2G
9 CA0 INTPOL HEND2 SEMAX1 SGT1 TS2G1
8 PHB DEDGE HEND1 SEMAX0 SGT0 TS2G0
7 CB7 0 HEND0 0 0 SDOFF
6 CB6 0 HSTRT2 SEUP1 0 VSENSE
5 CB5 0 HSTRT1 SEUP0 0 RDSEL1
4 CB4 0 HSTRT0 0 CS4 RDSEL0
3 CB3 MRES3 TOFF3 SEMIN3 CS3 0
www.trinamic.com
6.4.2 Read Response Overview

The table below shows the formats for the read response. The RDSEL parameter in the DRVCONF
register selects the format of the read response.
Bit RDSEL=%00 RDSEL=%01 RDSEL=%10

19 MSTEP9 SG9 SG9
18 MSTEP8 SG8 SG8
17 MSTEP7 SG7 SG7
16 MSTEP6 SG6 SG6
15 MSTEP5 SG5 SG5
14 MSTEP4 SG4 SE4
13 MSTEP3 SG3 SE3
12 MSTEP2 SG2 SE2
11 MSTEP1 SG1 SE1
10 MSTEP0 SG0 SE0
9 - - -
8 - - -
7 STST
6 OLB
5 OLA
4 S2GB
3 S2GA
2 OTPW
1 OT
0 SG
6.5 Driver Control Register (DRVCTRL)

The format of the DRVCTRL register depends on the state of the SDOFF mode bit.
SPI Mode SDOFF bit is set, the STEP/DIR interface is disabled, and DRVCTRL is the interface for
specifying the currents through each coil.
STEP/DIR Mode SDOFF bit is clear, the STEP/DIR interface is enabled, and DRVCTRL is a configuration
register for the STEP/DIR interface.
6.5.1 DRVCTRL Register in SPI Mode

DRVCTRL Driver Control in SPI Mode (SDOFF=1)
Bit Name Function Comment
19 0 Register address bit
17 PHA Polarity A Sign of current flow through coil A:
0: Current flows from OA1 pins to OA2 pins.
1: Current flows from OA2 pins to OA1 pins.
16 CA7 Current A MSB Magnitude of current flow through coil A. The range is
15 CA6 0 to 248, if hysteresis or offset are used up to their full
14 CA5 extent. The resulting value after applying hysteresis or
13 CA4 offset must not exceed 255.
12 CA3
11 CA2
10 CA1
9 CA0 Current A LSB
www.trinamic.com
DRVCTRL Driver Control in SPI Mode (SDOFF=1)

8 PHB Polarity B Sign of current flow through coil B:
0: Current flows from OB1 pins to OB2 pins.
1: Current flows from OB2 pins to OB1 pins.
7 CB7 Current B MSB Magnitude of current flow through coil B. The range is
6 CB6 0 to 248, if hysteresis or offset are used up to their full
5 CB5 extent. The resulting value after applying hysteresis or
4 CB4 offset must not exceed 255.
3 CB3
2 CB2
1 CB1
0 CB0 Current B LSB
6.5.2 DRVCTRL Register in STEP/DIR Mode

DRVCTRL Driver Control in STEP/DIR Mode (SDOFF=0)
17 0 Reserved
16 0 Reserved
15 0 Reserved
14 0 Reserved
13 0 Reserved
12 0 Reserved
11 0 Reserved
10 0 Reserved
9 INTPOL Enable STEP 0: Disable STEP pulse interpolation.
interpolation 1: Enable STEP pulse multiplication by 16.
8 DEDGE Enable double edge 0: Rising STEP pulse edge is active, falling edge is
STEP pulses inactive.
1: Both rising and falling STEP pulse edges are active.
7 0 Reserved
6 0 Reserved
5 0 Reserved
4 0 Reserved
3 MRES3 Microstep resolution Microsteps per 90°:
2 MRES2 for STEP/DIR mode %0000: 256
1 MRES1 %0001: 128
0 MRES0 %0010: 64
%0011: 32
%0100: 16
%0101: 8
%0110: 4
%0111: 2 (halfstep)
%1000: 1 (fullstep)
www.trinamic.com
6.6 Chopper Control Register (CHOPCONF)

CHOPCONF Chopper Configuration
16 TBL1 Blanking time Blanking time interval, in system clock periods:
15 TBL0 %00: 16
%01: 24
%10: 36
%11: 54
14 CHM Chopper mode This mode bit affects the interpretation of the HDEC,
HEND, and HSTRT parameters shown below.
0 Standard mode (spreadCycle)
1 Constant tOFF with fast decay time.
Fast decay time is also terminated when the
negative nominal current is reached. Fast
decay is after on time.
13 RNDTF Random TOFF time Enable randomizing the slow decay phase duration:
0: Chopper off time is fixed as set by bits tOFF
1: Random mode, tOFF is random modulated by
dNCLK= -12 … +3 clocks.
12 HDEC1 Hysteresis decrement CHM=0 Hysteresis decrement period setting, in
11 HDEC0 interval system clock periods:
or %00: 16
Fast decay mode %01: 32
%10: 48
%11: 64
CHM=1 HDEC1=0: current comparator can terminate
the fast decay phase before timer expires.
HDEC1=1: only the timer terminates the fast
decay phase.
HDEC0: MSB of fast decay time setting.
10 HEND3 Hysteresis end (low) CHM=0 %0000 … %1111:
9 HEND2 value Hysteresis is -3, -2, -1, 0, 1, …, 12
or (1/512 of this setting adds to current setting)
Sine wave offset This is the hysteresis value which becomes
used for the hysteresis chopper.
8 HEND1 CHM=1 %0000 … %1111:
7 HEND0 Offset is -3, -2, -1, 0, 1, …, 12
This is the sine wave offset and 1/512 of the
value becomes added to the absolute value
of each sine wave entry.
6 HSTRT2 Hysteresis start value CHM=0 Hysteresis start offset from HEND:
5 HSTRT1 or %000: 1 %100: 5
4 HSTRT0 Fast decay time %001: 2 %101: 6
setting %010: 3 %110: 7
%011: 4 %111: 8
Effective: HEND+HSTRT must be ≤ 15
CHM=1 Three least-significant bits of the duration of
the fast decay phase. The MSB is HDEC0.
Fast decay time is a multiple of system clock
periods: NCLK= 32 x (HDEC0+HSTRT)
www.trinamic.com
CHOPCONF Chopper Configuration

3 TOFF3 Off time/MOSFET Duration of slow decay phase. If TOFF is 0, the MOSFETs
2 TOFF2 disable are shut off. If TOFF is nonzero, slow decay time is a
1 TOFF1 multiple of system clock periods:
0 TOFF0 NCLK= 12 + (32 x TOFF) (Minimum time is 64clocks.)
%0000: Driver disable, all bridges off
%0001: 1 (use with TBL of minimum 24 clocks)
%0010 … %1111: 2 … 15
6.7 coolStep Control Register (SMARTEN)

SMARTEN coolStep Configuration
16 0 Reserved
15 SEIMIN Minimum coolStep 0: ½ CS current setting
current 1: ¼ CS current setting
14 SEDN1 Current decrement Number of times that the stallGuard2 value must be
13 SEDN0 speed sampled equal to or above the upper threshold for each
decrement of the coil current:
%00: 32
%01: 8
%10: 2
%11: 1
12 0 Reserved
11 SEMAX3 Upper coolStep If the stallGuard2 measurement value SG is sampled
10 SEMAX2 threshold as an offset equal to or above (SEMIN+SEMAX+1) x 32 enough times,
9 SEMAX1 from the lower then the coil current scaling factor is decremented.
8 SEMAX0 threshold
7 0 Reserved
6 SEUP1 Current increment Number of current increment steps for each time that
5 SEUP0 size the stallGuard2 value SG is sampled below the lower
threshold:
%00: 1
%01: 2
%10: 4
%11: 8
4 0 Reserved
3 SEMIN3 Lower coolStep If SEMIN is 0, coolStep is disabled. If SEMIN is nonzero
2 SEMIN2 threshold/coolStep and the stallGuard2 value SG falls below SEMIN x 32,
1 SEMIN1 disable the coolStep current scaling factor is increased.
0 SEMIN0
www.trinamic.com
6.8 stallGuard2 Control Register (SGCSCONF)

SGCSCONF stallGuard2™ and Current Setting
16 SFILT stallGuard2 filter 0: Standard mode, fastest response time.
enable 1: Filtered mode, updated once for each four fullsteps to
compensate for variation in motor construction, highest
accuracy.
15 0 Reserved
14 SGT6 stallGuard2 threshold The stallGuard2 threshold value controls the optimum
13 SGT5 value measurement range for readout. A lower value results in
12 SGT4 a higher sensitivity and requires less torque to indicate
11 SGT3 a stall. The value is a two’s complement signed integer.
10 SGT2 Values below -10 are not recommended.
9 SGT1 Range: -64 to +63
8 SGT0
7 0 Reserved
6 0 Reserved
5 0 Reserved
4 CS4 Current scale Current scaling for SPI and step/direction operation.
3 CS3 (scales digital %00000 … %11111: 1/32, 2/32, 3/32, … 32/32
2 CS2 currents A and B) This value is biased by 1 and divided by 32, so the
1 CS1 range is 1/32 to 32/32.
0 CS0 Example: CS=0 is 1/32 current
www.trinamic.com
6.9 Driver Control Register (DRVCONF)

DRVCONF Driver Configuration
16 TST Reserved TEST mode Must be cleared for normal operation. When set, the
SG_TST output exposes digital test values, and the
TEST_ANA output exposes analog test values. Test value
selection is controlled by SGT1 and SGT0:
TEST_ANA: %00: anatest_2vth,
%01: anatest_dac_out,
%10: anatest_vdd_half.
SG_TST: %00: comp_A,
%01: comp_B,
%10: CLK,
%11: on_state_xy
15 SLPH1 Slope control, high %00: Minimum
14 SLPH0 side %01: Minimum temperature compensation mode.
%10: Medium temperature compensation mode.
%11: Maximum
In temperature compensated mode (tc), the MOSFET gate
driver strength is increased if the overtemperature
warning temperature is reached. This compensates for
temperature dependency of high-side slope control.
13 SLPL1 Slope control, low %00: Minimum.
12 SLPL0 side %01: Minimum.
%10: Medium.
%11: Maximum.
11 0 Reserved
10 DISS2G Short to GND 0: Short to GND protection is enabled.
protection disable 1: Short to GND protection is disabled.
9 TS2G1 Short to GND %00: 3.2µs.
8 TS2G0 detection timer %01: 1.6µs.
%10: 1.2µs.
%11: 0.8µs.
7 SDOFF STEP/DIR interface 0: Enable STEP and DIR interface.
disable 1: Disable STEP and DIR interface. SPI interface is used
to move motor.
6 VSENSE Sense resistor 0: Full-scale sense resistor voltage is 310mV.
voltage-based current 1: Full-scale sense resistor voltage is 165mV.
scaling (Full-scale refers to a current setting of 31 and a DAC
value of 255.)
5 RDSEL1 Select value for read %00 Microstep position read back
4 RDSEL0 out (RD bits) %01 stallGuard2 level read back
%10 stallGuard2 and coolStep current level read
back
%11 Reserved, do not use
3 0 Reserved
2 0 Reserved
1 0 Reserved
0 0 Reserved
www.trinamic.com
6.10 Read Response

For every write command sent to the motor driver, a 20-bit response is returned to the motion
controller. The response has one of three formats, as selected by the RDSEL parameter in the
DRVCONF register. The table below shows these formats. Software must not depend on the value of
any bit shown as reserved.
DRVSTATUS Read Response

RDSEL=%00 %01 %10
19 MSTEP9 SG9 SG9 Microstep counter Microstep position in sine table for coil A in
18 MSTEP8 SG8 SG8 for coil A STEP/DIR mode. MSTEP9 is the Polarity bit:
17 MSTEP7 SG7 SG7 or 0: Current flows from OA1 pins to OA2 pins.
16 MSTEP6 SG6 SG6 stallGuard2 value 1: Current flows from OA2 pins to OA1 pins.
15 MSTEP5 SG5 SG5 SG9:0
14 MSTEP4 SG4 SE4 or stallGuard2 value SG9:0.
13 MSTEP3 SG3 SE3 stallGuard2 value
12 MSTEP2 SG2 SE2 SG9:5 and
coolStep value stallGuard2 value SG9:5 and the actual
11 MSTEP1 SG1 SE1
SE4:0 coolStep scaling value SE4:0.
10 MSTEP0 SG0 SE0
9 Reserved
8 Reserved
7 STST Standstill 0: No standstill condition detected.
indicator 1: No active edge occurred on the STEP
input during the last 220 system clock cycles.
6 OLB Open load 0: No open load condition detected.
5 OLA indicator 1: No chopper event has happened during
the last period with constant coil polarity.
Only a current above 1/16 of the maximum
setting can clear this bit!
Hint: This bit is only a status indicator. The
chip takes no other action when this bit is
set. False indications may occur during fast
motion and at standstill. Check this bit only
during slow motion.
4 S2GB Short to GND 0: No short to ground shutdown condition.
3 S2GA detection bits on 1: Short to ground shutdown condition. The
high-side short counter is incremented by each short
transistors circuit and the chopper cycle is suspended.
The counter is decremented for each phase
polarity change. The MOSFETs are shut off
when the counter reaches 3 and remain shut
off until the shutdown condition is cleared by
disabling and re-enabling the driver. The
shutdown conditions reset by deasserting the
ENN input or clearing the TOFF parameter.
2 OTPW Overtemperature 0: No overtemperature warning condition.
warning 1: Warning threshold is active.
1 OT Overtemperature 0: No overtemperature shutdown condition.
shutdown 1: Overtemperature shutdown has occurred.
0 SG stallGuard2 status 0: No motor stall detected.
1: stallGuard2 threshold has been reached,
and the SG_TST output is driven high.
www.trinamic.com
6.11 Device Initialization

The following sequence of SPI commands is an example of enabling the driver and initializing the
chopper:
SPI = $901B4; // Hysteresis mode

or
SPI = $94557; // Constant toff mode
SPI = $D001F; // Current setting: $d001F (max. current)
SPI = $E0010; // low driver strength, stallGuard2 read, SDOFF=0
SPI = $00000; // 256 microstep setting
First test of coolStep current control:
SPI = $A8202; // Enable coolStep with minimum current ¼ CS
The configuration parameters should be tuned to the motor and application for optimum
performance.
www.trinamic.com
7 STEP/DIR Interface
The STEP and DIR inputs provide a simple, standard interface compatible with many existing motion
controllers. The microPlyer STEP pulse interpolator brings the smooth motor operation of high-
resolution microstepping to applications originally designed for coarser stepping and reduces pulse
bandwidth.
7.1 Timing
Figure 7.1 shows the timing parameters for the STEP and DIR signals, and the table below gives their
specifications. When the DEDGE mode bit in the DRVCTRL register is set, both edges of STEP are
active. If DEDGE is cleared, only rising edges are active. STEP and DIR are sampled and synchronized
to the system clock. An internal analog filter removes glitches on the signals, such as those caused by
long PCB traces. If the signal source is far from the chip, and especially if the signals are carried on
cables, the signals should be filtered or differentially transmitted.
DIR
tDSU tSH tSL tDSH
STEP
(DEDGE=0)
Active edge
(DEDGE=0)
Active edge
Figure 7.1 STEP and DIR timing.
STEP and DIR Interface Timing AC-Characteristics

clock period is tCLK
Step frequency (at maximum fSTEP DEDGE=0 ½ fCLK
microstep resolution) DEDGE=1 ¼ fCLK
Fullstep frequency fFS fCLK/512
STEP input low time tSL max(tFILTSD, ns
tCLK+20)
STEP input high time tSH max(tFILTSD, ns
tCLK+20)
DIR to STEP setup time tDSU 20 ns
DIR after STEP hold time tDSH 20 ns
STEP and DIR spike filtering tFILTSD Rising and falling 36 60 85 ns
time edge
STEP and DIR sampling relative tSDCLKHI Before rising edge tFILTSD ns
to rising CLK input of CLK
www.trinamic.com
7.2 Microstep Table

The internal microstep table maps the sine function from 0° to 90°. Symmetries allow mapping the
sine and cosine functions from 0° to 360° with this table. The angle is encoded as a 10-bit unsigned
integer MSTEP provided by the microstep counter. The size of the increment applied to the counter
while microstepping through this table is controlled by the microstep resolution setting MRES in the
DRVCTRL register. Depending on the DIR input, the microstep counter is increased (DIR=0) or
decreased (DIR=1) by the step size with each STEP active edge. Despite many entries in the last
quarter of the table being equal, the electrical angle continuously changes, because either the sine
wave or cosine wave is in an area, where the current vector changes monotonically from position to
position. Figure 7.2 shows the table. The largest values are 248, which leaves headroom used for
adding an offset.
Entry 0-31 32-63 64-95 96-127 128-159 160-191 192-223 224-255

0 1 49 96 138 176 207 229 243
1 2 51 97 140 177 207 230 244
2 4 52 98 141 178 208 231 244
3 5 54 100 142 179 209 231 244
4 7 55 101 143 180 210 232 244
5 8 57 103 145 181 211 232 245
6 10 58 104 146 182 212 233 245
7 11 60 105 147 183 212 233 245
8 13 61 107 148 184 213 234 245
9 14 62 108 150 185 214 234 246
10 16 64 109 151 186 215 235 246
11 17 65 111 152 187 215 235 246
12 19 67 112 153 188 216 236 246
13 21 68 114 154 189 217 236 246
14 22 70 115 156 190 218 237 247
15 24 71 116 157 191 218 237 247
16 25 73 118 158 192 219 238 247
17 27 74 119 159 193 220 238 247
18 28 76 120 160 194 220 238 247
19 30 77 122 161 195 221 239 247
20 31 79 123 163 196 222 239 247
21 33 80 124 164 197 223 240 247
22 34 81 126 165 198 223 240 248
23 36 83 127 166 199 224 240 248
24 37 84 128 167 200 225 241 248
25 39 86 129 168 201 225 241 248
26 40 87 131 169 201 226 241 248
27 42 89 132 170 202 226 242 248
28 43 90 133 172 203 227 242 248
29 45 91 135 173 204 228 242 248
30 46 93 136 174 205 228 243 248
31 48 94 137 175 206 229 243 248
Figure 7.2 Internal microstep table showing the first quarter of the sine wave.
www.trinamic.com
7.3 Changing Resolution

The application may need to change the microstepping resolution to get the best performance from
the motor. For example, high-resolution microstepping may be used for precision operations on a
workpiece, and then fullstepping may be used for maximum torque at maximum velocity to advance
to the next workpiece. When changing to coarse resolutions like fullstepping or halfstepping,
switching should occur at or near positions that correspond to steps in the lower resolution, as
shown in Table 7.1.
Step Position MSTEP Value Coil A Current Coil B Current

Half step 0 0 0% 100%
Full step 0 128 70.7% 70.7%
Half step 1 256 100% 0%
Full step 1 384 70.7% -70.7%
Half step 2 512 0% -100%
Full step 2 640 -70.7% -70.7%
Half step 3 768 -100% 0%
Full step 3 896 -70.7% 70.7%
Table 7.1 Optimum positions for changing to halfstep and fullstep resolution
7.4 microPlyer Step Interpolator

For each active edge on STEP, microPlyer produces 16 microsteps at 256x resolution, as shown in
Figure 7.3. microPlyer is enabled by setting the INTPOL bit in the DRVCTRL register. It supports input
at 16x resolution, which it transforms into 256x resolution. The step rate for each 16 microsteps is
determined by measuring the time interval of the previous step period and dividing it into 16 equal
parts. The maximum time between two microsteps corresponds to 2 20 (roughly one million system
clock cycles), for an even distribution of 1/256 microsteps. At 16MHz system clock frequency, this
results in a minimum step input frequency of 16Hz for microPlyer operation (one fullstep per second).
A lower step rate causes the STST bit to be set, which indicates a standstill event. At that frequency,
𝑠𝑦𝑠𝑡𝑒𝑚 𝑐𝑙𝑜𝑐𝑘 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦
microsteps occur at a rate of 16 ≈ 250𝐻𝑧 = 244.
2
microPlyer only works well with a stable STEP frequency. Do not use the DEDGE option if the STEP
signal does not have a 50% duty cycle.
Active edge
Active edge
Active edge
Active edge
(DEDGE=0)
(DEDGE=0)
(DEDGE=0)
(DEDGE=0)
STEP
interpolated 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66
microstep
motor
angle
2^20 tCLK
STANDSTILL
(STST) active
Figure 7.3 microPlyer microstep interpolation with rising STEP frequency.
www.trinamic.com
In Figure 7.3, the first STEP cycle is long enough to set the STST bit. This bit is cleared on the next
STEP active edge. Then, the STEP frequency increases and after one cycle at the higher rate microPlyer
increases the interpolated microstep rate. During the last cycle at the slower rate, microPlyer did not
generate all 16 microsteps, so there is a small jump in motor angle between the first and second
cycles at the higher rate.
7.5 Standstill current reduction

When a standstill event is detected, the motor current should be reduced to save energy and reduce
heat dissipation in the power MOSFET stage. This is especially true at halfstep positions, which are a
worst-case condition for the driver and motor because the full energy is consumed in one bridge and
one motor coil.
Attention:
Stand still current reduction is required when operating near the thermal limits of the application.
Refer the stand still current limitations in chapter 15 as a guideline.
www.trinamic.com
8 Current Setting
The internal 5V supply voltage available at the pin 5VOUT is used as a reference for the coil current
regulation based on the sense resistor voltage measurement. The desired maximum motor current is
set by selecting an appropriate value for the sense resistor. The sense resistor voltage range can be
selected by the VSENSE bit in the DRVCONF register. The low sensitivity (high sense resistor voltage,
VSENSE=0) brings best and most robust current regulation, while high sensitivity (low sense resistor
voltage; VSENSE=1) reduces power dissipation in the sense resistor. This setting reduces the power
dissipation in the sense resistor by nearly half.
After choosing the VSENSE setting and selecting the sense resistor, the currents to both coils are
scaled by the 5-bit current scale parameter CS in the SGCSCONF register. The sense resistor value is
chosen so that the maximum desired current (or slightly more) flows at the maximum current setting
(CS = %11111).
Using the internal sine wave table, which has amplitude of 248, the RMS motor current can be
calculated by:
𝐶𝑆 + 1 𝑉𝐹𝑆 1
𝐼𝑅𝑀𝑆 = ∗ ∗
32 𝑅𝑆𝐸𝑁𝑆𝐸 √2
The momentary motor current is calculated as:
𝐶𝑈𝑅𝑅𝐸𝑁𝑇𝐴/𝐵 𝐶𝑆 + 1 𝑉𝐹𝑆
𝐼𝑀𝑂𝑇 = ∗ ∗
248 32 𝑅𝑆𝐸𝑁𝑆𝐸
where:
CS is the effective current scale setting as set by the CS bits and modified by coolStep. The effective
value ranges from 0 to 31.
VFS is the sense resistor voltage at full scale, as selected by the VSENSE control bit (refer to the
electrical characteristics).
CURRENTA/B is the value set by the current setting in SPI mode or the internal sine table in STEP/DIR
mode.

CS Current scale. Scales both coil current values as 0 … 31 Scaling factor:
taken from the internal sine wave table or from 1/32, 2/32, … 32/32
the SPI interface. For high precision motor
operation, work with a current scaling factor in
the range 16 to 31, because scaling down the
current values reduces the effective microstep
resolution by making microsteps coarser. This
setting also controls the maximum current value
set by coolStep.
VSENSE Allows control of the sense resistor voltage 0 310mV
range or adaptation of one electronic module to 1 165mV
different maximum motor currents.
Pay special attention concerning the thermal design and current limits imposed by it!
Be sure to reduce the current to a value at or below the maximum standstill current limits as
specified in chapter 15. This is important due to thermal restrictions for continuous current in a single
bride. The worst case is standstill in a half step position where one bridge has 0 current and the
other bridge has RMS value * √2 current.
www.trinamic.com
8.1 Sense Resistors

Sense resistors should be carefully selected. The full motor current flows through the sense resistors.
They also see the switching spikes from the MOSFET bridges. A low-inductance type such as film or
composition resistors is required to prevent spikes causing ringing on the sense voltage inputs
leading to unstable measurement results. A low-inductance, low-resistance PCB layout is essential.
Any common GND path for the two sense resistors must be avoided, because this would lead to
coupling between the two current sense signals. A massive ground plane is best. When using high
currents or long motor cables, spike damping with parallel capacitors to ground may be needed, as
shown in Figure 8.1. Because the sense resistor inputs are susceptible to damage from negative
overvoltages, an additional input protection resistor helps protect against a motor cable break or
ringing on long motor cables.
MOSFET
bridge
SRA
10R to 47R no common GND path
470nF RSENSE not visible to TMC2660
optional input
protection resistors
GND
TMC2660 Power
supply GND
optional filter
470nF RSENSE
capacitors
SRB 10R to 47R
MOSFET
bridge
Figure 8.1 Sense resistor grounding and protection components
The sense resistor needs to be able to conduct the peak motor coil current in motor standstill
conditions, unless standby power is reduced. Under normal conditions, the sense resistor sees a bit
less than the coil RMS current, because no current flows through the sense resistor during the slow
decay phases.
The peak sense resistor power dissipation is:
𝐶𝑆 + 1 2
(𝑉𝑆𝐸𝑁𝑆𝐸 ∗ )
𝑃𝑅𝑆𝑀𝐴𝑋 = 32
𝑅𝑆𝐸𝑁𝑆𝐸
For high-current applications, power dissipation is halved by using the lower sense resistor voltage
setting and the corresponding lower resistance value. In this case, any voltage drop in the PCB traces
has a larger influence on the result. A compact power stage layout with massive ground plane is best
to avoid parasitic resistance effects.
www.trinamic.com
9 Chopper Operation
The currents through both motor coils are controlled using choppers. The choppers work
independently of each other. Figure 9.1 shows the three chopper phases:
+VM +VM +VM
ICOIL ICOIL ICOIL
RSENSE RSENSE RSENSE
On Phase: Fast Decay Phase:

Slow Decay Phase:
current flows in current flows in
current re-circulation
direction of target opposite direction
current of target current
Figure 9.1 Chopper phases.
Although the current could be regulated using only on phases and fast decay phases, insertion of the
slow decay phase is important to reduce electrical losses and current ripple in the motor. The
duration of the slow decay phase is specified in a control parameter and sets an upper limit on the
chopper frequency. The current comparator can measure coil current during phases when the current
flows through the sense resistor, but not during the slow decay phase, so the slow decay phase is
terminated by a timer. The on phase is terminated by the comparator when the current through the
coil reaches the target current. The fast decay phase may be terminated by either the comparator or
another timer.
When the coil current is switched, spikes at the sense resistors occur due to charging and discharging
parasitic capacitances. During this time, typically one or two microseconds, the current cannot be
measured. Blanking is the time when the input to the comparator is masked to block these spikes.
There are two chopper modes available: a new high-performance chopper algorithm called
spreadCycle and a proven constant off-time chopper mode. The constant off-time mode cycles through
three phases: on, fast decay, and slow decay. The spreadCycle mode cycles through four phases: on,
slow decay, fast decay, and a second slow decay.
Three parameters are used for controlling both chopper modes:

TOFF Off time. This setting controls the duration of the 0 Chopper off.
slow decay time and limits the maximum 1… 15 Off time setting.
chopper frequency. For most applications an off (1 will work with
time within the range of 5µs to 20µs will fit. minimum blank time
If the value is 0, the MOSFETs are all shut off and of 24 clocks.)
the motor can freewheel.
If the value is 1 to 15, the number of system
clock cycles in the slow decay phase is:
𝑁𝐶𝐿𝐾 = (𝑇𝑂𝐹𝐹 ∙ 32) + 24
The SD-Time is
1
𝑡 = ∙ 𝑁𝐶𝐿𝐾
𝑓𝐶𝐿𝐾
www.trinamic.com

TBL Blanking time. This time needs to cover the 0 16 system clock cycles
switching event and the duration of the ringing 1 24 system clock cycles
on the sense resistor. For most low-current 2 36 system clock cycles
applications, a setting of 16 or 24 is good. For 3 54 system clock cycles
high-current applications, a setting of 36 or 54
may be required.
CHM Chopper mode bit 0 spreadCycle mode
1 Constant off time
mode
9.1 spreadCycle Mode

The spreadCycle chopper algorithm (pat..) is a precise and simple to use chopper mode which
automatically determines the optimum length for the fast-decay phase. Several parameters are
available to optimize the chopper to the application.
Each chopper cycle is comprised of an on phase, a slow decay phase, a fast decay phase and a
second slow decay phase (see Figure 9.2). The slow decay phases limit the maximum chopper
frequency and are important for low motor and driver power dissipation. The hysteresis start setting
limits the chopper frequency by forcing the driver to introduce a minimum amount of current ripple
into the motor coils. The motor inductance limits the ability of the chopper to follow a changing
motor current. The duration of the on phase and the fast decay phase must be longer than the
blanking time, because the current comparator is disabled during blanking. This requirement is
satisfied by choosing a positive value for the hysteresis as can be estimated by the following
calculation:
𝑡𝐵𝐿𝐴𝑁𝐾
𝑑𝐼𝐶𝑂𝐼𝐿𝐵𝐿𝐴𝑁𝐾 = 𝑉𝑀 ∗
𝐿𝐶𝑂𝐼𝐿
2 ∗ 𝑡𝑆𝐷
𝑑𝐼𝐶𝑂𝐼𝐿𝑆𝐷 = 𝑅𝐶𝑂𝐼𝐿 ∗ 𝐼𝐶𝑂𝐼𝐿 ∗
𝐿𝐶𝑂𝐼𝐿
where:
dICOILBLANK is the coil current change during the blanking time.
dICOILSD is the coil current change during the slow decay time.
tSD is the slow decay time.
tBLANK is the blanking time (as set by TBL).
VM is the motor supply voltage.
ICOIL is the peak motor coil current at the maximum motor current setting CS.
RCOIL and LCOIL are motor coil inductance and motor coil resistance.
With this, a lower limit for the start hysteresis setting can be determined:
2 ∗ 248 𝐶𝑆 + 1
𝐻𝑦𝑠𝑡𝑒𝑟𝑒𝑠𝑖𝑠 𝑆𝑡𝑎𝑟𝑡 ≥ (𝑑𝐼𝐶𝑂𝐼𝐿𝐵𝐿𝐴𝑁𝐾 + 𝑑𝐼𝐶𝑂𝐼𝐿𝑆𝐷 ) ∗ ∗
𝐼𝐶𝑂𝐼𝐿 32
Example:
For a 42mm stepper motor with 7.5mH, 4.5Ω phase, and 1A RMS current at CS=31, i.e. 1.41A
peak current, at 24V with a blank time of 1.5µs:
2µ𝑠
𝑑𝐼𝐶𝑂𝐼𝐿𝐵𝐿𝐴𝑁𝐾 = 24𝑉 ∗ = 6.4𝑚𝐴
7.5𝑚𝐻
2 ∗ 5µ𝑠
𝑑𝐼𝐶𝑂𝐼𝐿𝑆𝐷 = 4.5Ω ∗ 1.41𝐴 ∗ = 8.5𝑚𝐴
7.5𝑚𝐻
With this, the minimum hysteresis start setting is 5.2. A value in the range 6 to 10 can be
used.
www.trinamic.com
An Excel spreadsheet is provided for performing these calculations.
As experiments show, the setting is quite independent of the motor, because higher current motors
typically also have a lower coil resistance. Choosing a medium default value for the hysteresis (for
example, effective HSTRT+HEND=10) normally fits most applications. The setting can be optimized by
experimenting with the motor: A too low setting will result in reduced microstep accuracy, while a
too high setting will lead to more chopper noise and motor power dissipation. When measuring the
sense resistor voltage in motor standstill at a medium coil current with an oscilloscope, a too low
setting shows a fast decay phase not longer than the blanking time. When the fast decay time
becomes slightly longer than the blanking time, the setting is optimum. You can reduce the off-time
setting, if this is hard to reach.
The hysteresis principle could in some cases lead to the chopper frequency becoming too low, for
example when the coil resistance is high compared to the supply voltage. This is avoided by splitting
the hysteresis setting into a start setting (HSTRT+HEND) and an end setting (HEND). An automatic
hysteresis decrementer (HDEC) interpolates between these settings, by decrementing the hysteresis
value stepwise each 16, 32, 48, or 64 system clock cycles. At the beginning of each chopper cycle, the
hysteresis begins with a value which is the sum of the start and the end values (HSTRT+HEND), and
decrements during the cycle, until either the chopper cycle ends or the hysteresis end value (HEND) is
reached. This way, the chopper frequency is stabilized at high amplitudes and low supply voltage
situations, if the frequency gets too low. This avoids the frequency reaching the audible range.
I
HDEC
target current + hysteresis start
target current + hysteresis end

target current
target current - hysteresis end
target current - hysteresis start
on sd fd sd t
Figure 9.2 spreadCycle chopper mode showing the coil current during a chopper cycle
Three parameters control spreadCycle mode:

HSTRT Hysteresis start setting. Please remark, that this 0… 7 This setting adds to
value is an offset to the hysteresis end value HEND.
HEND. %000: 1 %100: 5
%001: 2 %101: 6
%010: 3 %110: 7
%011: 4 %111: 8
HEND Hysteresis end setting. Sets the hysteresis end 0… 2 Negative HEND: -3… -1
value after a number of decrements. Decrement %0000: -3
interval time is controlled by HDEC. The sum %0001: -2
HSTRT+HEND must be <16. At a current setting CS %0010: -1
of max. 30 (amplitude reduced to 240), the sum 3 Zero HEND: 0
is not limited. %0011: 0
4… 15 Positive HEND: 1… 12
%0100: 1 %1010: 7 1100: 9
%0101: 2 %1011: 8 1101: 10
%0110: 3 %1100: 9 1110: 11
%0111: 4 %1101: 10
%1000: 5 %1110: 11
%1001: 6 %1111: 12
www.trinamic.com

HDEC Hysteresis decrement setting. This setting 0… 3 0: fast decrement
determines the slope of the hysteresis during on 3: very slow decrement
time and during fast decay time. It sets the %00: 16
number of system clocks for each decrement. %01: 32
%10: 48
%11: 64
Example:
In the example above, a hysteresis start of 7 has been chosen. The hysteresis end is set to
about half of this value, 3. The resulting configuration register values are:
HEND=6 (sets an effective end value of 3)
HSTRT=3 (sets an effective start value of hysteresis end +4)
HDEC=0 (Hysteresis decrement becomes used)
9.2 Constant Off-Time Mode

The classic constant off-time chopper uses a fixed-time fast decay following each on phase. While the
duration of the on phase is determined by the chopper comparator, the fast decay time needs to be
fast enough for the driver to follow the falling slope of the sine wave, but it should not be so long
that it causes excess motor current ripple and power dissipation. This can be tuned using an
oscilloscope or evaluating motor smoothness at different velocities. A good starting value is a fast
decay time setting similar to the slow decay time setting.
I
target current + offset
mean value = target current
on fd sd on fd sd t
Figure 9.3 Constant off-time chopper with offset showing the coil current during two cycles,
After tuning the fast decay time, the offset should be tuned for a smooth zero crossing. This is
necessary because the fast decay phase makes the absolute value of the motor current lower than the
target current (see Figure 9.4). If the zero offset is too low, the motor stands still for a short moment
during current zero crossing. If it is set too high, it makes a larger microstep. Typically, a positive
offset setting is required for smoothest operation.
Target current Target current

I I
Coil current Coil current
t t
Coil current does not have optimum shape Target current corrected for optimum shape of coil current
Figure 9.4 Zero crossing with correction using sine wave offset.
www.trinamic.com
Three parameters control constant off-time mode:

TFD Fast decay time setting. With CHM=1, these bits 0 Slow decay only.
(HSTART & control the portion of fast decay for each 1… 15 Duration of fast decay
HDEC0) chopper cycle. phase.
OFFSET Sine wave offset. With CHM=1, these bits control 0…2 Negative offset: -3… -1
(HEND) the sine wave offset. A positive offset corrects 3 No offset: 0
for zero crossing error. 4… 15 Positive offset: 1… 12
NCCFD Selects usage of the current comparator for 0 Enable comparator
(HDEC1) termination of the fast decay cycle. If current termination of fast
comparator is enabled, it terminates the fast decay cycle.
decay cycle in case the current reaches a higher 1 End by time only.
negative value than the actual positive value.
9.2.1 Random Off Time

In the constant off-time chopper mode, both coil choppers run freely without synchronization. The
frequency of each chopper mainly depends on the coil current and the motor coil inductance. The
inductance varies with the microstep position. With some motors, a slightly audible beat can occur
between the chopper frequencies when they are close together. This typically occurs at a few
microstep positions within each quarter wave. This effect is usually not audible when compared to
mechanical noise generated by ball bearings, etc. Another factor which can cause a similar effect is a
poor layout of the sense resistor GND connections.
A common cause of motor noise is a bad PCB layout causing coupling of both sense resistor
voltages.
To minimize the effect of a beat between both chopper frequencies, an internal random generator is
provided. It modulates the slow decay time setting when switched on by the RNDTF bit. The RNDTF
feature further spreads the chopper spectrum, reducing electromagnetic emission on single
frequencies.

RNDTF Enables a random off-time generator, which 0 Disable.
slightly modulates the off time tOFF using a 1 Random modulation
random polynomial. enable.
www.trinamic.com
10 Power MOSFET Stage

The gate current for the power MOSFETs can be adapted to influence the slew rate at the coil outputs.
The main features of the stage are:
- 5V gate drive voltage for low-side N-MOS transistors, 8V for high-side P-MOS transistors.
- The gate drivers protect the bridges actively against cross-conduction using an internal QGD
protection that holds the MOSFETs safely off.
- Automatic break-before-make logic minimizes dead time and diode-conduction time.
- Integrated short to ground protection detects a short of the motor wires and protects the
MOSFETs.
The low-side gate driver is supplied by the 5VOUT pin. The low-side driver supplies 0V to the MOSFET
gate to close the MOSFET, and 5VOUT to open it. The high-side gate driver voltage is supplied by the
VS and the VHS pin. VHS is more negative than VS and allows opening the VS referenced high-side
MOSFET. The high-side driver supplies VS to the P channel MOSFET gate to close the MOSFET and VHS
to open it. The effective low-side gate voltage is roughly 5V; the effective high-side gate voltage is
roughly 8V.

SLPL Low-side slope control. Controls the MOSFET gate 0… 3 %00: Minimum.
driver current. %01: Minimum.
Set to 0, 1 or 2. Use fastest slope to minimize %10: Medium.
package power dissipation. %11: Maximum.
SLPH High-side slope control. Controls the MOSFET 0… 3 %00: Minimum.
gate driver current. %01: Minimum+TC.
For the TMC2660 set identical to SLPL to match %10: Medium+TC.
LS slope. %11: Maximum.
10.1 Break-Before-Make Logic

Each half-bridge has to be protected against cross-conduction during switching events. When
switching off the low-side MOSFET, its gate first needs to be discharged before the high-side MOSFET
is allowed to switch on. The same goes when switching off the high-side MOSFET and switching on
the low-side MOSFET. The time for charging and discharging of the MOSFET gates depends on the
MOSFET gate charge and the gate driver current set by SLPL and SLPH. The BBM (break-before-make)
logic measures the gate voltage and automatically delays turning on the opposite bridge transistor
until its counterpart is discharged. This way, the bridge will always switch with optimized timing
independent of the slope setting.
10.2 ENN Input

The MOSFETs can be completely disabled in hardware by pulling the ENN input high. This allows the
motor to free-wheel. An equivalent function can be performed in software by setting the parameter
TOFF to zero. The hardware disable is available for allowing the motor to be hot plugged. For the
TMC2660, it can be used in overvoltage situations. The TMC2660 can withstand voltages of up to 60V
when the MOSFETs are disabled. If a hardware disable function is not needed, tie ENN low.
www.trinamic.com
11 Diagnostics and Protection

11.1 Short to GND Detection
The short to ground detection prevents the high-side power MOSFETs from being damaged by
accidentally shorting the motor outputs to ground. It disables the MOSFETs only if a short condition
persists. A temporary event like an ESD event could look like a short, but these events are filtered out
by requiring the event to persist.
When a short is detected, the bridge is switched off immediately, the chopper cycle on the affected
coil is terminated, and the short counter is incremented. The counter is decremented for each phase
polarity change. The MOSFETs are shut off when the counter reaches 3 and remain shut off until the
short condition is cleared by disabling the driver and re-enabling it.
The short to ground detection status is indicated by two bits:
Status Description Range Comment

S2GA These bits identify a short to GND condition on 0 / 1 0: No short
S2GB coil A and coil B persisting for multiple chopper condition
cycles. The bits are cleared when the MOSFETs detected.
are disabled. 1: Short condition
detected.
An overload condition on the high-side MOSFET (short to GND) is detected by monitoring the coil
voltage during the high-side on phase. Under normal conditions, the high-side power MOSFET reaches
the bridge supply voltage minus a small voltage drop during the on phase. If the bridge is
overloaded, the voltage cannot rise to the detection level within the time defined by the internal
detection delay setting. When an overload is detected, the bridge is switched off. The short to GND
detection delay needs to be adjusted for the slope time, because it must be longer than slope, but
should not be unnecessarily long.
Hxy 0V
VVS
VVS- Short to GND
Valid area detected
BMxy VBMS2G
Short
0V detection
Driver Driver off

0V
enabled
tS2G tS2G
Short to GND BM voltage
inactive delay inactive delay Short detected
monitor phase monitored
Figure 11.1 Short to GND detection timing.
www.trinamic.com
The short to ground detector is controlled by a mode bit and a parameter:
Mode bit / Description Setting Comment

Parameter
DISS2G Short to ground detection disable bit. 0/1 0: Short to ground
detection enabled.
1: Short to ground
detection
disabled.
TS2G This setting controls the short to GND detection 0… 3 %00: 3.2µs.
delay time. It needs to cover the switching slope %01: 1.6µs.
time. A higher setting reduces sensitivity to %10: 1.2µs.
capacitive loads. %11: 0.8µs.
11.2 Open-Load Detection

The open-load detection determines whether a motor coil has an open condition, for example due to
a loose contact. When driving in fullstep mode, the open-load detection will also signal when the
motor current cannot be reached within each step, for example due to a too-high motor velocity in
which the back EMF voltage exceeds the supply voltage. The detection bit is only for information, and
no other action is performed by the chip. Assertion of an open-load condition does not always
indicate that the motor is not working properly. The bit is updated during normal operation whenever
the polarity of the respective coil toggles.
The open-load detection status is indicated by two bits:
Status flag Description Range Comment

OLA These bits indicate an open-load condition on 0 / 1 0: No open-load
OLB coil A and coil B. The flags become set, if no detected
chopper event has happened during the last 1: Open-load
period with constant coil polarity. The flag is not detected
updated with too low actual coil current below
1/16 of maximum setting.
11.3 Overtemperature Detection

The TMC2660 integrates a two-level temperature sensor (100°C warning and 150°C shutdown) for
diagnostics and for protection of the power MOSFETs. The temperature detector can be triggered by
heat accumulation on the board, for example due to missing convection cooling. Most critical
situations, in which the MOSFETs could be overheated, are avoided when using the short to ground
protection. For most applications, the overtemperature warning indicates an abnormal operation
situation and can be used to trigger an alarm or power-reduction measures. If continuous operation
in hot environments is necessary, a more precise mechanism based on temperature measurement
should be used. The thermal shutdown is strictly an emergency measure and temperature rising to
the shutdown level should be prevented by design. The shutdown temperature is above the specified
operating temperature range of the chip.
The high-side P-channel gate drivers have a temperature dependency which can be compensated to
some extent by increasing the gate driver current when the warning temperature threshold is
reached. The chip automatically corrects for the temperature dependency above the warning
temperature when the temperature-compensated modes of SLPH is used. In these modes, the gate
driver current is increased by one step when the temperature warning threshold is reached.
www.trinamic.com
Status Description Range Comment

OTPW Overtemperature warning. This bit indicates 0 / 1 1: temperature
whether the warning threshold is reached. prewarning level
Software can react to this setting by reducing reached
current.
OT Overtemperature shutdown. This bit indicates 0 / 1 1: driver shut down
whether the shutdown threshold has been due to over-
reached and the driver has been disabled. temperature
11.4 Undervoltage Detection

The undervoltage detector monitors both the internal logic supply voltage and the supply voltage. It
prevents operation of the chip when the MOSFETs cannot be guaranteed to operate properly because
the gate drive voltage is too low. It also initializes the chip at power up.
In undervoltage conditions, the logic control block becomes reset and the driver is disabled. All
MOSFETs are switched off. All internal registers are reset to zero. Software also should monitor the
supply voltage to detect an undervoltage condition. If software cannot measure the supply voltage,
an undervoltage condition can be detected when the response to an SPI command returns only zero
bits in the response and no bits are shifted through the internal shift register from SDI to SDO. After
a reset due to undervoltage occurs, the CS parameter is cleared, which is reflected in an SE status of 0
in the read response.
VVS
VUV
ca. 100µs ca. 100µs
Time
Device in reset: all Reset
registers cleared to 0
Figure 11.2 Undervoltage reset timing
Note: Be sure to operate the IC significantly above the undervoltage threshold to ensure reliable
operation! Check for SE reading back as zero to detect an undervoltage event.
www.trinamic.com
12 Power Supply Sequencing

The TMC2660 generates its own 5V supply for all internal operations. The internal reset of the chip is
derived from the supply voltage regulators in order to ensure a clean start-up of the device after
power up. During start up, the SPI unit is in reset and cannot be addressed. All registers become
cleared.
VCC_IO limits the voltage allowable on the inputs and outputs and is used for driving the outputs,
but input levels thresholds are not depending on the actual level of VCC_IO. Therefore, the startup
sequence of the VCC_IO power supply with respect to VS is not important.
13 System Clock
The clock is the timing reference for all functions. The internal system clock frequency for all
operations is nominally 15MHz. An external clock of 10MHz to 20MHz can be supplied for more exact
timing, especially when using coolStep and stallGuard2.
USING THE INTERNAL CLOCK FREQUENCY

To use the on-chip oscillator of the TMC2660, tie CLK to GND near the chip. The actual on-chip
oscillator clock frequency can be determined by measuring the delay time between the last step and
assertion of the STST (standstill) status bit, which is 220 clocks. There is some delay in reading the
STST bit through the SPI interface, but it is easily possible to measure the oscillator frequency within
1%. Chopper timing parameters can then be corrected using this measurement, because the oscillator
is relatively stable over a wide range of environmental temperatures.
In case well defined precise motor chopper operation are desired, it is supposed to work with an
external clock source.
USING THE EXTERNAL CLOCK FREQUENCY

An external clock frequency of up to 20MHz can be supplied. It is recommended to use an external
clock frequency between 10MHz and 16MHz for best performance. The external clock is enabled and
the on-chip oscillator is disabled with the first logic high driven on the CLK input.
Attention:
Never leave the external clock input floating. It is not allowed to remain within the transition region
(between valid low and high levels), as spurious clock signals might corrupt internal logic state.
Provide an external pull down resistor, in case the driver pin (i.e. microcontroller output) does not
provide a safe level directly after power up. When repeatedly starting and stopping the clock, a clean
clock switch over is important in order to avoid any clock period shorter than the minimum clock
time.
If the external clock is suspended or disabled after the internal oscillator has been disabled, the chip
will not operate. Be careful to switch off the power MOSFETs (by driving the ENN input high or setting
the TOFF parameter to 0) before switching off the clock, because otherwise the chopper would stop
and the motor current level could rise uncontrolled. If the short to GND detection is enabled, it stays
active even without clock.
www.trinamic.com
CLK must be
below VINHI
low, while
VVCC_IO VCLK
VCC_IO is
Defined clock, no intermediate levels
max. VCC_IO
3.3V/5V allowed
VINHI
VVS
VUV
Time
Operation, CLK is not allowed to have undefined
Device in reset: all levels between VINLO and VINHI and timing must Device in reset: all
registers cleared to 0 satisfy TCLK (min) registers cleared to 0
Figure 13.1 Start-up requirements of CLK input
13.1 Frequency Selection

A higher frequency allows faster step rates, faster SPI operation, and higher chopper frequencies. On
the other hand, it may cause more electromagnetic emission and more power dissipation in the
digital logic. Generally, a system clock frequency of 10MHz to 16MHz should be sufficient for most
applications, unless the motor is to operate at the highest velocities. If the application can tolerate
reduced motor velocity and increased chopper noise, a clock frequency of 4MHz to 10MHz should be
considered.
www.trinamic.com
14 Layout Considerations
The PCB layout is critical to good performance, because the environment includes both high-
sensitivity analog signals and high-current motor drive signals.
14.1 Sense Resistors

The sense resistors are susceptible to ground differences and ground ripple voltage, as the microstep
current steps result in voltages down to 0.5mV. No current other than the sense resistor currents
should flow through their connections to ground. Place the sense resistors close to chip with one or
more vias to the ground plane for each sense resistor.
The sense resistor layout is also sensitive to coupling between the axes. The two sense resistors
should not share a common ground connection trace or vias, because PCB traces have some
resistance.
14.2 Power MOSFET Outputs

The OA and OB dual pin outputs on the TMC2660 are directly connected electrically and thermally to
the drain of the MOSFETs of the power stage. A symmetrical, thermally optimized layout is required to
ensure proper heat dissipation of all MOSFETs into the PCB. Use thick traces and areas for vertical heat
transfer into the GND plane and enough vias for the motor outputs.
The printed circuit board should have a solid ground plane spreading heat into the board and
providing for a stable GND reference. All signals of the TMC2660 are referenced to GND. Directly
connect all GND pins to a common ground area.
The switching motor coil outputs have a high dV/dt, so stray capacitive coupling into high-impedance
signals can occur, if the motor traces are parallel to other traces over long distances.
14.3 Power Supply Pins

Both, the VSA and VSB pins, as well as the BRA and BRB pins conduct the full motor current for a
limited amount of time during each chopper cycle. Due to the resistance of bond wires connected to
these pins, the pins heat up. Therefore, it is essential for current capability above 2A RMS to use a
wide PCB trace for cooing and in order to avoid additional heat up of the pins caused by PCB trace
resistance. This is simplified by also contacting the N.C. pins located next to VSA and VSB to the
supply voltage. Failure to do so might affect reliability; despite heat-up of bond wires might not be
visible with a thermal camera.
14.4 Power Filtering

The 470nF ceramic filtering capacitor on 5VOUT should be placed as close as possible to the 5VOUT
pin, with its GND return going directly to the nearest GND pin. Use as short and as thick connections
as possible. A 100nF filtering capacitor should be placed as close as possible from the VS pin to the
ground plane. The motor supply pins, VSA and VSB, should be decoupled with an electrolytic (>47 μF
is recommended) capacitor and a ceramic capacitor, placed close to the device.
www.trinamic.com
14.5 Layout Example

EXAMPLE FOR UP TO 2.8A RMS
Here, an example for a layout with small board size (≈20cm²) is shown. See also the evaluation board.
top layer (assembly side) inner layer
inner layer bottom layer (solder side)
Figure 14.1 Layout example for TMC2660
www.trinamic.com
15 Absolute Maximum Ratings

The maximum ratings may not be exceeded under any circumstances. Operating the circuit at or near
more than one maximum rating at a time for extended periods shall be avoided by application
design.
Parameter Symbol Min Max Unit

Supply voltage VVS -0.5 30 V
Supply voltage when disabled (ENN VVIO) with IOXX=0 VVSDIS 60 V
Logic supply voltage VVCC -0.5 6.0 V
I/O supply voltage VVIO -0.5 6.0 V
Logic input voltage VI -0.5 VVIO+0.5 V
Analog input voltage VIA -0.5 VCC+0.5 V
Relative high-side gate driver voltage (VVM – VHS) VHSVM -0.5 15 V
Maximum current to/from digital pins IIO +/-10 mA
and analog low voltage I/Os
Non-destructive short time peak current into input/output pins IIO 500 mA
Bridge output peak current (10µs pulse) IOP +/-7 A
Output current, RMS per coil, running >4 fullsteps/s IOC 2.0 A
TA ≤ 50°C duty cycle 2s on 6s off 2.5
20cm² board with sample layout, standstill, single coil on 2.2
≤40kHz chopper, fastest slope (halfstep position) *)
50cm² board with sample layout standstill, single coil on 2.4
20cm² board with sample layout, standstill, single coil on 1.8
50cm² board with sample layout standstill, single coil on 2.0
5V regulator output current I5VOUT 50 mA
5V regulator peak power dissipation (VVM-5V) * I5VOUT P5VOUT 1 W
Junction temperature TJ -50 150 °C
Storage temperature TSTG -55 150 °C
ESD-Protection (Human body model, HBM), in application VESDAP 1 kV
ESD-Protection (Human body model, HBM), device handling VESDDH 300 V
*) The standstill specification refers to a stepper motor stopped at a high current. Normally, standstill
current should be reduced to a value far below the run current to reduce motor heating.
www.trinamic.com
16 Electrical Characteristics
16.1 Operational Range
Parameter Symbol Min Max Unit
Junction temperature TJ -40 125 °C
Supply voltage TMC2660 VVS 9 29 V
I/O supply voltage VVIO 3.00 5.25 V
16.2 DC and AC Specifications

DC characteristics contain the spread of values guaranteed within the specified supply voltage range
unless otherwise specified. Typical values represent the average value of all parts measured at +25°C.
Temperature variation also causes some values to stray. A device with typical values will not leave
Min/Max range within the full temperature range.
Power Supply Current DC Characteristics

VVS = 24.0V
Supply current, operating IVS fCLK=16MHz, 40kHz 12 mA
chopper, QG=10nC
Supply current, MOSFETs off IVS fCLK=16MHz 10 mA
Supply current, MOSFETs off, IVS fCLK variable 0.32 mA/
dependency on CLK frequency additional to IVS0 MHz
Static supply current IVS0 fCLK=0Hz, digital inputs 3.2 4 mA
at +5V or GND
Part of supply current NOT IVSHV MOSFETs off 1.2 mA
consumed from 5V supply
IO supply current IVIO No load on outputs, 0.3 µA
inputs at VIO or GND
High-Side Voltage Regulator DC Characteristics

VVS = 24.0V
Output voltage (VVM – VHS) VHSVM IOUT = 0mA 9.3 10.0 10.8 V
TJ = 25°C
Output resistance RVHS Static load 50 
Deviation of output voltage VVHS(DEV) TJ = full range 60 200 mV
over the full temperature
range
DC Output current IVHS (from VM to VHS) 4 mA
Current limit IVHSMAX (from VM to VHS) 15 mA
Series regulator transistor RVHSLV 400 1000 
output resistance (determines
voltage drop at low supply
voltages)
www.trinamic.com
Internal MOSFETs TMC2660 DC Characteristics

VVS = VVSX ≥ 12.0V, VBRX = 0V
N-channel MOSFET on RONN TJ = 25°C 63 76 mΩ
resistance
P-channel MOSFET on RONP TJ = 25°C 93 110 mΩ
resistance
N-channel MOSFET on RONN TJ = 150°C 110 mΩ
resistance
P-channel MOSFET on RONP TJ = 150°C 160 mΩ
resistance
Linear Regulator DC Characteristics

Output voltage V5VOUT I5VOUT = 10mA 4.75 5.0 5.25 V
TJ = 25°C
Output resistance R5VOUT Static load 3 
Deviation of output voltage V5VOUT(DEV) I5VOUT = 10mA 30 60 mV
over the full temperature TJ = full range
range
Output current capability I5VOUT VVS = 12V 100 mA
(attention, do not exceed VVS = 8V 60 mA
maximum ratings with DC
current) VVS = 6.5V 20 mA
Clock Oscillator and CLK Timing Characteristics

Input
Clock oscillator frequency fCLKOSC tJ=-50°C 10.0 14.3 MHz
Clock oscillator frequency fCLKOSC tJ=50°C 10.8 15.2 20.0 MHz
Clock oscillator frequency fCLKOSC tJ=150°C 15.4 20.3 MHz
External clock frequency fCLK 4 20 MHz
(operating)
External clock high / low level tCLK 12 ns
time
www.trinamic.com
Detector Levels DC Characteristics

VVS undervoltage threshold VUV 6.5 8 8.5 V
Short to GND detector VBMS2G 1.0 1.5 2.3 V
threshold
(VVS - VBMx)
Short to GND detector delay tS2G TS2G=00 2.0 3.2 4.5 µs
(low-side gate off detected to TS2G=10 1.6 µs
short detection)
TS2G=01 1.2 µs
TS2G=11 0.8 µs
Overtemperature warning tOTPW 80 100 120 °C
Overtemperature shutdown tOT Temperature rising 135 150 170 °C
Sense Resistor Voltage Levels DC Characteristics

Sense input peak threshold VSRTRIPL VSENSE=0
290 310 330 mV
voltage (low sensitivity) Cx=248; Hyst.=0
Sense input peak threshold VSRTRIPH VSENSE=1
153 165 180 mV
voltage (high sensitivity) Cx=248; Hyst.=0
Digital Logic Levels DC Characteristics

Input voltage low level d)
VINLO -0.3 0.8 V
Input voltage high level d) VINHI 2.4 VVIO+0.3 V
Output voltage low level VOUTLO IOUTLO = 1mA 0.4 V
Output voltage high level VOUTHI IOUTHI = -1mA 0.8VVIO V
Input leakage current IILEAK -10 10 µA
Note
Digital inputs left within or near the transition region substantially increase power supply current by
drawing power from the internal 5V regulator. Make sure that digital inputs become driven near to 0V
and up to the VIO I/O voltage. There are no on-chip pull-up or pull-down resistors on inputs.
www.trinamic.com
16.3 Thermal Characteristics

Parameter Symbol Conditions Typ Unit
Thermal resistance bridge RTHA14 one bridge chopping, 80 K/W
transistor junction to ambient, fixed polarity
soldered to 4 layer 20cm² PCB RTHA24 two bridges chopping, 50 K/W
(or 20cm² size per driver IC for fixed polarity
multiple driver board) RTHA44 Motor running 37 K/W
Thermal resistance bridge RTHA44a Motor running 28 K/W
transistor junction to ambient,
soldered to 4 layer 50cm² PCB
Power dissipation in bridge PBRIDGES 2A RMS per coil 2.6 W
MOSFETs (MOSFETs at 125°C) PBRIDGES 2.2A RMS per coil 3.2 W
24V, 30kHz chopper, fast slope PBRIDGES 2.8A RMS per coil 5.0 W
Additional for core PCORE 24V supply, 16MHz fCLK 0.28 W
When operating the device near its current limits, ensure a good thermal design of the PCB layout to
avoid overheating of the power integrated MOSFETs. Due to its multichip-construction with individual
heat transfer for each MOSFET of the power stage to the PCB using two pins, thermal characteristics
depend on the layout symmetry. The actual thermal resistance also depends on the duty cycle and the
die temperature. Use the thermal characteristics and the sample layout as a guideline for your own
board layout. In case, the driver is to be operated at high current levels, special care should be taken
to spread the heat generated by the driver power bridges efficiently within the PCB.
The worst-case thermal resistance occurs during motor stand still with the motor stopped in a half
step position (one coil full current, other coil 0), as well as cyclic in slow motion below 4FS/s. Assume
roughly 80°C/W, when there is only one bridge chopping. This is the worst-case scenario for heat-up.
In stand still, with two bridges chopping at identical current (fullstep position), thermal resistance is
reduced, because the power dissipation is distributed to more MOSFETs. Reduce stand still current to
68% or less, to compensate for both stand still scenarios. When the motor is running, calculate
thermal resistance for the complete chip (all 8 MOSFETs working).
The MOSFET and bond wire temperature should not exceed 150°C, despite temperatures up to 200°C
will not immediately destroy the devices. But the package plastics will apply strain onto the bond
wires, so that cyclic, repetitive exposure to temperatures above 150°C may damage the electrical
contacts and increase contact resistance and eventually lead to contract break. As the MOSFET
temperatures cannot be monitored within the system, it is a good practice to react to the temperature
pre-warning by reducing motor current, rather than relying on the overtemperature switch off.
Check MOSFET temperature under worst case conditions not to exceed 150°C using a thermal camera
to validate your layout. Please carefully check your layout against the sample layout or the layout of
the TMC2660-Evaluation board on the TRINAMIC website in order to ensure proper cooling of the IC!
Figure 16.1 TMC2660 operating at 2.3A RMS (3.2A peak) on a 50cm² sized board
www.trinamic.com
17 Package Mechanical Data

17.1 Dimensional Drawings
Attention: Drawings not to scale.
E
G
F
I
A
H K
Figure 17.1 Dimensional drawings (PQFP44)
Parameter Ref Min Nom Max

Size over pins (X and Y) A 12
Body size (X and Y) C 10
Pin length D 1
Total thickness E 1.6
Lead frame thickness F 0.09 0.2
Stand off G 0.05 0.10 0.15
Pin width H 0.30 0.45
Flat lead length I 0.45 0.75
Pitch K 0.8
Coplanarity ccc 0.08
17.2 Package Code

Device Package Temperature range Code/marking
TMC2660 PQFP44 (RoHS) -40° to +125°C TMC2660-PA
www.trinamic.com
18 Disclaimer
TRINAMIC Motion Control GmbH & Co. KG does not authorize or warrant any of its products for use in
life support systems, without the specific written consent of TRINAMIC Motion Control GmbH & Co.
KG. Life support systems are equipment intended to support or sustain life, and whose failure to
perform, when properly used in accordance with instructions provided, can be reasonably expected to
result in personal injury or death.
Information given in this data sheet is believed to be accurate and reliable. However, no
responsibility is assumed for the consequences of its use nor for any infringement of patents or other
rights of third parties which may result from its use.
Specifications are subject to change without notice.
All trademarks used are property of their respective owners.
19 ESD Sensitive Device

The TMC2660 is a ESD-sensitive CMOS device and sensitive to electrostatic discharge. Take special care
to use adequate grounding of personnel and machines in manual handling. After soldering the device
to the board, ESD requirements are more relaxed. Failure to do so can result in defects or decreased
reliability.
Note: In a modern SMD manufacturing process, ESD voltages well below 100V are standard. A major
source for ESD is hot-plugging the motor during operation. As the power MOSFETs are discrete
devices, the device in fact is very rugged concerning any ESD event on the motor outputs. All other
connections are typically protected due to external circuitry on the PCB.
www.trinamic.com
20 Table of Figures
Figure 1.1 Block diagram: applications........................................................................................................................... 4
Figure 2.1 TMC2660 pin assignment................................................................................................................................ 6
Figure 3.1 TMC2660 block diagram .................................................................................................................................. 8
Figure 4.1 stallGuard2 load measurement SG as a function of load .................................................................... 9
Figure 4.2 Linear interpolation for optimizing SGT with changes in velocity. ................................................. 10
Figure 5.1 Energy efficiency example with coolStep ................................................................................................ 12
Figure 5.2 coolStep adapts motor current to the load. ........................................................................................... 13
Figure 6.1 SPI Timing ........................................................................................................................................................ 15
Figure 6.2 Interfaces to a TMC429 motion controller chip and a TMC2660 motor driver ............................. 16
Figure 7.1 STEP and DIR timing. .................................................................................................................................... 26
Figure 7.2 Internal microstep table showing the first quarter of the sine wave. .......................................... 27
Figure 7.3 microPlyer microstep interpolation with rising STEP frequency. ..................................................... 28
Figure 8.1 Sense resistor grounding and protection components ...................................................................... 31
Figure 9.1 Chopper phases. ............................................................................................................................................. 32
Figure 9.2 spreadCycle chopper mode showing the coil current during a chopper cycle ........................... 34
Figure 9.3 Constant off-time chopper with offset showing the coil current during two cycles, ............... 35
Figure 9.4 Zero crossing with correction using sine wave offset. ....................................................................... 35
Figure 11.1 Short to GND detection timing. ............................................................................................................... 38
Figure 11.2 Undervoltage reset timing ......................................................................................................................... 40
Figure 13.1 Start-up requirements of CLK input ........................................................................................................ 42
Figure 15.1 Layout example for TMC2660 .................................................................................................................... 44
Figure 17.1 TMC2660 operating at 2.3A RMS (3.2A peak) on a 50cm² sized board ......................................... 49
Figure 18.1 Dimensional drawings (PQFP44) .............................................................................................................. 50
21 Revision History
Version Date Author Description
SD = Sonja Dwersteg
JP = Jonas Pröger
BD = Bernhard Dwersteg
1.00 2013-JUL-30 SD First complete version (based on V2.06 TMC260)

1.01 2013-AUG-01 BD Corrected power dissipation values, RDSon and added
thermal resistance for sample layout (p. 48, p50)
1.02 2013-OKT-30 SD - Layout example updated,
removed second example TMC4210+TMC2660 board
- Photo of evaluation board new.
- Signal descriptions updated.
1.03 2015-FEB-09 JP Corrected MRES table
1.04 2015-OCT-08 BD Hint to TMC2660-Evaluation board layout
1.05 2016-JUL-14 BD Added figure for start-up requirements for CLK input
1.06 2017-JUN-15 BD Updated evaluation board
1.07 2020-JUN-09 BD Updated Logo, Minor fixes
www.trinamic.com

TMC2660 Datasheet Rev1.07

Uploaded by

Copyright:

Available Formats

TMC2660 Datasheet Rev1.07

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

TMC2660 Datasheet Rev1.07

Uploaded by

Copyright:

Available Formats

POWER DRIVER FOR STEPPER MOTORS INTEGRATED CIRCUITS

TRINAMIC Motion Control GmbH & Co. KG

APPLICATION EXAMPLES: SMALL SIZE – BEST PERFORMANCE

TMC4210+TMC2660-EVAL EVALUATION-BOARD FOR 1 AXIS

This evaluation board is a development

Top level layout of TMC2660-EVAL

6 SPI INTERFACE ......................................15 17 PACKAGE MECHANICAL DATA .......... 50

6.1 BUS SIGNALS...............................................15 17.1 DIMENSIONAL DRAWINGS ........................... 50

Figure 1.1 Block diagram: applications

1.1 Key Concepts

1.2 Control Interfaces

1.2.1 SPI Interface

1.2.2 STEP/DIR Interface

1.3 Mechanical Load Sensing

1.4 Current Control

Figure 2.1 TMC2660 pin assignment

2.2 Signal Descriptions

Pin Number Type Function

Sine wave SIN &

1024 entry COS N-Gate G G

Figure 3.1 TMC2660 block diagram

PROMINENT FEATURES INCLUDE:

4 stallGuard2 Load Measurement

Figure 4.1 stallGuard2 load measurement SG as a function of load

Two parameters control stallGuard2 and one status value is returned.

Parameter Description Setting Comment

Status word Description Range Comment

4.1 Tuning the stallGuard2 Threshold

The procedure is:

4.1.1 Variable Velocity Operation

lower limit for stall back EMF reaches Motor RPM

4.1.2 Small Motors with High Torque Ripple and Resonance

4.1.3 Temperature Dependence of Motor Coil Resistance

4.1.4 Accuracy and Reproducibility of stallGuard2 Measurement

𝑠𝑡𝑎𝑙𝑙𝐺𝑢𝑎𝑟𝑑 𝑚𝑒𝑎𝑠𝑢𝑟𝑒𝑚𝑒𝑛𝑡 𝑒𝑟𝑟𝑜𝑟 = ±𝑚𝑎𝑥(1, |𝑆𝐺𝑇|)

4.2 stallGuard2 Measurement Frequency and Filtering

4.3 Detecting a Motor Stall

4.4 Limits of stallGuard2 Operation

5 coolStep Current Control

Reducing motor current by half results in reducing power by a factor of four.

Energy efficiency - power consumption decreased up to 75%.

Figure 5.1 Energy efficiency example with coolStep

Parameter Description Range Comment

motor current reduction area current setting CS

slow current reduction due

Figure 5.2 coolStep adapts motor current to the load.

Parameter Description Range Comment

5.1 Tuning coolStep

5.1.1 Response Time

5.1.2 Low Velocity and Standby Operation

6.1 Bus Signals

SCK bus clock input

6.2 Bus Timing

SDI bit19 bit18 bit0

SDO bit19 bit18 bit0

Figure 6.1 SPI Timing

6.3 Bus Architecture

Realtime event trigger POSCOMP Virtual stop switch SG_TST

Second driver and motor