DM74LS574 Octal D Flip-Flop With TRI-STATE Outputs: General Description

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DM74LS574 Octal D Flip-Flop with TRI-STATE Outputs

February 1992

DM74LS574
Octal D Flip-Flop with TRI-STATEÉ Outputs
General Description
The ’LS574 is a high speed low power octal flip-flop with a This device is functionally identical to the ’LS374 except for
buffered common Clock (CP) and a buffered common Out- the pinouts.
put Enable (OE). The information presented to the D inputs
is stored in the flip-flops on the LOW-to-HIGH Clock (CP)
transition.

Connection Diagram Logic Symbol


Dual-In-Line Package

TL/F/9815 – 2
VCC e Pin 20
GND e Pin 10

TL/F/9815 – 1
Order Number DM74LS574WM or DM74LS574N
See NS Package Number M20B or N20A

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

C1995 National Semiconductor Corporation TL/F/9815 RRD-B30M115/Printed in U. S. A.


Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required, Note: The ‘‘Absolute Maximum Ratings’’ are those values
please contact the National Semiconductor Sales beyond which the safety of the device cannot be guaran-
Office/Distributors for availability and specifications. teed. The device should not be operated at these limits. The
Supply Voltage 7V parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
Input Voltage 7V
The ‘‘Recommended Operating Conditions’’ table will define
Operating Free Air Temperature Range the conditions for actual device operation.
DM74LS 0§ C to a 70§ C
Storage Temperature Range b 65§ C to a 150§ C

Recommended Operating Conditions


DM74LS574
Symbol Parameter Units
Min Nom Max
VCC Supply Voltage 4.75 5 5.25 V
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IOH High Level Output Current b 2.6 mA
IOL Low Level Output Current 24 mA
TA Free Air Operating Temperature 0 70 §C
ts (H) Setup Time HIGH or LOW 20
ns
ts (L) Dn to CP 20
th (H) Hold Time HIGH or LOW 0
ns
th (L) Dn to CP 0
tw (H) CP Pulse Width 15
ns
tw (L) HIGH or LOW 15

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 1)
VI Input Clamp Voltage VCC e Min, II e b18 mA b 1.5 V
VOH High Level Output VCC e Min, IOH e Max,
2.4 3.3 V
Voltage VIL e Max, VIH e Min
VOL Low Level Output VCC e Min, IOL e Max,
0.35 0.5
Voltage VIL e Max, VIH e Min V
IOL e 12 mA, VCC e Min 0.25 0.4
II Input Current @ Max VCC e Max, VI e 7V
0.1 mA
Input Voltage
IIH High Level Input Current VCC e Max, VI e 2.7V 20 mA
IIL Low Level Input Current VCC e Max, VI e 0.4V b 400 mA
IOZH Off-State Output Current VCC e Max, VO e 2.4V
with High Level Output VIH e Min, VIL e Max 20 mA
Voltage Applied
IOZL Off-State Output Current VCC e Max, VO e 0.4V
with Low Level Output VIH e Min, VIL e Max b 20 mA
Voltage Applied

2
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) (Continued)

Typ
Symbol Parameter Conditions Min Max Units
(Note 1)
IOS Short Circuit (Note 2) VCC e Max
b 30 b 130 mA
Output Current
ICC Supply Current VCC e Max (Note 3) 45 mA
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 3: ICC is measured with the DATA inputs grounded and the OUTPUT CONTROLS at 4.5V.

Switching Characteristics
VCC e a 5.0V, TA e a 25§ C
RL e 2 kX,
Symbol Parameter CL e 45 pF Units
Min Max
fmax Maximum Clock Frequency 35 MHz
tPLH Propagation Delay 28
ns
tPHL CP to On 28
tPZH Output Enable Time 28
ns
tPZL 28
tPHZ Output Disable Time 20
ns
tPLZ 25

Functional Description Truth Table


The LS574 consists of eight edge-triggered flip-flops with
Inputs Outputs
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Outputs Enable are common to Dn CP OE On
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold times re- H L L H
quirements on the LOW-to-HIGH Clock (CP) transition. With L L L L
the Output Enable (OE) LOW, the contents of the eight flip- X X H Z
flops are available at the outputs. When the OE is HIGH, the H e HIGH Voltage Level
outputs go to the high impedence state. Operation of the L e LOW Voltage Level
OE input does not affect the state of the flip-flops. X e Immaterial
Z e High Impedance

Logic Diagram

TL/F/9815 – 3

3
4
Physical Dimensions inches (millimeters)

20-Lead Wide Small Outline Molded Package (M)


Order Number DM74LS574WM
NS Package Number M20B

5
DM74LS574 Octal D Flip-Flop with TRI-STATE Outputs
Physical Dimensions inches (millimeters)

20-Lead Molded Dual-In-Line Package (N)


Order Number DM74LS574N
NS Package Number N20A

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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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