DM5490/DM7490A, DM7493A Decade and Binary Counters: General Description
DM5490/DM7490A, DM7493A Decade and Binary Counters: General Description
DM5490/DM7490A, DM7493A Decade and Binary Counters: General Description
DM5490/DM7490A, DM7493A
July 1992
DM5490/DM7490A, DM7493A
Decade and Binary Counters
General Description
Each of these monolithic counters contains four master- described in the appropriate truth table. A symmetrical di-
slave flip-flops and additional gating to provide a divide-by- vide-by-ten count can be obtained from the 90A counters by
two counter and a three-stage binary counter for which the connecting the QD output to the A input and applying the
count cycle length is divide-by-five for the 90A and divide- input count to the B input which gives a divide-by-ten square
by-eight for the 93A. wave at output QA.
All of these counters have a gated zero reset and the 90A
also has gated set-to-nine inputs for use in BCD nine’s com- Features
plement applications. Y Typical power dissipation
To use their maximum count length (decade or four-bit bina- Ð 90A 145 mW
ry), the B input is connected to the QA output. The input Ð 93A 130 mW
count pulses are applied to input A and the outputs are as Y Count frequency 42 MHz
Connection Diagrams
Dual-In-Line Package
TL/F/6533 – 1
Order Number DM5490J, DM5490W or DM7490AN
See NS Package Number J14A, N14A or W14B
Dual-In-Line Package
TL/F/6533 – 2
Order Number DM7493AN
See NS Package Number N14A
2
’90A Switching Characteristics
at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load)
RL e 400X
From (Input)
Symbol Parameter CL e 15 pF Units
To (Output)
Min Max
fMAX Maximum Clock A to QA 32
MHz
Frequency B to QB 16
tPLH Propagation Delay Time
A to QA 16 ns
Low to High Level Output
tPHL Propagation Delay Time
A to QA 18 ns
High to Low Level Output
tPLH Propagation Delay Time
A to QD 48 ns
Low to High Level Output
tPHL Propagation Delay Time
A to QD 50 ns
High to Low Level Output
tPLH Propagation Delay Time
B to QB 16 ns
Low to High Level Output
tPHL Propagation Delay Time
B to QB 21 ns
High to Low Level Output
tPLH Propagation Delay Time
B to QC 32 ns
Low to High Level Output
tPHL Propagation Delay Time
B to QC 35 ns
High to Low Level Output
tPLH Propagation Delay Time
B to QD 32 ns
Low to High Level Output
tPHL Propagation Delay Time
B to QD 35 ns
High to Low Level Output
tPLH Propagation Delay Time SET-9 to
30 ns
Low to High Level Output QA, QD
tPHL Propagation Delay Time SET-9 to
40 ns
High to Low Level Output QB, QC
tPHL Propagation Delay Time SET-0
40 ns
High to Low Level Output Any Q
3
Recommended Operating Conditions
DM7493A
Symbol Parameter Units
Min Nom Max
VCC Supply Voltage 4.75 5 5.25 V
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IOH High Level Output Current b 0.8 mA
IOL Low Level Output Current 16 mA
fCLK Clock Frequency A 0 32
MHz
(Note 5) B 0 16
tW Pulse Width A 15
(Note 5) B 30 ns
Reset 15
tREL Reset Release Time (Note 5) 25 ns
TA Free Air Operating Temperature 0 70 §C
4
’93A Switching Characteristics
at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load)
RL e 400X
From (Input)
Symbol Parameter CL e 15 pF Units
To (Output)
Min Max
fMAX Maximum Clock A to QA 32 MHz
Frequency B to QB 16
tPLH Propagation Delay Time A to
16 ns
Low to High Level Output QA
tPHL Propagation Delay Time A to
18 ns
High to Low Level Output QA
tPLH Propagation Delay Time A to
70 ns
Low to High Level Output QD
tPHL Propagation Delay Time A to
70 ns
High to Low Level Output QD
tPLH Propagation Delay Time B to
16 ns
Low to High Level Output QB
tPHL Propagation Delay Time B to
21 ns
High to Low Level Output QB
tPLH Propagation Delay Time B to
32 ns
Low to High Level Output QC
tPHL Propagation Delay Time B to
35 ns
High to Low Level Output QC
tPLH Propagation Delay Time B to
51 ns
Low to High Level Output QD
tPHL Propagation Delay Time B to
51 ns
High to Low Level Output QD
tPHL Propagation Delay Time SET-0
High to Low Level Output to 40 ns
Any Q
5
Function Tables (Note D)
90A 90A 93A
BCD Count Sequence BCD Bi-Quinary (5-2) Count Sequence
(See Note A) (See Note B) (See Note C)
Outputs Outputs Outputs
Count Count Count
QD QC QB QA QA QD QC QB QD QC QB QA
0 L L L L 0 L L L L 0 L L L L
1 L L L H 1 L L L H 1 L L L H
2 L L H L 2 L L H L 2 L L H L
3 L L H H 3 L L H H 3 L L H H
4 L H L L 4 L H L L 4 L H L L
5 L H L H 5 H L L L 5 L H L H
6 L H H L 6 H L L H 6 L H H L
7 L H H H 7 H L H L 7 L H H H
8 H L L L 8 H L H H 8 H L L L
9 H L L H 9 H H L L 9 H L L H
10 H L H L
11 H L H H
12 H H L L
13 H H L H
14 H H H L
15 H H H H
90A 93A
Reset/Count Function Table Reset/Count Function Table
Reset Inputs Outputs Reset Inputs Outputs
R0(1) R0(2) R9(1) R9(2) QD QC QB QA R0(1) R0(2) QD QC QB QA
H H L X L L L L H H L L L L
H H X L L L L L L X COUNT
X X H H H L L H X L COUNT
X L X L COUNT
Note A: Output QA is connected to input B for BCD count.
L X L X COUNT
Note B: Output QD is connected to input A for bi-quinary count.
L X X L COUNT
Note C: Output QA is connected to input B.
X L L X COUNT
Note D: H e High Level, L e Low Level, X e Don’t Care.
6
Logic Diagrams
90A 93A
TL/F/6533 – 4
TL/F/6533 – 3
The J and K inputs shown without connection are for reference only and are functionally at a high level.
7
8
Physical Dimensions inches (millimeters)
9
DM5490/DM7490A, DM7493A
Decade and Binary Counters
Physical Dimensions inches (millimeters) (Continued)
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.