6.012 Microelectronic Devices and Circuits Spring 2005

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6.

012 Microelectronic Devices and Circuits

Spring 2005

_____________________________________________________________

March 9, 2005
Quiz #1

Problem #points

NAME___________________________________ 1___________

RECITATION TIME___________________________ 2___________

3___________

Total______________

General guidelines (please read carefully before starting):

• Make sure to write your name on the space provided above.


• Open book: you can use any material you wish. But no computers.
• All answers should be given in the space provided. Please do not turn in any
extra material.
• You have 120 minutes to complete the quiz.
• Make reasonable approximations and state them, i.e. low-level injection, extrinsic
semiconductor, quasi-neutrality, etc.
• Partial credit will be given for setting up problems without calculations. NO credit
will be given for answers without reasons.
• Use the symbols utilized in class for the various physical parameters, i.e. Na, τ, ε,
etc.
• Pay attention to problems in which numerical answers are expected. An
algebraic answer will not accrue full points. Every numerical answer must have
the proper units next to it. Points will be subtracted for answers without units or
with wrong units. In situations with a defined axis, the sign of the result is also
part of the answer.

Unless otherwise stated, use:

q = 1.6 X 10-19 C

kT/q = 25 mV at room temperature

ni = 1010 cm-3 for silicon at room temperature

εsi = 10-12 F/cm εox = 3.45X10-13 F/cm

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1. (30 points)
Consider two pn-junction diodes that have identical uniform doping profiles, but differ in
substrate – one is made of silicon, and one is made of a silicon-germanium alloy (SiGe).
Assume the intrinsic carrier concentration for SiGe at room temperature is
approximately 1013 cm-3 and εSiGe = 1.5 x 10-12 F/cm

Si SiGe

p n p n

Na = 1018 cm-3 Nd = 1015 cm-3 Na = 1018 cm-3 Nd = 1015 cm-3

a) Calculate the built in potential for both the silicon and SiGe diodes.

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b) Calculate the ratio of the depletion width on the n-side of the two diodes xno in
thermal equilibrium. [i.e. xno(Si)/ xno(SiGe)]

c) Calculate the ratio of the electric fields at the metallurgical junction of the two
diodes in thermal equilibrium. [i.e. Eo(Si)/Eo(SiGe)]

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2. (35 Points)
An n+ polysilicon gate (Nd > 1020 cm-3) MOS capacitor with p-type Si body has a
capacitance-voltage plot shown below. The maximum capacitance per unit area
Cmax = 1.7 x 10-7 F/cm2, while the minimum capacitance per unit area
Cmin = 6.2 x 10-8 F/cm2. Assume φn+ = 0.55 V.

Cmax

Cmin
VGB
0 0.8V 3.8V

a) What region of operation is the device in for VGB = 3.8V?

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b) For the device in part (a), derive an expression for the depletion region width xd
at VGB = 3.8V, in terms of Cmin and Cmax and fundamental parameters (e.g. q, εox,
εs, etc.)

c) For the device in part (a), if the magnitude of the gate charge |QG| = 6.74 x 10-7
C/cm2, at VGB = 3.8V, derive an expression for the doping Na, in terms of Cmin,
Cmax and other fundamental parameters.

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d) Calculate Na from part (c) assuming |QG| = 6.74 x 10-7 C/cm2 and the other
parameters given in (a) above:

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3. (35 points)
You are given an MOS transistor with the device parameters shown below.

ID W = 10µm
+ VDS
- COX = 10-7 F/cm2
µn = 200 cm2/V-s
3V +
- VTn = 1V

A drain-to-source voltage is applied resulting in the electric field at the source


Ey (0) = -3.75 x 103 V/cm and at the drain Ey(L) = -7.5 x103 V/cm
a) Calculate ID .

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b) Calculate the VDS applied.

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c) Calculate the channel length L of this device.

d) What region of operation is the transistor biased? (Circle one and explain.)
Cutoff Triode Saturation

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6.012 Microelectronic Devices and Circuits


Spring 2009

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