TM

MP8040
High Current
Power Half Bridge
TM
The Future of Analog IC Technology

DESCRIPTION FEATURES
The MP8040 is a general purpose, high • ±9A Peak Current Output
frequency half bridge power driver capable of • ±4.25A Continuous Current Output
driving a 9A load. The device integrates both • Up to 1.2MHz Switching Frequency
top and bottom N-Channel MOSFET power • Protected Integrated Power 100mΩ Switches
switches and is fully protected from both • All Switches Current Limited
sourcing and sinking current by a preset • Integrated Under-Voltage Protection
cycle-by-cycle current limit. It has a wide input • Integrated Thermal Protection
voltage range from 7.5V to 25V.
• 2.5µA Standby Mode
The MP8040 features a low-current shutdown • True 2-Quadrant Operation
mode, input under-voltage protection, thermal • Sources and Sinks Current
shutdown, and fault flag signal output. It • Fault Indicator Output
interfaces with standard logic signals and is
available in a small 8-pin SOIC with exposed APPLICATIONS
pad package. • Class D Audio Driver
EVALUATION BOARD REFERENCE o 25W/4Ω/10% Output Power Single Ended
o 70W/4Ω/10% Output Power Full Bridge
Board Number Dimensions • Full or Half Bridge DC-DC Switching Regulator
EV0041 3.5”X x 3.5”Y x 1.2”Z • Motor Driver
“MPS” and “The Future of Analog IC Technology” are Trademarks of
Monolithic Power Systems, Inc.

TYPICAL APPLICATION
VSP

2
+
SP
7
DRV

8 MP8040
FAULT FLT
6 5
ENABLE SHDN BS
47nF
PWM INPUT 1 3
PWM SW VOUT
SIGNAL GND
4
MP8040_TAC_S01

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1)

SP Supply Voltage (VSP) .............................. 28V
SW Pin Voltage .............................. –0.3V to VSP
TOP VIEW SW to BS ....................................... –0.3V to +6V
Voltage at All Other Pins ............... –0.3V to +6V
PWM 1 8 FLT
Storage Temperature .............. –55°C to +150°C
SP 2 7 DRV
(2)
SW 3 6 SHDN
Recommended Operating Conditions
SP Supply Voltage (VSP) .................. 7.5V to 24V
GND 4 5 BS
Peak Output Current ...................... 9A Maximum
EXPOSED PAD MP8040_PD01-SOIC8N Operating Temperature ............. –40°C to +85°C
ON BACKSIDE (3)
CONNECT TO PIN 4 Thermal Resistance θJA θJC
SOIC8N .................................. 50 ....... 8.... °C/W
Part Number* Package Temperature Notes:
1) Exceeding these ratings may damage the device.
SOIC8N 2) The device is not guaranteed to function outside of its
MP8040DN –40°C to +85°C
(Exposed Pad) operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
* For Tape & Reel, add suffix –Z (eg. MP8040DN–Z)
For Lead Free, add suffix –LF (eg. MP8040DN–LF–Z)

ELECTRICAL CHARACTERISTICS
VSP = 12V, VSHDN = 0V, TA = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
SP Operating Current 1.5 2.5 mA
SP Shutdown Current VSHDN = 2V 2.5 10 µA
SHDN, SP Threshold Low 1 V
SHDN, SP Threshold High 2 V
SHDN, SP Input Bias Current 1 µA
SW On Resistance VSP = 7.5V, High-Side and Low-Side 0.1 Ω
VPWM = 5, (Sinking) 9 A
SW Current Limit (4)
VPWM = 0, (Sourcing) 9 A
SW Switching Frequency VPWM = 0 to 2V, 50% Duty Cycle 1.2 MHz
(5) VSP = 7.5V, VPWM = 2V, CSW 100nF,
SW Maximum Duty Cycle 99.5 %
fSW = 3.3kHz
SW Rise/Fall Time VPWM = 0 to 5V 20 ns
PWM Pulse Width VPWM = 0 to 2V, High or Low Pulse 200 ns
PWM to SW Delay Time Rising VPWM = 0 to 5V 70 ns
PWM to SW Delay Time
VPWM = 5 to 0V 70 ns
Falling
Thermal Shutdown
TJ Rising, Hysteresis = 20°C 160 °C
Temperature (4)
Notes:
4) Not production tested.
5) SW drives low for 1.5µs every 300µs to charge the BS to SW capacitor.

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

TYPICAL PERFORMANCE CHARACTERISTICS

Circuit of Figure 4, TA = +25°C, unless otherwise noted.
Delay Time Delay Time
SW Falling (VSP=8V) SW Rising (VSP=8V)

VPWM VPWM
2V/div. 2V/div.

VSW VSW
5V/div. 5V/div.

10.0ns/div. 10.0ns/div.

MP8040-TPC01 MP8040-TPC02

Delay Time Delay Time

SW Falling (VSP=25V) SW Rising (VSP=25V)

VPWM VPWM
2V/div. 2V/div.

VSW VSW
10V/div. 10V/div.

10.0ns/div. 10.0ns/div.

MP8040-TPC03 MP8040-TPC04

20

2
THD+N (%)

0.2
0.1

0.02
0.01
200m 1 2 10 20 100
OUTPUT POWER (W)
MP8040-TPC05

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

PIN FUNCTIONS
Pin # Name Description
Driver Logic Input. Drive PWM with the signal that controls the MP8040 output. Drive PWM
1 PWM
high to turn on the high-side switch; drive PWM low to turn on the low-side switch.
Power Supply Input. Connect SP to the positive side of the input power supply. Bypass SP
2 SP
to GND as close to the IC as possible.
Switched Output. SW is the power output of the MP8040. Connect the output LC filter to
3 SW
SW. SW is valid approximately 100µs after SP goes high.
4 GND Ground. (Note: Connect the exposed pad on the bottom side to Pin 4).
Bootstrap Supply. BS powers the high-side gate of the MP8040. Connect a 0.1µF or
5 BS
greater capacitor between BS and SW.
Shutdown Input. SHDN enables/disables the MP8040. Drive SHDN low to turn on the
6 SHDN
MP8040, drive it high to turn it off. If not used, connect SHDN to GND.
Gate Drive Supply Bypass. The voltage at DRV is supplied from an internal regulator from
7 DRV SP. DRV powers the internal circuitry and internal MOSFET gate drives. Bypass DRV to
GND with a 0.1µF to 10µF capacitor.
Fault Output. Active-low, open drain. A low output at FLT indicates that the MP8040 has
8 FLT
detected a fault and has shutdown. Connect FLT to DRV through a 100kΩ resistor.

OPERATION
The MP8040 is a general purpose, power It operates at frequencies up to 1.2MHz, can
driver. It takes a logic input and drives a half accept a DC supply voltage as high as 25V,
bridge comprised of 0.1Ω high-side and and produce peak output current as high as 9A.
low-side N-Channel MOSFET switches.

5 BS
DBS
BS
UVLO
INTERNAL
5V REG.
CURRENT THERMAL
LIMIT & SHUTDOWN
FEEDBACK UVLO 2 SP

DRV 7

HI DRIVE

PWM 1 LOGIC 3 SW

FLT 8 LO DRIVE

SHDN 6 4 GND

MP8040_F02

Figure 1—Function Block Diagram

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

SW Output Thermal Shutdown

The SW output drives the load. It is controlled The MP8040 includes a thermal overload
by the logic input signal at PWM. When the protection circuit. If the die temperature rises
signal at PWM is high (above 2V), the high-side above 160°C, the output switches are turned off
switch is turned on. When the signal at PWM is and the fault output is asserted. Once the
low (less than 0.4V), the low-side switch is thermal overload circuit is tripped, the die
turned on. temperature must drop below 140°C before
automatically restarting.
The MP8040 uses internal N-Channel
MOSFETs for both the high-side and low-side VSP
switches. The high-side MOSFET gate drive is
2
powered from the voltage between SW and BS,
allowing BS to rise above the SP input voltage SP

to power the high-side MOSFET. To do this a

bootstrap capacitor is connected between SW MP8040
3
SW
and BS. When the low-side switch is on, the
GND
capacitor is internally charged from the voltage
4
at DRV, which is also internally generated.
There is a dead time region (typically 40ns)
where both the upper and lower switches are
off (see Figure 2). SW
Both the high-side and low-side switches have VSP
internal current limits to prevent failure due to
excessive load current. Once the current limit is
reached, both output switches are turned off 3/4 VSP
and the fault output is asserted (driven low).
Shutdown 1/2 VSP
The MP8040 includes a 2.5µA shutdown mode.
When SHDN is high, both output switches are 1/4 VSP
turned off and the input current drops to 2.5µA.
When the MP8040 is shutdown, the internally
TIME
generated voltage at DRV drops to 0V, and the
fault output (FLT) is asserted (driven low). If the
DT (RISE) DT (FALL)
shutdown mode is not used, connect SHDN
directly to GND. DEAD TIME RISING = 20ns
DEAD TIME FALLING = 40ns MP8040_F01

Fault Output
The MP8040 includes a fault indicator output Figure 2—Dead Time
(FLT). This is an active-low open drain output.
The MP8040 detects faults due to over-current
(>9A), over-temperature (>160°C), under-
voltage at SP (<6.5V), or if the part is disabled.
Connect FLT to DRV or to an external voltage
up to 6V through a 27kΩ or greater resistor.
When any of the 3 fault conditions are detected,
both output switches are turned off and the SW
output is high-impedance.

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

TYPICAL APPLICATION CIRCUITS

VSP VSP

+ 2
2 +
7 SP
DRV
7 SP
DRV 5
BS
5
BS
8
FLT MP8040
8 FAULT
FAULT FLT MP8040 PWM 6
SHDN 3
CONTROLLER ENABLE SW VOUT
6 1
ENABLE SHDN 3 PWM
SW PWM

+
SIGNAL GND
PWM 1 4
PWM
SIGNAL
GND
4

MP8040_F03

MP8040_F04

Figure 3—Single Ended Audio Amplifier Figure 4—General Purpose DC to DC

Converter

VSP VSP

2 +
2
+
7 SP 7 SP
DRV DRV

BS
5 5
BS

8
FAULT FLT MP8040 8
FAULT FLT MP8040
6
ENABLE SHDN 3
SW 6
DIGITAL 1 ENABLE SHDN 3
PWM
SW
AUDIO
SIGNAL GND
PWM 1
4 PWM
SIGNAL
GND
VSP 4

VSP
2
7 SP
+ M
DRV
5
BS 2 +
7 SP
8 DRV
FAULT FLT MP8040
5
6 BS
ENABLE SHDN 3
SW
1 8
PWM FAULT FLT MP8040
GND
4 6
ENABLE SHDN 3
SW
MP8040_F05

1
PWM
GND
4

MP8040_F06

Figure 5—80W Full Bridge Audio Amplifier Figure 6—Full Bridge Motor Driver

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

VSP

2 +

7 SP
DRV
5
BS

8
I/O FLT MP8040
FAULT
6
I2C MICRO I/O SHDN 3
CONTROLLER ON/OFF SW
1
PWM PWM
GND
ADC1 ADC2 ADC3
4

MP8040_F07

Figure 7—CCFL Driver Circuit

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MP8040 – HIGH CURRENT POWER HALF BRIGDE

PACKAGE INFORMATION
SOIC8N (EXPOSED PAD)
0.189(4.80) 0.124(3.15)
0.197(5.00) 0.136(3.45)
8 5

0.150(3.80) 0.228(5.80) 0.089(2.26)

PIN 1 ID 0.157(4.00) 0.244(6.20) 0.101(2.56)

1 4

TOP VIEW BOTTOM VIEW

SEE DETAIL "A"

0.051(1.30)
0.067(1.70)
0.0075(0.19)
SEATING PLANE
0.0098(0.25)
0.000(0.00)
0.013(0.33) 0.006(0.15)
0.020(0.51) SIDE VIEW
0.050(1.27)
BSC

FRONT VIEW 0.010(0.25)

x 45o
0.020(0.50)

GAUGE PLANE
0.010(0.25) BSC

0.024(0.61) 0.050(1.27)
0.016(0.41)
0o-8o 0.050(1.27)
0.063(1.60)
DETAIL "A"

0.103(2.62) 0.213(5.40)

0.138(3.51)

RECOMMENDED LAND PATTERN

NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.

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