LM317, NCV317

Voltage Regulator -
Adjustable Output, Positive
1.5 A
The LM317 is an adjustable 3−terminal positive voltage regulator
capable of supplying in excess of 1.5 A over an output voltage range of
1.2 V to 37 V. This voltage regulator is exceptionally easy to use and www.onsemi.com
requires only two external resistors to set the output voltage. Further, it
employs internal current limiting, thermal shutdown and safe area
compensation, making it essentially blow−out proof.
The LM317 serves a wide variety of applications including local, on
card regulation. This device can also be used to make a programmable D2PAK−3
output regulator, or by connecting a fixed resistor between the D2T SUFFIX
adjustment and output, the LM317 can be used as a precision current 1 2 CASE 936
regulator. 3

Features Heatsink surface (shown as terminal 4 in

• Output Current in Excess of 1.5 A case outline drawing) is connected to Pin 2.

• Output Adjustable between 1.2 V and 37 V

• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting Constant with Temperature
• Output Transistor Safe−Area Compensation
TO−220
• Floating Operation for High Voltage Applications T SUFFIX
• Eliminates Stocking many Fixed Voltages CASE 221AB

• Available in Surface Mount D2PAK−3, and Standard 3−Lead

1
Transistor Package 2 Pin 1. Adjust
3 2. Vout
• NCV Prefix for Automotive and Other Applications Requiring 3. Vin
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable Heatsink surface connected to Pin 2.

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Vin Vout ORDERING INFORMATION
LM317 See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
R1
240
IAdj Adjust
+ C **
Cin* O DEVICE MARKING INFORMATION
0.1 mF 1.0 mF See general marking information in the device marking
section on page 10 of this data sheet.
R2

**Cin is required if regulator is located an appreciable distance from power supply filter.
**CO is not needed for stability, however, it does improve transient response.

ǒR
Ǔ
V out + 1.25V 1 ) 2  ) I R 2
R1 Adj

Since IAdj is controlled to less than 100 mA, the error associated with this term is
negligible in most applications.

Figure 1. Standard Application

© Semiconductor Components Industries, LLC, 2016 1 Publication Order Number:

October, 2019 − Rev. 16 LM317/D
 LM317, NCV317

MAXIMUM RATINGS
Rating Symbol Value Unit
Input−Output Voltage Differential VI−VO −0.3 to 40 Vdc
Power Dissipation
Case 221A
TA = +25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient qJA 65 °C/W
Thermal Resistance, Junction−to−Case qJC 5.0 °C/W
Case 936 (D2PAK−3)
TA = +25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient qJA 70 °C/W
Thermal Resistance, Junction−to−Case qJC 5.0 °C/W
Operating Junction Temperature Range TJ −55 to +150 °C
Storage Temperature Range Tstg −65 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS
(VI−VO = 5.0 V; IO = 0.5 A for D2T and T packages; TJ = Tlow to Thigh (Note 1); Imax and Pmax (Note 2); unless otherwise noted.)
Characteristics Figure Symbol Min Typ Max Unit
Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ VI−VO ≤ 40 V 1 Regline − 0.01 0.04 %/V
Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax 2 Regload
VO ≤ 5.0 V − 5.0 25 mV
VO ≥ 5.0 V − 0.1 0.5 % VO
Thermal Regulation, TA = +25°C (Note 4), 20 ms Pulse − Regtherm − 0.03 0.07 % VO/W
Adjustment Pin Current 3 IAdj − 50 100 mA
Adjustment Pin Current Change, 2.5 V ≤ VI−VO ≤ 40 V, 1, 2 DIAdj − 0.2 5.0 mA
10 mA ≤ IL ≤ Imax, PD ≤ Pmax
Reference Voltage, 3.0 V ≤ VI−VO ≤ 40 V, 10 mA ≤ IO ≤ Imax, PD ≤ Pmax 3 Vref 1.2 1.25 1.3 V
Line Regulation (Note 3), 3.0 V ≤ VI−VO ≤ 40 V 1 Regline − 0.02 0.07 %/V
Load Regulation (Note 3), 10 mA ≤ IO ≤ Imax 2 Regload
VO ≤ 5.0 V − 20 70 mV
VO ≥ 5.0 V − 0.3 1.5 % VO
Temperature Stability (Tlow ≤ TJ ≤ Thigh) 3 TS − 0.7 − % VO
Minimum Load Current to Maintain Regulation (VI−VO = 40 V) 3 ILmin − 3.5 10 mA
Maximum Output Current 3 Imax A
VI−VO ≤ 15 V, PD ≤ Pmax, T Package 1.5 2.2 −
VI−VO = 40 V, PD ≤ Pmax, TA = +25°C, T Package 0.15 0.4 −
RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz − N − 0.003 − % VO
Ripple Rejection, VO = 10 V, f = 120 Hz (Note 5) 4 RR dB
Without CAdj − 65 −
CAdj = 10 mF 66 80 −
Thermal Shutdown (Note 6) − − − 180 − °C
Long−Term Stability, TJ = Thigh (Note 7), TA = +25°C for 3 S − 0.3 1.0 %/1.0
Endpoint Measurements kHrs.
Thermal Resistance Junction−to−Case, T Package − RqJC − 5.0 − °C/W
1. Tlow to Thigh = 0° to +125°C, for LM317T, D2T. Tlow to Thigh = − 40° to +125°C, for LM317BT, BD2T, Tlow to Thigh = − 55° to +150°C, for
NCV317BT, BD2T.
2. Imax = 1.5 A, Pmax = 20 W
3. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
4. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die.
These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these
temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.
5. CAdj, when used, is connected between the adjustment pin and ground.
6. Thermal characteristics are not subject to production test.
7. Since Long−Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.

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2
 LM317, NCV317

Vin
310 310 230 120 5.6 k
6.3 V

170
6.7 k 12 k 160
5.0 pF 13 k
125 k 12.4 k 200
135 6.8 k 510
6.3 V

30pF 30pF 2.4 k 105

6.3 V

4.0
190 3.6 k 5.8 k 110 5.1 k 12.5 k

0.1
Vout

Adjust
This device contains 29 active transistors.

Figure 2. Representative Schematic Diagram

VCC
|V –V |
VIH OH OL VOH
* LineRegulation(%ńV) + x100
VIL |V | VOL
OL
Vin Vout
LM317

*Pulse testing required. Adjust

*1% Duty Cycle R1 240 +
*is suggested. IAdj 1%
Cin 0.1 mF CO 1.0 mF RL

R2
1%

Figure 3. Line Regulation and DIAdj/Line Test Circuit

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3
 LM317, NCV317

VI Vin Vout
LM317 IL
VO (min Load)
RL VO (max Load)
(max Load)
Adjust 240 RL
R1 1% *
(min Load)
+
Cin 0.1 mF IAdj CO 1.0 mF

*Pulse testing required.

R2 *1% Duty Cycle is suggested.
1%

VO (min Load) - VO (max Load)

Load Regulation (mV) = VO (min Load) - VO (max Load) Load Regulation (% VO) = x 100
VO (min Load)

Figure 4. Load Regulation and DIAdj/Load Test Circuit

Vin Vout
LM317 IL

Adjust
240
VI R1 1% Vref RL
IAdj +
Cin 0.1 mF CO 1.0 mF VO

ISET

R2
1%

* Pulse testing required. To Calculate R2: Vout = ISET R2 + 1.250 V

* 1% Duty Cycle is suggested. To Calculate R2: Assume ISET = 5.25 mA

Figure 5. Standard Test Circuit

24 V
Vin Vout
14 V LM317
f = 120 Hz

D1*
Adjust R1 240 RL
1% 1N4002 Vout = 10 V
+
Cin 0.1 mF CO 1.0 mF VO

+
1.65 k CAdj 10 mF
R2 1%

*D1 Discharges CAdj if output is shorted to Ground.

Figure 6. Ripple Rejection Test Circuit

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4
 LM317, NCV317

4.0
ΔVout, OUTPUT VOLTAGE CHANGE (%)
0.4

I out , OUTPUT CURRENT (A)

0.2 3.0

0 IL = 0.5 A TJ = 25°C

-0.2 2.0
IL = 1.5 A 150°C
-0.4
Vin = 15 V
-0.6 1.0 -55°C
Vout = 10 V
-0.8

-1.0 0
-50 -25 0 25 50 75 100 125 150 0 10 20 30 40
TJ, JUNCTION TEMPERATURE (°C) Vin-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

Figure 7. Load Regulation Figure 8. Current Limit

3.0
I Adj, ADJUSTMENT PIN CURRENT ( μA)

V in-Vout, INPUT-OUTPUT VOLTAGE

70 DVout = 100 mV
IL = 1.5 A
65 2.5
DIFFERENTIAL (Vdc)
60
1.0 A
55 2.0
50
500 mA
45 1.5
200 mA
40
20 mA
35 1.0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

Figure 9. Adjustment Pin Current Figure 10. Dropout Voltage

5.0
ILmin , MINIMUM OPERATING CURRENT (mA)

1.26
4.5
Vref, REFERENCE VOLTAGE (V)

TJ = -55°C
4.0
1.25 +25°C
3.5
+150°C
3.0
1.24 2.5
2.0
1.5
1.23
1.0
0.5
1.22 0
-50 -25 0 25 50 75 100 125 150 0 10 20 30 40
TJ, JUNCTION TEMPERATURE (°C) Vin-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

Figure 11. Temperature Stability Figure 12. Minimum Operating Current

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5
 LM317, NCV317

100
CAdj = 10 mF
120
RR, RIPPLE REJECTION (dB)
80

RR, RIPPLE REJECTION (dB)

100
Without CAdj
60 CAdj = 10 mF
80
Without CAdj
40 60

Vin - Vout = 5 V 40
IL = 500 mA Vin = 15 V
20 f = 120 Hz Vout = 10 V
20 f = 120 Hz
TJ = 25°C
TJ = 25°C
0 0
0 5.0 10 15 20 25 30 35 0.01 0.1 1.0 10
Vout, OUTPUT VOLTAGE (V) IO, OUTPUT CURRENT (A)

Figure 13. Ripple Rejection versus Output Figure 14. Ripple Rejection versus
Voltage Output Current

100 101
RR, RIPPLE REJECTION (dB)

80 IL = 500 mA Z O, OUTPUT IMPEDANCE ()

Ω 100
Vin = 15 V
Vin = 15 V Vout = 10 V
Vout = 10 V IL = 500 mA
60 TJ = 25°C TJ = 25°C
10-1
40 Without CAdj
10-2
20
CAdj = 10 mF CAdj = 10 mF
Without CAdj
0 10-3
10 100 1.0 k 10 k 100 k 1.0 M 10 M 10 100 1.0 k 10 k 100 k 1.0 M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)

Figure 15. Ripple Rejection versus Frequency Figure 16. Output Impedance
VOLTAGE DEVIATION (V)

VOLTAGE DEVIATION (V)

ΔVout , OUTPUT

3.0
ΔVout , OUTPUT

1.5 2.0
1.0 1.0 CL = 1.0 mF;
CL = 1.0 mF; CAdj = 10 mF
0.5 CAdj = 10 mF 0
0 -1.0
Vin = 15 V
-0.5 -2.0 Vout = 10 V
Vout = 10 V CL = 0;
-1.0 -3.0 INL = 50 mA
VOTLAGE CHANGE (V)

IL = 50 mA Without CAdj
CL = 0; TJ = 25°C
-1.5 TJ = 25°C
ΔV in , INPUT

1.5
Without CAdj
CURRENT (A)
IL , LOAD

1.0 1.0
Vin IL
0.5 0.5
0 0
0 10 20 30 40 0 10 20 30 40
t, TIME (ms) t, TIME (ms)

Figure 17. Line Transient Response Figure 18. Load Transient Response

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 LM317, NCV317

APPLICATIONS INFORMATION

Basic Circuit Operation External Capacitors

The LM317 is a 3−terminal floating regulator. In A 0.1 mF disc or 1.0 mF tantalum input bypass capacitor
operation, the LM317 develops and maintains a nominal (Cin) is recommended to reduce the sensitivity to input line
1.25 V reference (Vref) between its output and adjustment impedance.
terminals. This reference voltage is converted to a The adjustment terminal may be bypassed to ground to
programming current (IPROG) by R1 (see Figure 17), and this improve ripple rejection. This capacitor (CAdj) prevents
constant current flows through R2 to ground. ripple from being amplified as the output voltage is
The regulated output voltage is given by: increased. A 10 mF capacitor should improve ripple
R
ǒ Ǔ
V out + V  1 ) 2  ) I R 2
ref R1 Adj
rejection about 15 dB at 120 Hz in a 10 V application.
Although the LM317 is stable with no output capacitance,
like any feedback circuit, certain values of external
Since the current from the adjustment terminal (IAdj) capacitance can cause excessive ringing. An output
represents an error term in the equation, the LM317 was capacitance (CO) in the form of a 1.0 mF tantalum or 25 mF
designed to control IAdj to less than 100 mA and keep it aluminum electrolytic capacitor on the output swamps this
constant. To do this, all quiescent operating current is effect and insures stability.
returned to the output terminal. This imposes the
requirement for a minimum load current. If the load current Protection Diodes
is less than this minimum, the output voltage will rise. When external capacitors are used with any IC regulator
Since the LM317 is a floating regulator, it is only the it is sometimes necessary to add protection diodes to prevent
voltage differential across the circuit which is important to the capacitors from discharging through low current points
performance, and operation at high voltages with respect to into the regulator.
ground is possible. Figure 18 shows the LM317 with the recommended
protection diodes for output voltages in excess of 25 V or
Vout
high capacitance values (CO > 25 mF, CAdj > 10 mF). Diode
Vin
LM317 Vout D1 prevents CO from discharging thru the IC during an input
+
short circuit. Diode D2 protects against capacitor CAdj
R1 discharging through the IC during an output short circuit.
Vref
Adjust IPROG
The combination of diodes D1 and D2 prevents CAdj from
discharging through the IC during an input short circuit.

IAdj D1
R2
Vout
Vref = 1.25 V Typical 1N4002
Vin Vout
Figure 19. Basic Circuit Configuration LM317
+
Cin R1 D2 CO
Load Regulation
Adjust
The LM317 is capable of providing extremely good load 1N4002
regulation, but a few precautions are needed to obtain R2 CAdj
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby Figure 20. Voltage Regulator with Protection Diodes
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.

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7
 LM317, NCV317

80 3.5

PD, MAXIMUM POWER DISSIPATION (W)

PD(max) for TA = +50°C

R θ JA, THERMAL RESISTANCE

70 Free Air 3.0

JUNCTION‐TO‐AIR (°C/W)
Mounted

ÎÎÎÎ
Vertically 2.0 oz. Copper
60 2.5

ÎÎÎÎ
L

ÎÎÎÎ
50 Minimum 2.0
Size Pad L

40
RqJA
ÎÎÎÎ 1.5

30 1.0
0 5.0 10 15 20 25 30
L, LENGTH OF COPPER (mm)

Figure 21. D2PAK Thermal Resistance and Maximum

Power Dissipation versus P.C.B. Copper Length

D6*

1N4002
Vout1 RSC Vin2 Iout
Vout 2
Vin LM317 LM317 Vout
32 V to 40 V Vin1 (1) (2)
+
0.1 mF 240 D5
1.0 mF
D1 IN4001 Tantalum
Adjust 1
1N4001 Adjust 2 +
Current 1.0K D2 5.0 k Voltage 10 mF
Limit 1N4001 Adjust
Adjust 1N4001
Q1
2N3822 D3
* Diodes D1 and D2 and transistor Q2 are added to Output Range:0 ≤ VO ≤ 25 V
* allow adjustment of output voltage to 0 V. D4 Output Range:0 ≤ IO ≤ 1.5 A

* D6 protects both LM317's during an input short circuit. -10 V

Q2 IN4001
2N5640

-10 V

Figure 22. ‘‘Laboratory’’ Power Supply with Adjustable Current Limit and Output Voltage

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8
 LM317, NCV317

+25 V Vout R1 D1*

LM317 Iout
Vin 1.25 1N4002
Vin Vout
Adjust D1 LM317
R2 1N4001 +
120 1.0 mF
100 D2
1N4001 Adjust
* To provide current limiting of IO to the system MPS2222
* ground, the source of the FET must be tied to a 720 TTL
* negative voltage below - 1.25 V. 1.0 k Control
2N5640
Vref Vref
R1 = R2 ≤
IOmax + IDSS IDDS Minimum Vout = 1.25 V
VSS*
VO < BVDSS + 1.25 V + VSS,
ILmin - IDSS < IO < 1.5 A. * D1 protects the device during an input short circuit.
As shown 0 < IO < 1.0 A.

Figure 23. Adjustable Current Limiter Figure 24. 5.0 V Electronic Shutdown Regulator

Iout
Vin Vout Vin Vout R1
LM317 LM317
240 1N4001

IAdj
Adjust 50 k Adjust

R2 MPS2907 +
10 mF
I out + ǒ Ǔ
R1
V
ref  ) I 
Adj
1.25V
+ 
R1
10 mA ≤ Iout ≤ 1.5 A

Figure 25. Slow Turn−On Regulator Figure 26. Current Regulator

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9
 LM317, NCV317

ORDERING INFORMATION
Operating
Device Temperature Range Package Shipping†
LM317BD2TG D2PAK−3
50 Units / Rail
(Pb−Free)
LM317BD2TR4G D2PAK−3
TJ = −40° to +125°C 800 Tape & Reel
(Pb−Free)
LM317BTG TO−220
50 Units / Rail
(Pb−Free)
LM317D2TG D2PAK−3
50 Units / Rail
(Pb−Free)
LM317D2TR4G D2PAK−3
TJ = 0° to +125°C 800 Tape & Reel
(Pb−Free)

LM317TG TO−220
50 Units / Rail
(Pb−Free)
NCV317BD2TG* D2PAK−3
50 Units / Rail
(Pb−Free)
NCV317BD2TR4G* D2PAK−3
TJ = −55° to +150°C 800 Tape & Reel
(Pb−Free)
NCV317BTG* TO−220
50 Units / Rail
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.

MARKING DIAGRAMS

D2PAK−3 TO−220
D2T SUFFIX T SUFFIX
CASE 936 CASE 221A

LM LM NC
317BD2T 317D2T V317BD2T
AWLYWWG AWLYWWG AWLYWWG LM LM NC
317BT 317T V317BT
AWLYWWG AWLYWWG AWLYWWG
2 2 2
1 3 1 3 1 3

1 2 3 1 2 3 1 2 3
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package

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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−220, SINGLE GAUGE

CASE 221AB−01
ISSUE A
DATE 16 NOV 2010

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
SEATING
−T− PLANE
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
B F C 4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS
T S S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)
SCALE 1:1
4 INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75
Q A B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
1 2 3 U D 0.025 0.035 0.64 0.88
H F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
K H 0.110 0.155 2.80 3.93
Z J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
L R Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
V J S 0.020 0.024 0.508 0.61
G T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
D V 0.045 --- 1.15 ---
Z --- 0.080 --- 2.04
N

STYLE 1: STYLE 2: STYLE 3: STYLE 4:

PIN 1. BASE PIN 1. BASE PIN 1. CATHODE PIN 1. MAIN TERMINAL 1
2. COLLECTOR 2. EMITTER 2. ANODE 2. MAIN TERMINAL 2
3. EMITTER 3. COLLECTOR 3. GATE 3. GATE
4. COLLECTOR 4. EMITTER 4. ANODE 4. MAIN TERMINAL 2

STYLE 5: STYLE 6: STYLE 7: STYLE 8:

PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE PIN 1. CATHODE
2. DRAIN 2. CATHODE 2. ANODE 2. ANODE
3. SOURCE 3. ANODE 3. CATHODE 3. EXTERNAL TRIP/DELAY
4. DRAIN 4. CATHODE 4. ANODE 4. ANODE

STYLE 9: STYLE 10: STYLE 11:

PIN 1. GATE PIN 1. GATE PIN 1. DRAIN
2. COLLECTOR 2. SOURCE 2. SOURCE
3. EMITTER 3. DRAIN 3. GATE
4. COLLECTOR 4. SOURCE 4. SOURCE

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON23085D Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TO−220, SINGLE GAUGE PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

D2PAK
CASE 936−03
ISSUE E
DATE 29 SEP 2015
SCALE 1:1
NOTES:
T T 1. DIMENSIONING AND TOLERANCING PER ANSI
TERMINAL 4 Y14.5M, 1982.
C C
K A U
2. CONTROLLING DIMENSION: INCHES.
OPTIONAL ED OPTIONAL ES 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
CHAMFER CHAMFER
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
S MOUNTING SURFACE FOR TERMINAL 4.
V 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
B FLASH OR GATE PROTRUSIONS. MOLD FLASH
H DETAIL C DETAIL C AND GATE PROTRUSIONS NOT TO EXCEED
1 2 3 0.025 (0.635) MAXIMUM.
6. SINGLE GAUGE DESIGN WILL BE SHIPPED AF­
TER FPCN EXPIRATION IN OCTOBER 2011.
J INCHES MILLIMETERS
F SIDE VIEW BOTTOM VIEW SIDE VIEW DIM MIN MAX MIN MAX
DUAL GAUGE SINGLE GAUGE A 0.386 0.403 9.804 10.236
G CONSTRUCTION CONSTRUCTION B 0.356 0.368 9.042 9.347
2X D C 0.170 0.180 4.318 4.572

TOP VIEW 0.010 (0.254) M T D 0.026 0.036 0.660 0.914

ED 0.045 0.055 1.143 1.397
ES 0.018 0.026 0.457 0.660
F 0.051 REF 1.295 REF
G 0.100 BSC 2.540 BSC
H 0.539 0.579 13.691 14.707

N T J 0.125 MAX 3.175 MAX

M K 0.050 REF 1.270 REF
L 0.000 0.010 0.000 0.254
M 0.088 0.102 2.235 2.591
SEATING N 0.018 0.026 0.457 0.660
P L PLANE
P 0.058 0.078 1.473 1.981
R 0_ 8_ 0_ 8_
R DETAIL C BOTTOM VIEW S 0.116 REF 2.946 REF
OPTIONAL CONSTRUCTIONS U 0.200 MIN 5.080 MIN
V 0.250 MIN 6.350 MIN

SOLDERING FOOTPRINT* GENERIC

10.490 MARKING DIAGRAM*

XXXXXXG
8.380 ALYWW

16.155

XXXXXX = Specific Device Code

2X A = Assembly Location
3.504 L = Wafer Lot
Y = Year
2X 1.016 WW = Work Week
5.080 G = Pb−Free Package
PITCH DIMENSIONS: MILLIMETERS *This information is generic. Please refer to
*For additional information on our Pb−Free strategy and soldering device data sheet for actual part marking.
details, please download the ON Semiconductor Soldering and Pb−Free indicator, “G” or microdot “ G”,
Mounting Techniques Reference Manual, SOLDERRM/D. may or may not be present.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASH01005A Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: D2PAK PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
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