Application Note: SY8286A: General Description Features
Application Note: SY8286A: General Description Features
Application Note: SY8286A: General Description Features
Typical Applications
Figure 1 Schematic
(QFN3x3-20)
Top Mark: AWRxyz, (Device code: AWR, x=year code, y=week code, z= lot number code)
Pin Name Pin Number Pin Description
Boot-strap pin. Supply high side gate driver. Decouple this pin to LX pin with
BS 1
0.1uF ceramic capacitor.
IN 2,3,4,5 Input pin. Decouple this pin to GND pin with at least 10uF ceramic cap
LX 6,19,20 Inductor pin. Connect this pin to the switching node of inductor
GND 7,8,18,EP Ground pin
Power good Indicator. Open drain output when the output voltage is within 90% to
PG 9
120% of regulation point.
NC 10, 16 Not connected
EN 11 Enable pin. Pull this pin high to turn on IC. Do not leave this pin floating.
Operating mode selection under light load. Pull this pin low for PFM operating,
MODE 12
and pull this pin high for PWM operation. Do not leave this pin floating
ILMT 13 Output current limit threshold selection.
FB 14 Output feedback pin. Connect to the center point of resistor divider.
External 3.3V bypass power supply input. Decouple this pin to GND with a 1uF
BYP 15
ceramic capacitor. Leave this pin floating if it is not used.
Internal 3.3V LDO output. Power supply for internal analog circuits and driving
VCC 17
circuit. Decouple this pin to GND with a 2.2uF ceramic capacitor.
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SY8286A
Block Diagram
IN
Input
UVLO
Current Sense
PG
BS
EN
ILMT
MODE
PWM LX
Control &
Internal Protection Current Sense
SST Logic
OTP
0.6V
GND
FB
IN
BYP 3.1V
3.3V LDO VCC
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SY8286A
Electrical Characteristics
(VIN = 12V, TA = 25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Input Voltage Range VIN 4 23 V
Input UVLO Threshold VUVLO VIN Rising 3.9 V
UVLO hysteresis VHYS 0.1 V
Quiescent Current IQ IOUT=0, VOUT=VSET*105% 120 145 µA
Shutdown Current ISHDN EN=0, 6 10 µA
Feedback Reference VREF 0.594 0.6 0.606 V
Voltage
Top FET RON RDS(ON)1 38 mΩ
Bottom FET RON RDS(ON)2 19 mΩ
Output Discharge Current IDIS 70 mA
Top FET Current Limit ILMT,HSFET 17 A
Bottom FET Current ILMT, LSFET ILMT=Low 6.7 7.8 8.9 A
Limit ILMT=Floating 9.3 10.6 11.9 A
ILMT=High 12 13.3 14.8 A
Soft Start Time tSS 1.3 ms
EN/MODE Rising VENH 1 V
Threshold
EN/MODE Falling VENL 0.4 V
Threshold
ILMT Rising Threshold VILMTH Vcc-0.5 V
ILMT Falling Threshold VILMTL 0.5 V
Switching Frequency FOSC 510 600 690 kHz
Min ON Time TON,MIN VIN=VINMAX 50 ns
Min OFF Time TOFF,MIN 150 ns
VCC Output Voltage VCC With 1mA Load 3.2 3.3 3.4 V
Output Over Voltage VOVP VFB Rising 115 120 125 %VREF
Threshold
Output Over Voltage VOVP,HYS 1.5 %VREF
Hysteresis
Output OVP Delay tOVP,DLY 20 µs
Output Under Voltage VUVP VFB Falling 57.5 62.5 67.5 %VREF
Protection Threshold
Output UVP Delay tUVP,DLY 200 us
Power Good Threshold VPG VFB Rising (Good) 92 %VREF
Power Good Hysteresis VPG,HYS 1.5 %VREF
Power Good Delay tPG,RISING Low to high 200 µs
tPG,FALLING High to low 10 µs
Bypass Switch Turn-on VBYP 2.97 3.1 3.21 V
Voltage
Bypass Switch VBYP,HYS 0.15 V
Switchover Hysteresis
Bypass Switch OVP VBYP,OVP 120 %VCC
Thermal Shutdown TSD 150 °C
Temperature
Thermal Shutdown THYS 15 °C
hysteresis
Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the
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SY8286A
operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability
Note 2: Package thermal resistance is measured in the natural convection at TA = 25°C on a four-layer Silergy
Evaluation Board.
Note 3: The device is not guaranteed to function outside its operating conditions.
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SY8286A
Typical Performance Characteristics
Efficiency vs. Load Current Efficiency vs. Load Current
(VBYP=3.3V, MODE=Low) (VBYP=3.3V, MODE=High)
100 100
90
90
80
80 70
60
70
50
60
40
VIN=5V,VOUT=1.2V
50 VIN=12V,VOUT=1.2V 30 VIN=5V,VOUT=1.2V
VIN=19V,VOUT=1.2V 20 VIN=12V,VOUT=1.2V
40 VIN=23V,VOUT=1.2V VIN=19V,VOUT=1.2V
10 VIN=23V,VOUT=1.2V
30 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
90
90
80
80 70
60
70
50
60
40
VIN=5V,VOUT=1.8V
50 VIN=12V,VOUT=1.8V 30 VIN=5V,VOUT=1.8V
VIN=19V,VOUT=1.8V 20 VIN=12V,VOUT=1.8V
40 VIN=23V,VOUT=1.8V VIN=19V,VOUT=1.8V
10 VIN=23V,VOUT=1.8V
30 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
95 90
90 80
85 70
80 60
75 50
70 40
VIN=5V,VOUT=3.3V
65 VIN=12V,VOUT=3.3V 30 VIN=5V,VOUT=3.3V
60 VIN=19V,VOUT=3.3V 20 VIN=12V,VOUT=3.3V
VIN=23V,VOUT=3.3V VIN=19V,VOUT=3.3V
55 10 VIN=23V,VOUT=3.3V
50 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
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SY8286A
95 90
90 80
85 70
80 60
75 50
70 40
VIN=7.4V,VOUT=5V
65 VIN=12V,VOUT=5V 30 VIN=7.4V,VOUT=5V
60 VIN=19V,VOUT=5V 20 VIN=12V,VOUT=5V
VIN=23V,VOUT=5V VIN=19V,VOUT=5V
55 10 VIN=23V,VOUT=5V
50 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
5.020 5.020
5.010 5.010
5.000 5.000
4.990 4.990
VIN=7.4V,VOUT=5V VIN=7.4V,VOUT=5V
4.980 4.980
VIN=12V,VOUT=5V VIN=12V,VOUT=5V
VIN=19V,VOUT=5V VIN=19V,VOUT=5V
4.970 VIN=23V,VOUT=5V 4.970 VIN=23V,VOUT=5V
4.960 4.960
0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0
Output Current (A) Output Current (A)
5.020 5.020
5.010 5.010
5.000 5.000
4.990 4.990
4.980 4.980
IO=0.001A, VO=5V IO=0.001A, VO=5V
4.970 IO=3A, VO=5V 4.970 IO=3A, VO=5V
IO=6A, VO=5V IO=6A, VO=5V
4.960 4.960
6.0 11.0 16.0 21.0 23.0 6.0 11.0 16.0 21.0 23.0
Input Voltage (V) Input Voltage (V)
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SY8286A
Load Transient Load Transient
(VIN=12V, VOUT=3.3V, IOUT=0.6-6A, MODE=Low) (VIN=12V, VOUT=3.3V, IOUT=0.6-6A, MODE=High)
IL 5A/div IL 5A/div
∆Vo 20mV/div
∆Vo 20mV/div
VLX 5V/div
VLX 5V/div
IL 2A/div
IL 2A/div
IL 5A/div
IL 5A/div
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SY8286A
Startup from VIN Shutdown from VIN
(VIN=12V, VOUT=3.3V, IO=6A) (VIN=12V, VOUT=3.3V, IO=6A)
IL 5A/div IL 5A/div
EN 5V/div EN 5V/div
IL 5A/div IL 5A/div
IL 5A/div IL 5A/div
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SY8286A
Short Circuit Protection Short Circuit Protection
(VIN=12V, VOUT=3.3V, IO=0A~ Short, ILMT: Floating) (VIN=12V, VOUT=3.3V, IO=6A~ Short, ILMT: Floating)
IL 5A/div IL 5A/div
IL 5A/div
IL 5A/div
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SY8286A
pins. In this case, a 10uF low ESR ceramic capacitor is
Operation recommended.
The SY8286A develops a high efficiency synchronous
Output capacitor COUT:
step-down DC-DC regulator capable of delivering 6A
The output capacitor is selected to handle the output
current. The device integrates main switch and
ripple noise requirements. Both steady state ripple and
synchronous switch with very low RDS(ON) to minimize
transient requirements must be taken into consideration
the conduction loss.
when selecting this capacitor. For most applications, an
X5R or better grade ceramic capacitor greater than
The SY8286A operates over a wide input voltage range
66uF capacitance can work well. The capacitance
from 4V to 23V. The DC-DC regulator adopts the
derating with DC voltage must be considered.
instant PWM architecture to achieve fast transient
responses for high step down applications and high
Output inductor L:
efficiency at light load. The device provides various
There are several considerations in choosing this
protection features for reliable operation. In addition, it
inductor.
operates at pseudo-constant frequency of 600kHz to
1) Choose the inductance to provide the desired
minimize the size of inductor and capacitor.
ripple current. It is suggested to choose the ripple
current to be about 40% of the maximum output
Applications Information current. The inductance is calculated as:
Because of the high integration in the SY8286A IC, the VOUT (1 − VOUT /VIN, MAX )
application circuit based on this regulator IC is rather L=
FSW × IOUT, MAX × 40%
simple. Only input capacitor CIN, output capacitor COUT,
output inductor L and feedback resistors (R1 and R2)
where Fsw is the switching frequency and IOUT,MAX is
need to be selected for the targeted applications
the maximum load current.
specifications.
The SY8286A regulator IC is quite tolerant of different
ripple current amplitude. Consequently, the final choice
Feedback resistor dividers R1 and R2:
of inductance can be slightly off the calculation value
Choose R1 and R2 to program the proper output voltage.
without significantly impacting the performance.
To minimize the power consumption under light load,
it is desirable to choose large resistance values for both
2) The saturation current rating of the inductor must
R1 and R2. A value of between 10kΩ and 1MΩ is
be selected to be greater than the peak inductor
highly recommended for both resistors. If Vout is 1.2V,
current under full load conditions.
R1=100k is chosen, then using following equation, R2
can be calculated to be 100kΩ:
VOUT(1-VOUT/VIN,MAX)
ISAT, MIN > IOUT, MAX +
VOUT 2 ⋅ FSW ⋅ L
R1 3) The DCR of the inductor and the core loss at the
0.6V switching frequency must be low enough to
R2 = R1 . 0.6VFB
achieve the desired efficiency requirement. It is
VOUT − 0.6V R2 desirable to choose an inductor with DCR<10mΩ
GND
to achieve a good overall efficiency.
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SY8286A
Soft-start Light Load Operation Mode Selection
The SY8286A has a built-in soft-start to control the PFM or PWM light load operation is selected by
output voltage ramp up speed during start up to limit MODE pin. Pull MODE pin low for PFM operation,
the input inrush current. The typical soft-start time is and pull this pin high for PWM operation.
1.3ms.
Load Transient Considerations:
Enable Operation The SY8286A regulator IC adopts the instant PWM
Pulling the EN pin low will shut down the device. architecture to achieve good stability and fast transient
During shutdown mode, the SY8286A shutdown responses. In applications with high step load current,
current drops to lower than 10uA, Driving the EN pin adding an RC network RFF and CFF parallel with R1
high will turn on the IC again. may further speed up the load transient responses.
L1
VOUT
External Bootstrap Cap
This capacitor provides the gate driver voltage for
internal high side MOSEFET. A 100nF low ESR CFF R1
ceramic capacitor connected between BS pin and LX RFF
COUT
pin is recommended. (opt.) R2
FB
BS
CBS
100nF
Layout Design:
LX The layout design of SY8286A regulator is relatively
simple. For the best efficiency and minimum noise
promblem, we should place the following components
VCC LDO and BYP Input close to the IC: CIN, CVCC, L, R1 and R2.
The 3.3V VCC LDO provides the power supply for 1) It is desirable to maximize the PCB copper area
internal control and drive circuit. Bypass this pin to connecting to GND pin to achieve the best thermal and
ground with a 2.2uF ceramic capacitor. The control and noise performance. If the board space allowed, a
drive circuit can also be powered by external 3.3V ground plane is highly desirable.
power supply. When a 3.3V external power supply is
connected to the BYP pin, the VCC LDO is turned off 2) CIN must be close to Pins IN and GND. The loop
and the switch between BYP and VCC is turned on. area formed by CIN and GND must be minimized.
The overall efficiency may be improved by connecting
the BYP pin to external 3.3V switching power supply. 3) The PCB copper area associated with LX pin must
Leave BYP pin floating if this feature is not used. be minimized to avoid the potential noise problem.
.
4) The components R1 and R2, and the trace connecting
to the FB pin must NOT be adjacent to the LX net on
the PCB layout to avoid the noise problem.
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SY8286A
PCB Layout Suggestion
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SY8286A
QFN3x3-20 Package Outline
Bottom view
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SY8286A
Notes: All dimension in millimeter and exclude mold flash & metal burr.
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SY8286A
Taping & Reel Specification
Feeding direction
Reel
Size
Package Tape width Pocket Reel size Trailer Leader length Qty per
type (mm) pitch(mm) (Inch) length(mm) (mm) reel
3. Others: NA
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