Reference Design: PR883: A 300-W, Universal Input, Isolated PFC Power Supply For LCD TV Applications
Reference Design: PR883: A 300-W, Universal Input, Isolated PFC Power Supply For LCD TV Applications
Reference Design: PR883: A 300-W, Universal Input, Isolated PFC Power Supply For LCD TV Applications
PR883: A 300-W, Universal Input, Isolated PFC Power Supply for LCD TV
Applications
Power Management – Power Supply Controllers
1 INTRODUCTION
This guide documents a low-profile power supply that is suitable for powering LCD TVs or other flat screen
applications. The power supply accepts a universal AC line-input voltage (85 VRMS to 265 VRMS), and produces
an output voltage of 24-VDC for loads up to 12 A (288 W).
The requirements for a flat-panel display include a physical profile and the ability to operate from the ac-line input
at close to unity power factor. Therefore a flat-panel display application demands that an internal power supply be
thin so as to fit behind the screen inside the TV case, and comply with the power quality requirements defined in
the IEC standard, 61000-3-2. In addition, the combination of a tight physical package and the desire to meet
Energy Star® guidelines requires that the design also demonstrates very high efficiency. Described herein is a
practical design that uses standard components. It achieves the requirements using a traditional two-stage power
converter topology along with state-of-the-art power circuit control methods. The first stage is an interleaved,
transition-mode, power factor correcting (PFC) boost pre-regulator. This is followed by an isolated LLC series-
resonant DC-DC main converter.
The design takes advantage of three integrated circuit (IC) power controllers. The PFC pre-regulator stage is
controlled by the UCC28061, a dual-phase, interleaved, transition-mode PFC controller. The resonant LLC
converter uses the UCC25600; a low-cost 8-pin controller. The third IC is the UCC2813D-4. This is used to
control a small 5-W flyback converter that provides a bias supply voltage. The bias supply is optional. It is
provided for convenience so that the circuit can be demonstrated without the need for a bench supply.
2 SCOPE
A reference design is primarily intended to demonstrate the design of a functional circuit, the operation of which
has been verified through a limited number of performance tests. This circuit incorporates essential safety
features. These include an input line fuse, inrush current control, output over-current limit, and output over-voltage
protection. An area not addressed by this design is electromagnetic compatibility (EMC). For most applications,
EMI filter components would need to be added so that the design meets applicable environmental and system
compatibility requirements. To comply with EMC standards, components such as input and output filters would be
required to suppress electromagnetic interference (EMI). In addition components that suppress and/or protect the
unit from high-voltage line surges and lightening would be required to meet power quality and safety standards.
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3 ELECTRICAL PERFORMANCE
Table 1 Performance Specifications
Notes:
1. Operates down to zero load with reduced regulation.
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4 DESCRIPTION
Fig. 1 shows the circuit divided into three blocks. Each block represents one of the three converters that make up
the complete power system. They include the boost PFC pre-regulator, the LLC series-resonant DC-DC converter,
and the 5-W bias supply. The PFC boost pre-regulator operates off a universal ac-line input voltage and produces
a regulated 390 VDC output. The output from this stage is fed to both the main LLC resonant and bias supply
converters. The bias supply provides a regulated 15 VDC to power the control circuitry, and the LLC resonant
converter produces an isolated output that is regulated at 24 VDC. For each of the three circuits, the theory of
operation is described.
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in “transition mode.” With this technique the current in each inductor is required to completely decay to zero
during the ‘off’ period of the transistor switch before the next ‘on’ period is initiated. Zero inductor current is
detected by the control circuit using an auxiliary winding on each inductor. The voltage across the auxiliary
winding collapses to zero when the inductor energy is exhausted. The combination of interleaved phases and
transition-mode control results in improved efficiency and smaller component sizes when compared to a
traditional single-phase solution. These and other control enhancements, such as phase management and input
current shaping, are built in to the UCC28061 PFC control IC.
The PWMCNTL pin (pin 9) of the UCC28061 provides an automatic on/off enable for a downstream converter.
This is used to prevent the LLC series-resonant converter from starting up before the output voltage from the PFC
pre-regulator has reached a minimum value. The output voltage is sensed through a resistor divider connected at
the VSENS pin (pin 2). The on/off threshold and hysteresis are controlled by the gain and output impedance of
the divider. The values selected for this design provide a nominal ‘on’ threshold of 330 VDC, and an ‘off’ threshold
of 300 VDC for the resonant converter.
‡
Includes the primary referred leakage inductance of the main transformer
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The circuit senses load current through the resonant capacitance using a parallel 0.001-µF capacitor as an
impedance divider. Current through this capacitor is half-wave rectified and then passed through a low-value
sense resistor. The resulting signal is then filtered and fed to the OC pin (pin 3) of the UCC25600. Our testing
suggests that this method of sensing current results in less variation of the sensed current with switching
frequency.
The resonant current is susceptible to a high surge current during converter start-up. For this reason it is
recommended that the sensitivity of the current sense is reduced during converter start up. In the reference circuit
this is accomplished with a P-channel JFET and a divider resistor. The gate of the JFET is connected to the SS
pin (pin 4) of the UCC25600, which is initially low during converter start up. The JFET places the divider resistor in
circuit during the period that its gate voltage is low. When the soft start period is complete the JFET turns off to
return current sensitivity to normal.
Other protection features, such as over-voltage shutdown, are easily implemented by momentarily pulling the SS
pin (pin 4) of the UCC25600 to ground. Over-voltage protection has been added to the reference design using this
method. At the converter output a 27-V Zener diode is used to sense an output over voltage. The diode is
connected in series with an opto’ coupler. When the output voltage is sufficiently high to break down the Zener
diode, the output of the coupler pulls down the soft-start pin to the UCC25600.
A limitation of the LLC series-resonant converter is that they operate over a limited input voltage range. This is
because below a certain operating frequency the frequency-gain relationship of the converter is reversed. This is
prevented by disabling the converter when the DC input voltage is below a certain value. This is implemented with
the automatic on/off enable signal (CONV_OFF) from the upstream PFC pre-regulator. This signal is used to hold
down the SS pin (pin 4) whenever the output voltage from the PFC stage is insufficient for the resonant converter
to reliably start. In this case a simple NPN bipolar transistor is used to ground the SS pin whenever the
CONV_OFF control signal is high.
When the jumper is in the “Run” position the resonant converter will operate whenever a valid VCC supply voltage
is available. This mode is useful for testing the resonant converter independently from the PFC pre-regulator. The
removal of the jumper will then disable the resonant converter. The settings are summarized in Table 2.
1
Auto (default) / Operates with PFC pre-regulator
1
Run / Operates without PFC pre-regulator
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5 SCHEMATICS
The schematics provided in this section are for reference only. For the purposes of clarity some of the detailed
component parameters are not shown. Consult the bill of materials for additional information.
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6 PCB DESIGN
6.1 General
Fig. 22 and Fig. 23 show the component placement and copper routing of the printed circuit board (PCB), that
used to test and characterize this design. The PCB was designed using single-layer, 1-oz. copper foil. A
combination of both through-hole (T/H) and surface mount devices (SMD) were used. T/H components are
mounted on the top side of the PCB and SMD parts on the underside.
The layout detailed in Fig. 22 & Fig. 23 is missing one component. Fig. 3 Schematic, LLC Resonant Converter,
shows two pairs of rectifiers connected to the T302 secondary; D301 and D306. The layout shows just one, D301.
For improved efficiency and thermal management, two output rectifier pairs are recommended.
6.2 Grounding
The PCB design is limited to a single layer of copper foil. This requires careful attention to the layout of the copper
traces. Differential high-frequency noise developed across discontinuities in the ground system can cause
spurious operation of the control circuits. For this reason the design dedicates large areas of copper to the power
ground node (PWRGND). Care should then be exercised to keep the ground contiguous and connected with wide
paths of copper. The ground connections should take priority over the routing of all other signals. Where
necessary, wire links or axial T/H components should be used to pass signals to other areas of the board. These
techniques minimize the impedance to high-frequency ground currents to ensure low-noise operation.
Most of the control circuitry uses surface mount devices (SMDs), which are placed on the underside of the PCB.
There are three control circuits, one for each of the power converters on the board. To provide noise immunity
from the high-frequency currents generated by the power circuitry, the components associated with each control
circuit are grouped together and referenced to one of three analog grounds. The control circuit for the PFC Boost
converter uses AGND1, the Bias Supply Converter AGND2, and the LLC Resonant Converter AGND3. Each of
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these analog grounds is represented on the PCB layout as a small copper area (or island) which is then
connected to power ground (PWRGND) at just one location. This single-point grounding technique forces the
high-frequency ground currents generated by the power circuitry to be directed around (as opposed to through)
the quiet ground area occupied of the sensitive control circuits.
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7 PERFORMANCE CHARACTERISTICS
Fig. 5 through Fig. 20 present typical performance curves. Since actual performance data can be affected by
measurement techniques and environmental variables, these curves are presented for reference and may differ
from actual field measurements.
85 90
80 85
Efficiency (%)
Efficiency (%)
75 VI 80 VI
90 V 190 V
70 130 V 75 220 V
110 V 250 V
65 70
60 65
55 60
50 55
0 2 4 6 8 10 12 0 2 4 6 8 10 12
Fig. 5 Operating Efficiency; Low AC-Line Fig. 6 Operating Efficiency; High AC-Line
Range 1 Range 1
40
50
35
Power Diss. (W)
40 VI 30
90 V 25 190 V
30 130 V 250 V
110 V 20 220 V
20 15
10
10
5
0 0
0 2 4 6 8 10 12 0 2 4 6 8 10 12
Output Current (A) Output Current (A)
Fig. 7 Power Dissipation; Low AC-Line Range 1 Fig. 8 Power Dissipation; High AC-Line
Range 1
Notes:
1. The discontinuity in the performance curves at approximately 4 A of output current is caused by the
phase management feature of the UCC28061 PFC control IC. The shift occurs when the IC transitions
from single to dual-phase operation.
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250 250
AC Output Ripple (mVpp)
90 V 190 V
150 130 V 150 250 V
110 V 220 V
100 100
50 50
0 0
0 2 4 6 8 10 12 0 2 4 6 8 10 12
Output Current (A) Output Current (A)
Fig. 9 Output AC-Ripple; Low AC-Line Range Fig. 10 Output AC-Ripple; High AC-Line Range
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8 CIRCUIT WAVEFORMS
Fig. 13 PFC Inductor Waveforms; 8-A Load & Fig. 14 PFC Inductor Waveforms; 8-A Load &
with AC-Line at 160 V (110-V pk) with AC-Line at 40 V (Crossover)
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Fig. 15 Switch Node & Inductor Current; Fig. 16 Switch Node & Inductor Current;
8-A Load & 390 VDC Link (174 kHz) 8-A Load & 340 VDC Link (150 kHz)
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Fig. 19 Start-up Sequence; 110 V AC-Line Input Fig. 20 Shut-Down Sequence; 220 V AC-Line
Input
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Fig. 23: Bottom Copper and Part Placement (Viewed from Bottom)
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3 C101-C103 0.33 µF CAPACITOR, PET FILM, X1, 250 VAC, 20% ECQ-U3A334MG Panasonic
1 C104 0.1 µF CAPACITOR, PET FILM, X2, 250 VAC, 20% ECQ-U2A104BC1 Panasonic
2 C105, C106 22 pF CAPACITOR, MLC, 0603, 50 V, 5% Generic Multi-sourced
1 C107 0.047 µF CAPACITOR, PET FILM, 630 V, 10% ECQ-E6473KZ Panasonic
4 C108-C111 100 µF CAPACITOR, ELECTROLYTIC, 450 V, 10% EKXG451ELL101MM40S Nippon Chemi-Con
2 C112, C118 1200 pF CAPACITOR, MLC, 0603, 50 V, 10% Generic Multi-sourced
2 C113, C317 0.01 µF CAPACITOR, MLC, 0603, 50 V, 10% Generic Multi-sourced
1 C114 0.33 µF CAPACITOR, MLC, 1206, 25 V, 20% Generic Multi-sourced
2 C115, C117 2.2 µF CAPACITOR, MLC, 1206, 25 V, 20% Generic Multi-sourced
2 C116, C208 1000 pF CAPACITOR, MLC, 0603, 100 V, 5% Generic Multi-sourced
1 C119 3300 pF CAPACITOR, MLC, 0603, 50 V, 10% Generic Multi-sourced
1 C201 0.01 µF CAPACITOR, FILM, 630 V, 10% ECQ-E6103KZ Panasonic
2 C202, C206 0.1 µF CAPACITOR, MLC, 0603, 16 V, 10% Generic Multi-sourced
2 C203, C314 0.1 µF CAPACITOR, MLC, 0805, 25 V, 20% Generic Multi-sourced
1 C204 470 pF CAPACITOR, MLC, 0603, 50 V, 5% Generic Multi-sourced
1 C210 100 pF CAPACITOR, MLC, 0603, 100 V, 10% 06031A101KAT2A AVX
1 C211 10 µF CAPACITOR, MLC, 1206, 25 V, 10% Generic Multi-sourced
1 C212 330 µF CAPACITOR, ELECTROLYTIC, 25 V, 20% EEU-FC1E331 Panasonic
3 C301-C303 0.33 µF CAPACITOR, FILM, 630 V, 10% MF630V.33K Xicon
1 C304 0.001 µF CAPACITOR, PP FILM, 1 KV, 10% MKP10 1000/1600/10 WIMA
2 C305, C321 0.022 µF CAPACITOR, PP FILM, 1 KV, 10% MKP10-.022/1KV/10 WIMA
6 C306-C311 150 µF CAPACITOR, ELECTROLYTIC, 35 V, 10% EEUFM1V151 Panasonic
1 C312 1 uF CAPACITOR, MLC, 1210, 50 V, 20% Generic Multi-sourced
1 C313 0.1 uF CAPACITOR, MLC, 1206, 50 V, 20% Generic Multi-sourced
1 C315 1 uF CAPACITOR, MLC, 0805, 25 V, 10% Generic Multi-sourced
1 C316 0.047 uF CAPACITOR, MLC, 0603, 25 V, 10% Generic Multi-sourced
1 C320 0.01uF CAPACITOR, MLC, 0805, 50 V, 10% Generic Multi-sourced
1 C322 0.22uF CAPACITOR, MLC, 0603, 10 V, 10% Generic Multi-sourced
1 D101 BRIDGE RECTIFIER GBPC606-E4/51 Vishay
3 D102-D104 RECTIFIER, POWER, ULTRA-FAST MURS360T3G ON Semiconductor
3 D201, D303, DIODE, SIGNAL MMBD914LT1G ON Semiconductor
D304
1 D203 DIODE, SCHOTTKY MBRS1100T3G ON-Semiconductor
1 D204 DIODE, FAST RECOVERY, T/H 1N4934G ON-Semiconductor
2 D301, D302 DIODE, DUAL, SCHOTTKY, 100-V, 10-A STPS20H100CT ST Microelectronics
1 D304 27 V DIODE, ZENER, 0.5-W, 27 V MMSZ5254B Diodes, Inc.
1 D305 12 V DIODE, ZENER, 0.5-W, 12 V MMSZ5242BT1 ON Semiconductor
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10 References
The following is a list of data sheets, evaluation guides, and papers that were used to design of the 300-W LCD
TV power supply.
[1] UCC28061 Data Sheet, Texas Instruments Ref. SLUS837
[2] UCC28061EVM 300-W Interleaved PFC Pre-Regulator User’s Guide, Texas Instruments Ref. SLUU316
[3] UCC25600 Data Sheet; Texas Instruments Ref. SLUS846
[4] Bing Lu, Wenduo Liu,Yan Liang, Fred C. Lee, and Jacobus D. van Wyk, “Optimal Design Methodology for
LLC Resonant Converter,” IEEE APEC 2006.
11 Additional Information
The PCB layout for this reference design was created using PADS 2005 CAD software by Mentor Graphics.
PADS ‘Logic’ was used for schematic capture, and PADS ‘Layout’ was used to design the PCB. The Gerber file,
silk screen, solder mask, and drill drawing files produced by PADS, including the program files that created them,
are available to designers. Enquiries should be made to the regional Texas Instruments Product Information
Center (PIC), or the local TI sales representative. Use the prototype reference design number, PR883, for this
request.
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