Unit-1 - DC & AC Circuits PDF
Unit-1 - DC & AC Circuits PDF
Unit-1 - DC & AC Circuits PDF
B.Tech – II Sem L T P C
3 0 0 3
(19A02201T) Basic Electrical & Electronics Engineering
Part A: Basic Electrical Engineering
(Civil, Mechanical, CSE, CSSE, IT and Food Technology)
Course Objectives:
1. To introduce basics of electric circuits.
2. To teach DC and AC electrical circuit analysis.
3. To explain working principles of transformers and electrical machines.
4. To impart knowledge on low voltage electrical installations
60 Page
Unit Outcomes: Able to
Understand working operation of various generating stations (L2)
Explain the types of Distribution systems
Text Books:
1. D. P. Kothari and I. J. Nagrath - “Basic Electrical Engineering” - Tata McGraw Hill -
2010.
2. V.K. Mehta & Rohit Mehta, “Principles of Power System” – S.Chand – 2018.
References:
1. L. S. Bobrow - “Fundamentals of Electrical Engineering” - Oxford University Press -
2011.
2. E. Hughes - “Electrical and Electronics Technology” - Pearson - 2010.
3. C.L. Wadhwa – “Generation Distribution and Utilization of Electrical Energy”, 3rd
Edition, New Age International Publications.
Course Outcomes:
Apply concepts of KVL/KCL in solving DC circuits (L3)
Choose correct rating of a transformer for a specific application (L5)
Illustrate working principles of induction motor - DC Motor (L3)
Identify type of electrical machine based on their operation.(L1)
Describe working principles of protection devices used in electrical circuits. (L2)
Unit Outcomes:
Describe operation and characteristics of diodes and transistors (L2)
Make use of diodes and transistors in simple, typical circuit applications (L3)
Understand operation of basic op-amp circuits (L2)
61 Page
Unit II Digital Electronics
Introduction, Switching and Logic Levels, Digital Waveform, characteristics of digital ICs, logic
gates, number systems, combinational circuits - adders, multiplexers, decoders; introduction to
sequential circuits, flip flops, shift register, binary counter.
Unit Outcomes:
Explain different logic gates using truth table (L2)
Distinguish combinational and sequential circuits (L2)
Analyze various combinational circuits such as adders, multiplexers and decoders
(L4)
Understand functionality of flip-flops, shift registers and counters (L2)
Unit Outcomes:
Describe basic elements of a communication system (L2)
Explain need for modulation and different modulation techniques (L2)
Understand functioning of various communication systems (L2)
Text Books:
1. D.P. Kothari, I.J.Nagrath, Basic Electronics, 2nd edition, McGraw Hill
Education(India)Private Limited
2. S.K. Bhattacharya, Basic Electrical and Electronics Engineering, 2nd edition, Pearson
India Private Limited.
Reference Books:
1. R. Muthusubramanian, S. Salivahanan, “Basic Electrical and Electronics Engineering”,
Tata McGraw-Hill Education, Reprint 2012.
2. David Bell, Electronic Devices and Circuits: Oxford University Press, 5th EDn., 2008.
62 Page
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SUPERPOSITION THEOREM
Statement:
In any linear, bilateral, multi source network the response in any element is equal to the
algebraic sum of the responses obtained by each source acting alone while all other sources are set
equal to zero.
Step-1: First find the current (I3) through load resistance (R3) as shown in Circuit Diagram-A.
Take only one independent source of voltage or current and set all other sources to zero.
Step-2: In the Circuit Diagram-B shown above, consider the source E1 and set the other
source E2 by zero (Voltage Source is short circuited).
Step-3: If there is a voltage source than short circuit it (V=0), and if there is a current source
than just open circuit it (I=0). Find the Current (I3’) through load resistance (i.e., R3).
Step-4: Now consider the other source E2 and set the source E1 to zero as shown in the Circuit
Diagram-C. Determine the current (I3’’).
Step-5: Now to determine the net branch current utilizing the superposition theorem, add the
currents obtained from each individual source for each branch (I3’ + I3’’).
Step-6: Finally superposition theorem is verified by I3 = I3’ + I3’’.
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